1 /** 2 * \file 3 * 4 * \brief Instance description for GPBR 5 * 6 * Copyright (c) 2019 Microchip Technology Inc. 7 * 8 * \license_start 9 * 10 * \page License 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 * \license_stop 27 * 28 */ 29 30 /* file generated from device description version 2017-08-25T14:00:00Z */ 31 #ifndef _SAME70_GPBR_INSTANCE_H_ 32 #define _SAME70_GPBR_INSTANCE_H_ 33 34 /* ========== Register definition for GPBR peripheral ========== */ 35 #if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 36 37 #define REG_GPBR_SYS_GPBR (0x400E1890) /**< (GPBR) General Purpose Backup Register 0 */ 38 #define REG_GPBR_SYS_GPBR0 (0x400E1890) /**< (GPBR) General Purpose Backup Register 0 */ 39 #define REG_GPBR_SYS_GPBR1 (0x400E1894) /**< (GPBR) General Purpose Backup Register 1 */ 40 #define REG_GPBR_SYS_GPBR2 (0x400E1898) /**< (GPBR) General Purpose Backup Register 2 */ 41 #define REG_GPBR_SYS_GPBR3 (0x400E189C) /**< (GPBR) General Purpose Backup Register 3 */ 42 #define REG_GPBR_SYS_GPBR4 (0x400E18A0) /**< (GPBR) General Purpose Backup Register 4 */ 43 #define REG_GPBR_SYS_GPBR5 (0x400E18A4) /**< (GPBR) General Purpose Backup Register 5 */ 44 #define REG_GPBR_SYS_GPBR6 (0x400E18A8) /**< (GPBR) General Purpose Backup Register 6 */ 45 #define REG_GPBR_SYS_GPBR7 (0x400E18AC) /**< (GPBR) General Purpose Backup Register 7 */ 46 47 #else 48 49 #define REG_GPBR_SYS_GPBR (*(__IO uint32_t*)0x400E1890U) /**< (GPBR) General Purpose Backup Register 0 */ 50 #define REG_GPBR_SYS_GPBR0 (*(__IO uint32_t*)0x400E1890U) /**< (GPBR) General Purpose Backup Register 0 */ 51 #define REG_GPBR_SYS_GPBR1 (*(__IO uint32_t*)0x400E1894U) /**< (GPBR) General Purpose Backup Register 1 */ 52 #define REG_GPBR_SYS_GPBR2 (*(__IO uint32_t*)0x400E1898U) /**< (GPBR) General Purpose Backup Register 2 */ 53 #define REG_GPBR_SYS_GPBR3 (*(__IO uint32_t*)0x400E189CU) /**< (GPBR) General Purpose Backup Register 3 */ 54 #define REG_GPBR_SYS_GPBR4 (*(__IO uint32_t*)0x400E18A0U) /**< (GPBR) General Purpose Backup Register 4 */ 55 #define REG_GPBR_SYS_GPBR5 (*(__IO uint32_t*)0x400E18A4U) /**< (GPBR) General Purpose Backup Register 5 */ 56 #define REG_GPBR_SYS_GPBR6 (*(__IO uint32_t*)0x400E18A8U) /**< (GPBR) General Purpose Backup Register 6 */ 57 #define REG_GPBR_SYS_GPBR7 (*(__IO uint32_t*)0x400E18ACU) /**< (GPBR) General Purpose Backup Register 7 */ 58 59 #endif /* (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 60 #endif /* _SAME70_GPBR_INSTANCE_ */ 61
