1 /* ---------------------------------------------------------------------------- */ 2 /* Atmel Microcontroller Software Support */ 3 /* SAM Software Package License */ 4 /* ---------------------------------------------------------------------------- */ 5 /* Copyright (c) %copyright_year%, Atmel Corporation */ 6 /* */ 7 /* All rights reserved. */ 8 /* */ 9 /* Redistribution and use in source and binary forms, with or without */ 10 /* modification, are permitted provided that the following condition is met: */ 11 /* */ 12 /* - Redistributions of source code must retain the above copyright notice, */ 13 /* this list of conditions and the disclaimer below. */ 14 /* */ 15 /* Atmel's name may not be used to endorse or promote products derived from */ 16 /* this software without specific prior written permission. */ 17 /* */ 18 /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ 19 /* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ 20 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ 21 /* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ 22 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ 23 /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ 24 /* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ 25 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ 26 /* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ 27 /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ 28 /* ---------------------------------------------------------------------------- */ 29 30 #ifndef _SAM4E_MATRIX_INSTANCE_ 31 #define _SAM4E_MATRIX_INSTANCE_ 32 33 /* ========== Register definition for MATRIX peripheral ========== */ 34 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 35 #define REG_MATRIX_MCFG (0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ 36 #define REG_MATRIX_SCFG (0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ 37 #define REG_MATRIX_PRAS0 (0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ 38 #define REG_MATRIX_PRBS0 (0x400E0284U) /**< \brief (MATRIX) Priority Register B for Slave 0 */ 39 #define REG_MATRIX_PRAS1 (0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ 40 #define REG_MATRIX_PRBS1 (0x400E028CU) /**< \brief (MATRIX) Priority Register B for Slave 1 */ 41 #define REG_MATRIX_PRAS2 (0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ 42 #define REG_MATRIX_PRBS2 (0x400E0294U) /**< \brief (MATRIX) Priority Register B for Slave 2 */ 43 #define REG_MATRIX_PRAS3 (0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ 44 #define REG_MATRIX_PRBS3 (0x400E029CU) /**< \brief (MATRIX) Priority Register B for Slave 3 */ 45 #define REG_MATRIX_PRAS4 (0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ 46 #define REG_MATRIX_PRBS4 (0x400E02A4U) /**< \brief (MATRIX) Priority Register B for Slave 4 */ 47 #define REG_MATRIX_PRAS5 (0x400E02A8U) /**< \brief (MATRIX) Priority Register A for Slave 5 */ 48 #define REG_MATRIX_PRBS5 (0x400E02ACU) /**< \brief (MATRIX) Priority Register B for Slave 5 */ 49 #define REG_MATRIX_PRAS6 (0x400E02B0U) /**< \brief (MATRIX) Priority Register A for Slave 6 */ 50 #define REG_MATRIX_PRBS6 (0x400E02B4U) /**< \brief (MATRIX) Priority Register B for Slave 6 */ 51 #define REG_MATRIX_PRAS7 (0x400E02B8U) /**< \brief (MATRIX) Priority Register A for Slave 7 */ 52 #define REG_MATRIX_PRBS7 (0x400E02BCU) /**< \brief (MATRIX) Priority Register B for Slave 7 */ 53 #define REG_MATRIX_PRAS8 (0x400E02C0U) /**< \brief (MATRIX) Priority Register A for Slave 8 */ 54 #define REG_MATRIX_PRBS8 (0x400E02C4U) /**< \brief (MATRIX) Priority Register B for Slave 8 */ 55 #define REG_MATRIX_PRAS9 (0x400E02C8U) /**< \brief (MATRIX) Priority Register A for Slave 9 */ 56 #define REG_MATRIX_PRBS9 (0x400E02CCU) /**< \brief (MATRIX) Priority Register B for Slave 9 */ 57 #define REG_MATRIX_PRAS10 (0x400E02D0U) /**< \brief (MATRIX) Priority Register A for Slave 10 */ 58 #define REG_MATRIX_PRBS10 (0x400E02D4U) /**< \brief (MATRIX) Priority Register B for Slave 10 */ 59 #define REG_MATRIX_PRAS11 (0x400E02D8U) /**< \brief (MATRIX) Priority Register A for Slave 11 */ 60 #define REG_MATRIX_PRBS11 (0x400E02DCU) /**< \brief (MATRIX) Priority Register B for Slave 11 */ 61 #define REG_MATRIX_PRAS12 (0x400E02E0U) /**< \brief (MATRIX) Priority Register A for Slave 12 */ 62 #define REG_MATRIX_PRBS12 (0x400E02E4U) /**< \brief (MATRIX) Priority Register B for Slave 12 */ 63 #define REG_MATRIX_PRAS13 (0x400E02E8U) /**< \brief (MATRIX) Priority Register A for Slave 13 */ 64 #define REG_MATRIX_PRBS13 (0x400E02ECU) /**< \brief (MATRIX) Priority Register B for Slave 13 */ 65 #define REG_MATRIX_PRAS14 (0x400E02F0U) /**< \brief (MATRIX) Priority Register A for Slave 14 */ 66 #define REG_MATRIX_PRBS14 (0x400E02F4U) /**< \brief (MATRIX) Priority Register B for Slave 14 */ 67 #define REG_MATRIX_PRAS15 (0x400E02F8U) /**< \brief (MATRIX) Priority Register A for Slave 15 */ 68 #define REG_MATRIX_PRBS15 (0x400E02FCU) /**< \brief (MATRIX) Priority Register B for Slave 15 */ 69 #define REG_MATRIX_MRCR (0x400E0300U) /**< \brief (MATRIX) Master Remap Control Register */ 70 #define REG_MATRIX_SFR (0x400E0310U) /**< \brief (MATRIX) Special Function Register */ 71 #define REG_MATRIX_WPMR (0x400E03E4U) /**< \brief (MATRIX) Write Protect Mode Register */ 72 #define REG_MATRIX_WPSR (0x400E03E8U) /**< \brief (MATRIX) Write Protect Status Register */ 73 #else 74 #define REG_MATRIX_MCFG (*(RwReg*)0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ 75 #define REG_MATRIX_SCFG (*(RwReg*)0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ 76 #define REG_MATRIX_PRAS0 (*(RwReg*)0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ 77 #define REG_MATRIX_PRBS0 (*(RwReg*)0x400E0284U) /**< \brief (MATRIX) Priority Register B for Slave 0 */ 78 #define REG_MATRIX_PRAS1 (*(RwReg*)0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ 79 #define REG_MATRIX_PRBS1 (*(RwReg*)0x400E028CU) /**< \brief (MATRIX) Priority Register B for Slave 1 */ 80 #define REG_MATRIX_PRAS2 (*(RwReg*)0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ 81 #define REG_MATRIX_PRBS2 (*(RwReg*)0x400E0294U) /**< \brief (MATRIX) Priority Register B for Slave 2 */ 82 #define REG_MATRIX_PRAS3 (*(RwReg*)0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ 83 #define REG_MATRIX_PRBS3 (*(RwReg*)0x400E029CU) /**< \brief (MATRIX) Priority Register B for Slave 3 */ 84 #define REG_MATRIX_PRAS4 (*(RwReg*)0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ 85 #define REG_MATRIX_PRBS4 (*(RwReg*)0x400E02A4U) /**< \brief (MATRIX) Priority Register B for Slave 4 */ 86 #define REG_MATRIX_PRAS5 (*(RwReg*)0x400E02A8U) /**< \brief (MATRIX) Priority Register A for Slave 5 */ 87 #define REG_MATRIX_PRBS5 (*(RwReg*)0x400E02ACU) /**< \brief (MATRIX) Priority Register B for Slave 5 */ 88 #define REG_MATRIX_PRAS6 (*(RwReg*)0x400E02B0U) /**< \brief (MATRIX) Priority Register A for Slave 6 */ 89 #define REG_MATRIX_PRBS6 (*(RwReg*)0x400E02B4U) /**< \brief (MATRIX) Priority Register B for Slave 6 */ 90 #define REG_MATRIX_PRAS7 (*(RwReg*)0x400E02B8U) /**< \brief (MATRIX) Priority Register A for Slave 7 */ 91 #define REG_MATRIX_PRBS7 (*(RwReg*)0x400E02BCU) /**< \brief (MATRIX) Priority Register B for Slave 7 */ 92 #define REG_MATRIX_PRAS8 (*(RwReg*)0x400E02C0U) /**< \brief (MATRIX) Priority Register A for Slave 8 */ 93 #define REG_MATRIX_PRBS8 (*(RwReg*)0x400E02C4U) /**< \brief (MATRIX) Priority Register B for Slave 8 */ 94 #define REG_MATRIX_PRAS9 (*(RwReg*)0x400E02C8U) /**< \brief (MATRIX) Priority Register A for Slave 9 */ 95 #define REG_MATRIX_PRBS9 (*(RwReg*)0x400E02CCU) /**< \brief (MATRIX) Priority Register B for Slave 9 */ 96 #define REG_MATRIX_PRAS10 (*(RwReg*)0x400E02D0U) /**< \brief (MATRIX) Priority Register A for Slave 10 */ 97 #define REG_MATRIX_PRBS10 (*(RwReg*)0x400E02D4U) /**< \brief (MATRIX) Priority Register B for Slave 10 */ 98 #define REG_MATRIX_PRAS11 (*(RwReg*)0x400E02D8U) /**< \brief (MATRIX) Priority Register A for Slave 11 */ 99 #define REG_MATRIX_PRBS11 (*(RwReg*)0x400E02DCU) /**< \brief (MATRIX) Priority Register B for Slave 11 */ 100 #define REG_MATRIX_PRAS12 (*(RwReg*)0x400E02E0U) /**< \brief (MATRIX) Priority Register A for Slave 12 */ 101 #define REG_MATRIX_PRBS12 (*(RwReg*)0x400E02E4U) /**< \brief (MATRIX) Priority Register B for Slave 12 */ 102 #define REG_MATRIX_PRAS13 (*(RwReg*)0x400E02E8U) /**< \brief (MATRIX) Priority Register A for Slave 13 */ 103 #define REG_MATRIX_PRBS13 (*(RwReg*)0x400E02ECU) /**< \brief (MATRIX) Priority Register B for Slave 13 */ 104 #define REG_MATRIX_PRAS14 (*(RwReg*)0x400E02F0U) /**< \brief (MATRIX) Priority Register A for Slave 14 */ 105 #define REG_MATRIX_PRBS14 (*(RwReg*)0x400E02F4U) /**< \brief (MATRIX) Priority Register B for Slave 14 */ 106 #define REG_MATRIX_PRAS15 (*(RwReg*)0x400E02F8U) /**< \brief (MATRIX) Priority Register A for Slave 15 */ 107 #define REG_MATRIX_PRBS15 (*(RwReg*)0x400E02FCU) /**< \brief (MATRIX) Priority Register B for Slave 15 */ 108 #define REG_MATRIX_MRCR (*(RwReg*)0x400E0300U) /**< \brief (MATRIX) Master Remap Control Register */ 109 #define REG_MATRIX_SFR (*(RwReg*)0x400E0310U) /**< \brief (MATRIX) Special Function Register */ 110 #define REG_MATRIX_WPMR (*(RwReg*)0x400E03E4U) /**< \brief (MATRIX) Write Protect Mode Register */ 111 #define REG_MATRIX_WPSR (*(RoReg*)0x400E03E8U) /**< \brief (MATRIX) Write Protect Status Register */ 112 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 113 114 #endif /* _SAM4E_MATRIX_INSTANCE_ */ 115
