1 /* 2 * Autogenerated file 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h> 8 9 /* 10 * WARNING: this variant has package exception. 11 * 12 * Read datasheet topics related to I/O Multiplexing and Considerations or 13 * Peripheral Signal Multiplexing on I/O Lines for more information. 14 */ 15 16 /* pa0_gpio */ 17 #define PA0_GPIO \ 18 SAM_PINMUX(a, 0, gpio, gpio) 19 20 /* pa0a_pwm_pwmh0 */ 21 #define PA0A_PWM_PWMH0 \ 22 SAM_PINMUX(a, 0, a, periph) 23 24 /* pa0b_tc0_tioa0 */ 25 #define PA0B_TC0_TIOA0 \ 26 SAM_PINMUX(a, 0, b, periph) 27 28 /* pa0x_supc_wkup0 */ 29 #define PA0X_SUPC_WKUP0 \ 30 SAM_PINMUX(a, 0, wkup0, wakeup) 31 32 /* pa1_gpio */ 33 #define PA1_GPIO \ 34 SAM_PINMUX(a, 1, gpio, gpio) 35 36 /* pa1a_pwm_pwmh1 */ 37 #define PA1A_PWM_PWMH1 \ 38 SAM_PINMUX(a, 1, a, periph) 39 40 /* pa1b_tc0_tiob0 */ 41 #define PA1B_TC0_TIOB0 \ 42 SAM_PINMUX(a, 1, b, periph) 43 44 /* pa1x_supc_wkup1 */ 45 #define PA1X_SUPC_WKUP1 \ 46 SAM_PINMUX(a, 1, wkup1, wakeup) 47 48 /* pa2_gpio */ 49 #define PA2_GPIO \ 50 SAM_PINMUX(a, 2, gpio, gpio) 51 52 /* pa2a_pwm_pwmh2 */ 53 #define PA2A_PWM_PWMH2 \ 54 SAM_PINMUX(a, 2, a, periph) 55 56 /* pa2b_usart0_sck */ 57 #define PA2B_USART0_SCK \ 58 SAM_PINMUX(a, 2, b, periph) 59 60 /* pa2c_dacc_datrg */ 61 #define PA2C_DACC_DATRG \ 62 SAM_PINMUX(a, 2, c, periph) 63 64 /* pa2x_supc_wkup2 */ 65 #define PA2X_SUPC_WKUP2 \ 66 SAM_PINMUX(a, 2, wkup2, wakeup) 67 68 /* pa3_gpio */ 69 #define PA3_GPIO \ 70 SAM_PINMUX(a, 3, gpio, gpio) 71 72 /* pa3a_twi0_twd */ 73 #define PA3A_TWI0_TWD \ 74 SAM_PINMUX(a, 3, a, periph) 75 76 /* pa3b_spi_npcs3 */ 77 #define PA3B_SPI_NPCS3 \ 78 SAM_PINMUX(a, 3, b, periph) 79 80 /* pa4_gpio */ 81 #define PA4_GPIO \ 82 SAM_PINMUX(a, 4, gpio, gpio) 83 84 /* pa4a_twi0_twck */ 85 #define PA4A_TWI0_TWCK \ 86 SAM_PINMUX(a, 4, a, periph) 87 88 /* pa4b_tc0_tclk0 */ 89 #define PA4B_TC0_TCLK0 \ 90 SAM_PINMUX(a, 4, b, periph) 91 92 /* pa4x_supc_wkup3 */ 93 #define PA4X_SUPC_WKUP3 \ 94 SAM_PINMUX(a, 4, wkup3, wakeup) 95 96 /* pa5_gpio */ 97 #define PA5_GPIO \ 98 SAM_PINMUX(a, 5, gpio, gpio) 99 100 /* pa5a_usart0_rxd */ 101 #define PA5A_USART0_RXD \ 102 SAM_PINMUX(a, 5, a, periph) 103 104 /* pa5b_spi_npcs3 */ 105 #define PA5B_SPI_NPCS3 \ 106 SAM_PINMUX(a, 5, b, periph) 107 108 /* pa5x_supc_wkup4 */ 109 #define PA5X_SUPC_WKUP4 \ 110 SAM_PINMUX(a, 5, wkup4, wakeup) 111 112 /* pa6_gpio */ 113 #define PA6_GPIO \ 114 SAM_PINMUX(a, 6, gpio, gpio) 115 116 /* pa6a_usart0_txd */ 117 #define PA6A_USART0_TXD \ 118 SAM_PINMUX(a, 6, a, periph) 119 120 /* pa6b_pmc_pck0 */ 121 #define PA6B_PMC_PCK0 \ 122 SAM_PINMUX(a, 6, b, periph) 123 124 /* pa7_gpio */ 125 #define PA7_GPIO \ 126 SAM_PINMUX(a, 7, gpio, gpio) 127 128 /* pa7a_usart0_rts */ 129 #define PA7A_USART0_RTS \ 130 SAM_PINMUX(a, 7, a, periph) 131 132 /* pa7b_pwm_pwmh3 */ 133 #define PA7B_PWM_PWMH3 \ 134 SAM_PINMUX(a, 7, b, periph) 135 136 /* pa7s_supc_xin32 */ 137 #define PA7S_SUPC_XIN32 \ 138 SAM_PINMUX(a, 7, s, system) 139 140 /* pa8_gpio */ 141 #define PA8_GPIO \ 142 SAM_PINMUX(a, 8, gpio, gpio) 143 144 /* pa8a_usart0_cts */ 145 #define PA8A_USART0_CTS \ 146 SAM_PINMUX(a, 8, a, periph) 147 148 /* pa8b_adc_adtrg */ 149 #define PA8B_ADC_ADTRG \ 150 SAM_PINMUX(a, 8, b, periph) 151 152 /* pa8s_supc_xout32 */ 153 #define PA8S_SUPC_XOUT32 \ 154 SAM_PINMUX(a, 8, s, system) 155 156 /* pa8x_supc_wkup5 */ 157 #define PA8X_SUPC_WKUP5 \ 158 SAM_PINMUX(a, 8, wkup5, wakeup) 159 160 /* pa9_gpio */ 161 #define PA9_GPIO \ 162 SAM_PINMUX(a, 9, gpio, gpio) 163 164 /* pa9a_uart0_rxd */ 165 #define PA9A_UART0_RXD \ 166 SAM_PINMUX(a, 9, a, periph) 167 168 /* pa9b_spi_npcs1 */ 169 #define PA9B_SPI_NPCS1 \ 170 SAM_PINMUX(a, 9, b, periph) 171 172 /* pa9c_pwm_pwmfi0 */ 173 #define PA9C_PWM_PWMFI0 \ 174 SAM_PINMUX(a, 9, c, periph) 175 176 /* pa9x_supc_wkup6 */ 177 #define PA9X_SUPC_WKUP6 \ 178 SAM_PINMUX(a, 9, wkup6, wakeup) 179 180 /* pa10_gpio */ 181 #define PA10_GPIO \ 182 SAM_PINMUX(a, 10, gpio, gpio) 183 184 /* pa10a_uart0_txd */ 185 #define PA10A_UART0_TXD \ 186 SAM_PINMUX(a, 10, a, periph) 187 188 /* pa10b_spi_npcs2 */ 189 #define PA10B_SPI_NPCS2 \ 190 SAM_PINMUX(a, 10, b, periph) 191 192 /* pa10c_pwm_pwmfi1 */ 193 #define PA10C_PWM_PWMFI1 \ 194 SAM_PINMUX(a, 10, c, periph) 195 196 /* pa11_gpio */ 197 #define PA11_GPIO \ 198 SAM_PINMUX(a, 11, gpio, gpio) 199 200 /* pa11a_spi_npcs0 */ 201 #define PA11A_SPI_NPCS0 \ 202 SAM_PINMUX(a, 11, a, periph) 203 204 /* pa11b_pwm_pwmh0 */ 205 #define PA11B_PWM_PWMH0 \ 206 SAM_PINMUX(a, 11, b, periph) 207 208 /* pa11x_supc_wkup7 */ 209 #define PA11X_SUPC_WKUP7 \ 210 SAM_PINMUX(a, 11, wkup7, wakeup) 211 212 /* pa12_gpio */ 213 #define PA12_GPIO \ 214 SAM_PINMUX(a, 12, gpio, gpio) 215 216 /* pa12a_spi_miso */ 217 #define PA12A_SPI_MISO \ 218 SAM_PINMUX(a, 12, a, periph) 219 220 /* pa12b_pwm_pwmh1 */ 221 #define PA12B_PWM_PWMH1 \ 222 SAM_PINMUX(a, 12, b, periph) 223 224 /* pa13_gpio */ 225 #define PA13_GPIO \ 226 SAM_PINMUX(a, 13, gpio, gpio) 227 228 /* pa13a_spi_mosi */ 229 #define PA13A_SPI_MOSI \ 230 SAM_PINMUX(a, 13, a, periph) 231 232 /* pa13b_pwm_pwmh2 */ 233 #define PA13B_PWM_PWMH2 \ 234 SAM_PINMUX(a, 13, b, periph) 235 236 /* pa14_gpio */ 237 #define PA14_GPIO \ 238 SAM_PINMUX(a, 14, gpio, gpio) 239 240 /* pa14a_spi_spck */ 241 #define PA14A_SPI_SPCK \ 242 SAM_PINMUX(a, 14, a, periph) 243 244 /* pa14b_pwm_pwmh3 */ 245 #define PA14B_PWM_PWMH3 \ 246 SAM_PINMUX(a, 14, b, periph) 247 248 /* pa14x_supc_wkup8 */ 249 #define PA14X_SUPC_WKUP8 \ 250 SAM_PINMUX(a, 14, wkup8, wakeup) 251 252 /* pa15_gpio */ 253 #define PA15_GPIO \ 254 SAM_PINMUX(a, 15, gpio, gpio) 255 256 /* pa15a_ssc_tf */ 257 #define PA15A_SSC_TF \ 258 SAM_PINMUX(a, 15, a, periph) 259 260 /* pa15b_tc0_tioa1 */ 261 #define PA15B_TC0_TIOA1 \ 262 SAM_PINMUX(a, 15, b, periph) 263 264 /* pa15c_pwm_pwml3 */ 265 #define PA15C_PWM_PWML3 \ 266 SAM_PINMUX(a, 15, c, periph) 267 268 /* pa15x_pio_piodcen1 */ 269 #define PA15X_PIO_PIODCEN1 \ 270 SAM_PINMUX(a, 15, x, extra) 271 272 /* pa15x_supc_wkup14 */ 273 #define PA15X_SUPC_WKUP14 \ 274 SAM_PINMUX(a, 15, wkup14, wakeup) 275 276 /* pa16_gpio */ 277 #define PA16_GPIO \ 278 SAM_PINMUX(a, 16, gpio, gpio) 279 280 /* pa16a_ssc_tk */ 281 #define PA16A_SSC_TK \ 282 SAM_PINMUX(a, 16, a, periph) 283 284 /* pa16b_tc0_tiob1 */ 285 #define PA16B_TC0_TIOB1 \ 286 SAM_PINMUX(a, 16, b, periph) 287 288 /* pa16c_pwm_pwml2 */ 289 #define PA16C_PWM_PWML2 \ 290 SAM_PINMUX(a, 16, c, periph) 291 292 /* pa16x_pio_piodcen2 */ 293 #define PA16X_PIO_PIODCEN2 \ 294 SAM_PINMUX(a, 16, x, extra) 295 296 /* pa16x_supc_wkup15 */ 297 #define PA16X_SUPC_WKUP15 \ 298 SAM_PINMUX(a, 16, wkup15, wakeup) 299 300 /* pa17_gpio */ 301 #define PA17_GPIO \ 302 SAM_PINMUX(a, 17, gpio, gpio) 303 304 /* pa17a_ssc_td */ 305 #define PA17A_SSC_TD \ 306 SAM_PINMUX(a, 17, a, periph) 307 308 /* pa17b_pmc_pck1 */ 309 #define PA17B_PMC_PCK1 \ 310 SAM_PINMUX(a, 17, b, periph) 311 312 /* pa17c_pwm_pwmh3 */ 313 #define PA17C_PWM_PWMH3 \ 314 SAM_PINMUX(a, 17, c, periph) 315 316 /* pa17x_adc_ad0 */ 317 #define PA17X_ADC_AD0 \ 318 SAM_PINMUX(a, 17, x, extra) 319 320 /* pa18_gpio */ 321 #define PA18_GPIO \ 322 SAM_PINMUX(a, 18, gpio, gpio) 323 324 /* pa18a_ssc_rd */ 325 #define PA18A_SSC_RD \ 326 SAM_PINMUX(a, 18, a, periph) 327 328 /* pa18b_pmc_pck2 */ 329 #define PA18B_PMC_PCK2 \ 330 SAM_PINMUX(a, 18, b, periph) 331 332 /* pa18d_pwm_pwmfi2 */ 333 #define PA18D_PWM_PWMFI2 \ 334 SAM_PINMUX(a, 18, d, periph) 335 336 /* pa18x_adc_ad1 */ 337 #define PA18X_ADC_AD1 \ 338 SAM_PINMUX(a, 18, x, extra) 339 340 /* pa19_gpio */ 341 #define PA19_GPIO \ 342 SAM_PINMUX(a, 19, gpio, gpio) 343 344 /* pa19a_ssc_rk */ 345 #define PA19A_SSC_RK \ 346 SAM_PINMUX(a, 19, a, periph) 347 348 /* pa19b_pwm_pwml0 */ 349 #define PA19B_PWM_PWML0 \ 350 SAM_PINMUX(a, 19, b, periph) 351 352 /* pa19x_adc_ad2 */ 353 #define PA19X_ADC_AD2 \ 354 SAM_PINMUX(a, 19, x, extra) 355 356 /* pa19x_supc_wkup9 */ 357 #define PA19X_SUPC_WKUP9 \ 358 SAM_PINMUX(a, 19, wkup9, wakeup) 359 360 /* pa20_gpio */ 361 #define PA20_GPIO \ 362 SAM_PINMUX(a, 20, gpio, gpio) 363 364 /* pa20a_ssc_rf */ 365 #define PA20A_SSC_RF \ 366 SAM_PINMUX(a, 20, a, periph) 367 368 /* pa20b_pwm_pwml1 */ 369 #define PA20B_PWM_PWML1 \ 370 SAM_PINMUX(a, 20, b, periph) 371 372 /* pa20x_adc_ad3 */ 373 #define PA20X_ADC_AD3 \ 374 SAM_PINMUX(a, 20, x, extra) 375 376 /* pa20x_supc_wkup10 */ 377 #define PA20X_SUPC_WKUP10 \ 378 SAM_PINMUX(a, 20, wkup10, wakeup) 379 380 /* pb0_gpio */ 381 #define PB0_GPIO \ 382 SAM_PINMUX(b, 0, gpio, gpio) 383 384 /* pb0a_pwm_pwmh0 */ 385 #define PB0A_PWM_PWMH0 \ 386 SAM_PINMUX(b, 0, a, periph) 387 388 /* pb0x_adc_ad4 */ 389 #define PB0X_ADC_AD4 \ 390 SAM_PINMUX(b, 0, x, extra) 391 392 /* pb0x_rtc_out0 */ 393 #define PB0X_RTC_OUT0 \ 394 SAM_PINMUX(b, 0, x, extra) 395 396 /* pb1_gpio */ 397 #define PB1_GPIO \ 398 SAM_PINMUX(b, 1, gpio, gpio) 399 400 /* pb1a_pwm_pwmh1 */ 401 #define PB1A_PWM_PWMH1 \ 402 SAM_PINMUX(b, 1, a, periph) 403 404 /* pb1x_adc_ad5 */ 405 #define PB1X_ADC_AD5 \ 406 SAM_PINMUX(b, 1, x, extra) 407 408 /* pb1x_rtc_out1 */ 409 #define PB1X_RTC_OUT1 \ 410 SAM_PINMUX(b, 1, x, extra) 411 412 /* pb2_gpio */ 413 #define PB2_GPIO \ 414 SAM_PINMUX(b, 2, gpio, gpio) 415 416 /* pb2a_uart1_rxd */ 417 #define PB2A_UART1_RXD \ 418 SAM_PINMUX(b, 2, a, periph) 419 420 /* pb2b_spi_npcs2 */ 421 #define PB2B_SPI_NPCS2 \ 422 SAM_PINMUX(b, 2, b, periph) 423 424 /* pb2x_adc_ad6 */ 425 #define PB2X_ADC_AD6 \ 426 SAM_PINMUX(b, 2, x, extra) 427 428 /* pb2x_supc_wkup12 */ 429 #define PB2X_SUPC_WKUP12 \ 430 SAM_PINMUX(b, 2, wkup12, wakeup) 431 432 /* pb3_gpio */ 433 #define PB3_GPIO \ 434 SAM_PINMUX(b, 3, gpio, gpio) 435 436 /* pb3a_uart1_txd */ 437 #define PB3A_UART1_TXD \ 438 SAM_PINMUX(b, 3, a, periph) 439 440 /* pb3b_pmc_pck2 */ 441 #define PB3B_PMC_PCK2 \ 442 SAM_PINMUX(b, 3, b, periph) 443 444 /* pb3x_adc_ad7 */ 445 #define PB3X_ADC_AD7 \ 446 SAM_PINMUX(b, 3, x, extra) 447 448 /* pb4_gpio */ 449 #define PB4_GPIO \ 450 SAM_PINMUX(b, 4, gpio, gpio) 451 452 /* pb4a_twi1_twd */ 453 #define PB4A_TWI1_TWD \ 454 SAM_PINMUX(b, 4, a, periph) 455 456 /* pb4b_pwm_pwmh2 */ 457 #define PB4B_PWM_PWMH2 \ 458 SAM_PINMUX(b, 4, b, periph) 459 460 /* pb4s_jtag_tdi */ 461 #define PB4S_JTAG_TDI \ 462 SAM_PINMUX(b, 4, s, system) 463 464 /* pb5_gpio */ 465 #define PB5_GPIO \ 466 SAM_PINMUX(b, 5, gpio, gpio) 467 468 /* pb5a_twi1_twck */ 469 #define PB5A_TWI1_TWCK \ 470 SAM_PINMUX(b, 5, a, periph) 471 472 /* pb5b_pwm_pwml0 */ 473 #define PB5B_PWM_PWML0 \ 474 SAM_PINMUX(b, 5, b, periph) 475 476 /* pb5s_jtag_tdo */ 477 #define PB5S_JTAG_TDO \ 478 SAM_PINMUX(b, 5, s, system) 479 480 /* pb5s_swd_traceswo */ 481 #define PB5S_SWD_TRACESWO \ 482 SAM_PINMUX(b, 5, s, system) 483 484 /* pb5x_supc_wkup13 */ 485 #define PB5X_SUPC_WKUP13 \ 486 SAM_PINMUX(b, 5, wkup13, wakeup) 487 488 /* pb6_gpio */ 489 #define PB6_GPIO \ 490 SAM_PINMUX(b, 6, gpio, gpio) 491 492 /* pb6s_jtag_tms */ 493 #define PB6S_JTAG_TMS \ 494 SAM_PINMUX(b, 6, s, system) 495 496 /* pb6s_swd_swdio */ 497 #define PB6S_SWD_SWDIO \ 498 SAM_PINMUX(b, 6, s, system) 499 500 /* pb7_gpio */ 501 #define PB7_GPIO \ 502 SAM_PINMUX(b, 7, gpio, gpio) 503 504 /* pb7s_jtag_tck */ 505 #define PB7S_JTAG_TCK \ 506 SAM_PINMUX(b, 7, s, system) 507 508 /* pb7s_swd_swclk */ 509 #define PB7S_SWD_SWCLK \ 510 SAM_PINMUX(b, 7, s, system) 511 512 /* pb8_gpio */ 513 #define PB8_GPIO \ 514 SAM_PINMUX(b, 8, gpio, gpio) 515 516 /* pb8s_supc_xout */ 517 #define PB8S_SUPC_XOUT \ 518 SAM_PINMUX(b, 8, s, system) 519 520 /* pb9_gpio */ 521 #define PB9_GPIO \ 522 SAM_PINMUX(b, 9, gpio, gpio) 523 524 /* pb9s_supc_xin */ 525 #define PB9S_SUPC_XIN \ 526 SAM_PINMUX(b, 9, s, system) 527 528 /* pb10_gpio */ 529 #define PB10_GPIO \ 530 SAM_PINMUX(b, 10, gpio, gpio) 531 532 /* pb10s_udp_ddm */ 533 #define PB10S_UDP_DDM \ 534 SAM_PINMUX(b, 10, s, system) 535 536 /* pb11_gpio */ 537 #define PB11_GPIO \ 538 SAM_PINMUX(b, 11, gpio, gpio) 539 540 /* pb11s_udp_ddp */ 541 #define PB11S_UDP_DDP \ 542 SAM_PINMUX(b, 11, s, system) 543 544 /* pb12_gpio */ 545 #define PB12_GPIO \ 546 SAM_PINMUX(b, 12, gpio, gpio) 547 548 /* pb12a_pwm_pwml1 */ 549 #define PB12A_PWM_PWML1 \ 550 SAM_PINMUX(b, 12, a, periph) 551 552 /* pb12s_flash_erase */ 553 #define PB12S_FLASH_ERASE \ 554 SAM_PINMUX(b, 12, s, system) 555
