1 /* 2 * Autogenerated file 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h> 8 9 /* pa0_gpio */ 10 #define PA0_GPIO \ 11 SAM_PINMUX(a, 0, gpio, gpio) 12 13 /* pa0a_pwm_pwmh0 */ 14 #define PA0A_PWM_PWMH0 \ 15 SAM_PINMUX(a, 0, a, periph) 16 17 /* pa0b_tc0_tioa0 */ 18 #define PA0B_TC0_TIOA0 \ 19 SAM_PINMUX(a, 0, b, periph) 20 21 /* pa0x_supc_wkup0 */ 22 #define PA0X_SUPC_WKUP0 \ 23 SAM_PINMUX(a, 0, wkup0, wakeup) 24 25 /* pa1_gpio */ 26 #define PA1_GPIO \ 27 SAM_PINMUX(a, 1, gpio, gpio) 28 29 /* pa1a_pwm_pwmh1 */ 30 #define PA1A_PWM_PWMH1 \ 31 SAM_PINMUX(a, 1, a, periph) 32 33 /* pa1b_tc0_tiob0 */ 34 #define PA1B_TC0_TIOB0 \ 35 SAM_PINMUX(a, 1, b, periph) 36 37 /* pa1x_supc_wkup1 */ 38 #define PA1X_SUPC_WKUP1 \ 39 SAM_PINMUX(a, 1, wkup1, wakeup) 40 41 /* pa2_gpio */ 42 #define PA2_GPIO \ 43 SAM_PINMUX(a, 2, gpio, gpio) 44 45 /* pa2a_pwm_pwmh2 */ 46 #define PA2A_PWM_PWMH2 \ 47 SAM_PINMUX(a, 2, a, periph) 48 49 /* pa2c_dacc_datrg */ 50 #define PA2C_DACC_DATRG \ 51 SAM_PINMUX(a, 2, c, periph) 52 53 /* pa2x_supc_wkup2 */ 54 #define PA2X_SUPC_WKUP2 \ 55 SAM_PINMUX(a, 2, wkup2, wakeup) 56 57 /* pa3_gpio */ 58 #define PA3_GPIO \ 59 SAM_PINMUX(a, 3, gpio, gpio) 60 61 /* pa3a_twi0_twd */ 62 #define PA3A_TWI0_TWD \ 63 SAM_PINMUX(a, 3, a, periph) 64 65 /* pa3b_spi_npcs3 */ 66 #define PA3B_SPI_NPCS3 \ 67 SAM_PINMUX(a, 3, b, periph) 68 69 /* pa4_gpio */ 70 #define PA4_GPIO \ 71 SAM_PINMUX(a, 4, gpio, gpio) 72 73 /* pa4a_twi0_twck */ 74 #define PA4A_TWI0_TWCK \ 75 SAM_PINMUX(a, 4, a, periph) 76 77 /* pa4b_tc0_tclk0 */ 78 #define PA4B_TC0_TCLK0 \ 79 SAM_PINMUX(a, 4, b, periph) 80 81 /* pa4x_supc_wkup3 */ 82 #define PA4X_SUPC_WKUP3 \ 83 SAM_PINMUX(a, 4, wkup3, wakeup) 84 85 /* pa5_gpio */ 86 #define PA5_GPIO \ 87 SAM_PINMUX(a, 5, gpio, gpio) 88 89 /* pa5b_spi_npcs3 */ 90 #define PA5B_SPI_NPCS3 \ 91 SAM_PINMUX(a, 5, b, periph) 92 93 /* pa5c_uart1_rxd */ 94 #define PA5C_UART1_RXD \ 95 SAM_PINMUX(a, 5, c, periph) 96 97 /* pa5x_supc_wkup4 */ 98 #define PA5X_SUPC_WKUP4 \ 99 SAM_PINMUX(a, 5, wkup4, wakeup) 100 101 /* pa6_gpio */ 102 #define PA6_GPIO \ 103 SAM_PINMUX(a, 6, gpio, gpio) 104 105 /* pa6b_pmc_pck0 */ 106 #define PA6B_PMC_PCK0 \ 107 SAM_PINMUX(a, 6, b, periph) 108 109 /* pa6c_uart1_txd */ 110 #define PA6C_UART1_TXD \ 111 SAM_PINMUX(a, 6, c, periph) 112 113 /* pa7_gpio */ 114 #define PA7_GPIO \ 115 SAM_PINMUX(a, 7, gpio, gpio) 116 117 /* pa7b_pwm_pwmh3 */ 118 #define PA7B_PWM_PWMH3 \ 119 SAM_PINMUX(a, 7, b, periph) 120 121 /* pa7s_supc_xin32 */ 122 #define PA7S_SUPC_XIN32 \ 123 SAM_PINMUX(a, 7, s, system) 124 125 /* pa8_gpio */ 126 #define PA8_GPIO \ 127 SAM_PINMUX(a, 8, gpio, gpio) 128 129 /* pa8b_afec0_adtrg */ 130 #define PA8B_AFEC0_ADTRG \ 131 SAM_PINMUX(a, 8, b, periph) 132 133 /* pa8s_supc_xout32 */ 134 #define PA8S_SUPC_XOUT32 \ 135 SAM_PINMUX(a, 8, s, system) 136 137 /* pa8x_supc_wkup5 */ 138 #define PA8X_SUPC_WKUP5 \ 139 SAM_PINMUX(a, 8, wkup5, wakeup) 140 141 /* pa9_gpio */ 142 #define PA9_GPIO \ 143 SAM_PINMUX(a, 9, gpio, gpio) 144 145 /* pa9a_uart0_rxd */ 146 #define PA9A_UART0_RXD \ 147 SAM_PINMUX(a, 9, a, periph) 148 149 /* pa9b_spi_npcs1 */ 150 #define PA9B_SPI_NPCS1 \ 151 SAM_PINMUX(a, 9, b, periph) 152 153 /* pa9c_pwm_pwmfi0 */ 154 #define PA9C_PWM_PWMFI0 \ 155 SAM_PINMUX(a, 9, c, periph) 156 157 /* pa9x_supc_wkup6 */ 158 #define PA9X_SUPC_WKUP6 \ 159 SAM_PINMUX(a, 9, wkup6, wakeup) 160 161 /* pa10_gpio */ 162 #define PA10_GPIO \ 163 SAM_PINMUX(a, 10, gpio, gpio) 164 165 /* pa10a_uart0_txd */ 166 #define PA10A_UART0_TXD \ 167 SAM_PINMUX(a, 10, a, periph) 168 169 /* pa10b_spi_npcs2 */ 170 #define PA10B_SPI_NPCS2 \ 171 SAM_PINMUX(a, 10, b, periph) 172 173 /* pa11_gpio */ 174 #define PA11_GPIO \ 175 SAM_PINMUX(a, 11, gpio, gpio) 176 177 /* pa11a_spi_npcs0 */ 178 #define PA11A_SPI_NPCS0 \ 179 SAM_PINMUX(a, 11, a, periph) 180 181 /* pa11b_pwm_pwmh0 */ 182 #define PA11B_PWM_PWMH0 \ 183 SAM_PINMUX(a, 11, b, periph) 184 185 /* pa11x_supc_wkup7 */ 186 #define PA11X_SUPC_WKUP7 \ 187 SAM_PINMUX(a, 11, wkup7, wakeup) 188 189 /* pa12_gpio */ 190 #define PA12_GPIO \ 191 SAM_PINMUX(a, 12, gpio, gpio) 192 193 /* pa12a_spi_miso */ 194 #define PA12A_SPI_MISO \ 195 SAM_PINMUX(a, 12, a, periph) 196 197 /* pa12b_pwm_pwmh1 */ 198 #define PA12B_PWM_PWMH1 \ 199 SAM_PINMUX(a, 12, b, periph) 200 201 /* pa13_gpio */ 202 #define PA13_GPIO \ 203 SAM_PINMUX(a, 13, gpio, gpio) 204 205 /* pa13a_spi_mosi */ 206 #define PA13A_SPI_MOSI \ 207 SAM_PINMUX(a, 13, a, periph) 208 209 /* pa13b_pwm_pwmh2 */ 210 #define PA13B_PWM_PWMH2 \ 211 SAM_PINMUX(a, 13, b, periph) 212 213 /* pa14_gpio */ 214 #define PA14_GPIO \ 215 SAM_PINMUX(a, 14, gpio, gpio) 216 217 /* pa14a_spi_spck */ 218 #define PA14A_SPI_SPCK \ 219 SAM_PINMUX(a, 14, a, periph) 220 221 /* pa14b_pwm_pwmh3 */ 222 #define PA14B_PWM_PWMH3 \ 223 SAM_PINMUX(a, 14, b, periph) 224 225 /* pa14x_supc_wkup8 */ 226 #define PA14X_SUPC_WKUP8 \ 227 SAM_PINMUX(a, 14, wkup8, wakeup) 228 229 /* pa15_gpio */ 230 #define PA15_GPIO \ 231 SAM_PINMUX(a, 15, gpio, gpio) 232 233 /* pa15b_tc0_tioa1 */ 234 #define PA15B_TC0_TIOA1 \ 235 SAM_PINMUX(a, 15, b, periph) 236 237 /* pa15c_pwm_pwml3 */ 238 #define PA15C_PWM_PWML3 \ 239 SAM_PINMUX(a, 15, c, periph) 240 241 /* pa15x_pio_piodcen1 */ 242 #define PA15X_PIO_PIODCEN1 \ 243 SAM_PINMUX(a, 15, x, extra) 244 245 /* pa15x_supc_wkup14 */ 246 #define PA15X_SUPC_WKUP14 \ 247 SAM_PINMUX(a, 15, wkup14, wakeup) 248 249 /* pa16_gpio */ 250 #define PA16_GPIO \ 251 SAM_PINMUX(a, 16, gpio, gpio) 252 253 /* pa16b_tc0_tiob1 */ 254 #define PA16B_TC0_TIOB1 \ 255 SAM_PINMUX(a, 16, b, periph) 256 257 /* pa16c_pwm_pwml2 */ 258 #define PA16C_PWM_PWML2 \ 259 SAM_PINMUX(a, 16, c, periph) 260 261 /* pa16x_pio_piodcen2 */ 262 #define PA16X_PIO_PIODCEN2 \ 263 SAM_PINMUX(a, 16, x, extra) 264 265 /* pa16x_supc_wkup15 */ 266 #define PA16X_SUPC_WKUP15 \ 267 SAM_PINMUX(a, 16, wkup15, wakeup) 268 269 /* pa17_gpio */ 270 #define PA17_GPIO \ 271 SAM_PINMUX(a, 17, gpio, gpio) 272 273 /* pa17b_pmc_pck1 */ 274 #define PA17B_PMC_PCK1 \ 275 SAM_PINMUX(a, 17, b, periph) 276 277 /* pa17c_pwm_pwmh3 */ 278 #define PA17C_PWM_PWMH3 \ 279 SAM_PINMUX(a, 17, c, periph) 280 281 /* pa17x_afec0_ad0 */ 282 #define PA17X_AFEC0_AD0 \ 283 SAM_PINMUX(a, 17, x, extra) 284 285 /* pa18_gpio */ 286 #define PA18_GPIO \ 287 SAM_PINMUX(a, 18, gpio, gpio) 288 289 /* pa18b_pmc_pck2 */ 290 #define PA18B_PMC_PCK2 \ 291 SAM_PINMUX(a, 18, b, periph) 292 293 /* pa18x_afec0_ad1 */ 294 #define PA18X_AFEC0_AD1 \ 295 SAM_PINMUX(a, 18, x, extra) 296 297 /* pa19_gpio */ 298 #define PA19_GPIO \ 299 SAM_PINMUX(a, 19, gpio, gpio) 300 301 /* pa19b_pwm_pwml0 */ 302 #define PA19B_PWM_PWML0 \ 303 SAM_PINMUX(a, 19, b, periph) 304 305 /* pa19x_afec0_ad2 */ 306 #define PA19X_AFEC0_AD2 \ 307 SAM_PINMUX(a, 19, x, extra) 308 309 /* pa19x_supc_wkup9 */ 310 #define PA19X_SUPC_WKUP9 \ 311 SAM_PINMUX(a, 19, wkup9, wakeup) 312 313 /* pa20_gpio */ 314 #define PA20_GPIO \ 315 SAM_PINMUX(a, 20, gpio, gpio) 316 317 /* pa20b_pwm_pwml1 */ 318 #define PA20B_PWM_PWML1 \ 319 SAM_PINMUX(a, 20, b, periph) 320 321 /* pa20x_afec0_ad3 */ 322 #define PA20X_AFEC0_AD3 \ 323 SAM_PINMUX(a, 20, x, extra) 324 325 /* pa20x_supc_wkup10 */ 326 #define PA20X_SUPC_WKUP10 \ 327 SAM_PINMUX(a, 20, wkup10, wakeup) 328 329 /* pa21_gpio */ 330 #define PA21_GPIO \ 331 SAM_PINMUX(a, 21, gpio, gpio) 332 333 /* pa21a_usart1_rxd */ 334 #define PA21A_USART1_RXD \ 335 SAM_PINMUX(a, 21, a, periph) 336 337 /* pa21b_pmc_pck1 */ 338 #define PA21B_PMC_PCK1 \ 339 SAM_PINMUX(a, 21, b, periph) 340 341 /* pa21x_afec1_ad2 */ 342 #define PA21X_AFEC1_AD2 \ 343 SAM_PINMUX(a, 21, x, extra) 344 345 /* pa22_gpio */ 346 #define PA22_GPIO \ 347 SAM_PINMUX(a, 22, gpio, gpio) 348 349 /* pa22a_usart1_txd */ 350 #define PA22A_USART1_TXD \ 351 SAM_PINMUX(a, 22, a, periph) 352 353 /* pa22b_spi_npcs3 */ 354 #define PA22B_SPI_NPCS3 \ 355 SAM_PINMUX(a, 22, b, periph) 356 357 /* pa22x_afec1_ad3 */ 358 #define PA22X_AFEC1_AD3 \ 359 SAM_PINMUX(a, 22, x, extra) 360 361 /* pa23_gpio */ 362 #define PA23_GPIO \ 363 SAM_PINMUX(a, 23, gpio, gpio) 364 365 /* pa23a_usart1_sck */ 366 #define PA23A_USART1_SCK \ 367 SAM_PINMUX(a, 23, a, periph) 368 369 /* pa23b_pwm_pwmh0 */ 370 #define PA23B_PWM_PWMH0 \ 371 SAM_PINMUX(a, 23, b, periph) 372 373 /* pa23x_pio_piodcclk */ 374 #define PA23X_PIO_PIODCCLK \ 375 SAM_PINMUX(a, 23, x, extra) 376 377 /* pa24_gpio */ 378 #define PA24_GPIO \ 379 SAM_PINMUX(a, 24, gpio, gpio) 380 381 /* pa24a_usart1_rts */ 382 #define PA24A_USART1_RTS \ 383 SAM_PINMUX(a, 24, a, periph) 384 385 /* pa24b_pwm_pwmh1 */ 386 #define PA24B_PWM_PWMH1 \ 387 SAM_PINMUX(a, 24, b, periph) 388 389 /* pa24x_pio_piodc0 */ 390 #define PA24X_PIO_PIODC0 \ 391 SAM_PINMUX(a, 24, x, extra) 392 393 /* pa25_gpio */ 394 #define PA25_GPIO \ 395 SAM_PINMUX(a, 25, gpio, gpio) 396 397 /* pa25a_usart1_cts */ 398 #define PA25A_USART1_CTS \ 399 SAM_PINMUX(a, 25, a, periph) 400 401 /* pa25b_pwm_pwmh2 */ 402 #define PA25B_PWM_PWMH2 \ 403 SAM_PINMUX(a, 25, b, periph) 404 405 /* pa25x_pio_piodc1 */ 406 #define PA25X_PIO_PIODC1 \ 407 SAM_PINMUX(a, 25, x, extra) 408 409 /* pa26_gpio */ 410 #define PA26_GPIO \ 411 SAM_PINMUX(a, 26, gpio, gpio) 412 413 /* pa26a_usart1_dcd */ 414 #define PA26A_USART1_DCD \ 415 SAM_PINMUX(a, 26, a, periph) 416 417 /* pa26b_tc0_tioa2 */ 418 #define PA26B_TC0_TIOA2 \ 419 SAM_PINMUX(a, 26, b, periph) 420 421 /* pa26c_hsmci_mcda2 */ 422 #define PA26C_HSMCI_MCDA2 \ 423 SAM_PINMUX(a, 26, c, periph) 424 425 /* pa26x_pio_piodc2 */ 426 #define PA26X_PIO_PIODC2 \ 427 SAM_PINMUX(a, 26, x, extra) 428 429 /* pa27_gpio */ 430 #define PA27_GPIO \ 431 SAM_PINMUX(a, 27, gpio, gpio) 432 433 /* pa27a_usart1_dtr */ 434 #define PA27A_USART1_DTR \ 435 SAM_PINMUX(a, 27, a, periph) 436 437 /* pa27b_tc0_tiob2 */ 438 #define PA27B_TC0_TIOB2 \ 439 SAM_PINMUX(a, 27, b, periph) 440 441 /* pa27c_hsmci_mcda3 */ 442 #define PA27C_HSMCI_MCDA3 \ 443 SAM_PINMUX(a, 27, c, periph) 444 445 /* pa27x_pio_piodc3 */ 446 #define PA27X_PIO_PIODC3 \ 447 SAM_PINMUX(a, 27, x, extra) 448 449 /* pa28_gpio */ 450 #define PA28_GPIO \ 451 SAM_PINMUX(a, 28, gpio, gpio) 452 453 /* pa28a_usart1_dsr */ 454 #define PA28A_USART1_DSR \ 455 SAM_PINMUX(a, 28, a, periph) 456 457 /* pa28b_tc0_tclk1 */ 458 #define PA28B_TC0_TCLK1 \ 459 SAM_PINMUX(a, 28, b, periph) 460 461 /* pa28c_hsmci_mccda */ 462 #define PA28C_HSMCI_MCCDA \ 463 SAM_PINMUX(a, 28, c, periph) 464 465 /* pa28x_pio_piodc4 */ 466 #define PA28X_PIO_PIODC4 \ 467 SAM_PINMUX(a, 28, x, extra) 468 469 /* pa29_gpio */ 470 #define PA29_GPIO \ 471 SAM_PINMUX(a, 29, gpio, gpio) 472 473 /* pa29a_usart1_ri */ 474 #define PA29A_USART1_RI \ 475 SAM_PINMUX(a, 29, a, periph) 476 477 /* pa29b_tc0_tclk2 */ 478 #define PA29B_TC0_TCLK2 \ 479 SAM_PINMUX(a, 29, b, periph) 480 481 /* pa29c_hsmci_mcck */ 482 #define PA29C_HSMCI_MCCK \ 483 SAM_PINMUX(a, 29, c, periph) 484 485 /* pa29x_pio_piodc5 */ 486 #define PA29X_PIO_PIODC5 \ 487 SAM_PINMUX(a, 29, x, extra) 488 489 /* pa30_gpio */ 490 #define PA30_GPIO \ 491 SAM_PINMUX(a, 30, gpio, gpio) 492 493 /* pa30a_pwm_pwml2 */ 494 #define PA30A_PWM_PWML2 \ 495 SAM_PINMUX(a, 30, a, periph) 496 497 /* pa30b_spi_npcs2 */ 498 #define PA30B_SPI_NPCS2 \ 499 SAM_PINMUX(a, 30, b, periph) 500 501 /* pa30c_hsmci_mcda0 */ 502 #define PA30C_HSMCI_MCDA0 \ 503 SAM_PINMUX(a, 30, c, periph) 504 505 /* pa30x_pio_piodc6 */ 506 #define PA30X_PIO_PIODC6 \ 507 SAM_PINMUX(a, 30, x, extra) 508 509 /* pa30x_supc_wkup11 */ 510 #define PA30X_SUPC_WKUP11 \ 511 SAM_PINMUX(a, 30, wkup11, wakeup) 512 513 /* pa31_gpio */ 514 #define PA31_GPIO \ 515 SAM_PINMUX(a, 31, gpio, gpio) 516 517 /* pa31a_spi_npcs1 */ 518 #define PA31A_SPI_NPCS1 \ 519 SAM_PINMUX(a, 31, a, periph) 520 521 /* pa31b_pmc_pck2 */ 522 #define PA31B_PMC_PCK2 \ 523 SAM_PINMUX(a, 31, b, periph) 524 525 /* pa31c_hsmci_mcda1 */ 526 #define PA31C_HSMCI_MCDA1 \ 527 SAM_PINMUX(a, 31, c, periph) 528 529 /* pa31x_pio_piodc7 */ 530 #define PA31X_PIO_PIODC7 \ 531 SAM_PINMUX(a, 31, x, extra) 532 533 /* pb0_gpio */ 534 #define PB0_GPIO \ 535 SAM_PINMUX(b, 0, gpio, gpio) 536 537 /* pb0a_pwm_pwmh0 */ 538 #define PB0A_PWM_PWMH0 \ 539 SAM_PINMUX(b, 0, a, periph) 540 541 /* pb0c_usart0_rxd */ 542 #define PB0C_USART0_RXD \ 543 SAM_PINMUX(b, 0, c, periph) 544 545 /* pb0x_afec0_ad4 */ 546 #define PB0X_AFEC0_AD4 \ 547 SAM_PINMUX(b, 0, x, extra) 548 549 /* pb0x_rtc_out0 */ 550 #define PB0X_RTC_OUT0 \ 551 SAM_PINMUX(b, 0, x, extra) 552 553 /* pb1_gpio */ 554 #define PB1_GPIO \ 555 SAM_PINMUX(b, 1, gpio, gpio) 556 557 /* pb1a_pwm_pwmh1 */ 558 #define PB1A_PWM_PWMH1 \ 559 SAM_PINMUX(b, 1, a, periph) 560 561 /* pb1c_usart0_txd */ 562 #define PB1C_USART0_TXD \ 563 SAM_PINMUX(b, 1, c, periph) 564 565 /* pb1x_afec0_ad5 */ 566 #define PB1X_AFEC0_AD5 \ 567 SAM_PINMUX(b, 1, x, extra) 568 569 /* pb1x_rtc_out1 */ 570 #define PB1X_RTC_OUT1 \ 571 SAM_PINMUX(b, 1, x, extra) 572 573 /* pb2_gpio */ 574 #define PB2_GPIO \ 575 SAM_PINMUX(b, 2, gpio, gpio) 576 577 /* pb2a_can0_tx */ 578 #define PB2A_CAN0_TX \ 579 SAM_PINMUX(b, 2, a, periph) 580 581 /* pb2b_spi_npcs2 */ 582 #define PB2B_SPI_NPCS2 \ 583 SAM_PINMUX(b, 2, b, periph) 584 585 /* pb2c_usart0_cts */ 586 #define PB2C_USART0_CTS \ 587 SAM_PINMUX(b, 2, c, periph) 588 589 /* pb2x_afec1_ad0 */ 590 #define PB2X_AFEC1_AD0 \ 591 SAM_PINMUX(b, 2, x, extra) 592 593 /* pb2x_supc_wkup12 */ 594 #define PB2X_SUPC_WKUP12 \ 595 SAM_PINMUX(b, 2, wkup12, wakeup) 596 597 /* pb3_gpio */ 598 #define PB3_GPIO \ 599 SAM_PINMUX(b, 3, gpio, gpio) 600 601 /* pb3a_can0_rx */ 602 #define PB3A_CAN0_RX \ 603 SAM_PINMUX(b, 3, a, periph) 604 605 /* pb3b_pmc_pck2 */ 606 #define PB3B_PMC_PCK2 \ 607 SAM_PINMUX(b, 3, b, periph) 608 609 /* pb3c_usart0_rts */ 610 #define PB3C_USART0_RTS \ 611 SAM_PINMUX(b, 3, c, periph) 612 613 /* pb3x_afec1_ad1 */ 614 #define PB3X_AFEC1_AD1 \ 615 SAM_PINMUX(b, 3, x, extra) 616 617 /* pb4_gpio */ 618 #define PB4_GPIO \ 619 SAM_PINMUX(b, 4, gpio, gpio) 620 621 /* pb4a_twi1_twd */ 622 #define PB4A_TWI1_TWD \ 623 SAM_PINMUX(b, 4, a, periph) 624 625 /* pb4b_pwm_pwmh2 */ 626 #define PB4B_PWM_PWMH2 \ 627 SAM_PINMUX(b, 4, b, periph) 628 629 /* pb4s_jtag_tdi */ 630 #define PB4S_JTAG_TDI \ 631 SAM_PINMUX(b, 4, s, system) 632 633 /* pb5_gpio */ 634 #define PB5_GPIO \ 635 SAM_PINMUX(b, 5, gpio, gpio) 636 637 /* pb5a_twi1_twck */ 638 #define PB5A_TWI1_TWCK \ 639 SAM_PINMUX(b, 5, a, periph) 640 641 /* pb5b_pwm_pwml0 */ 642 #define PB5B_PWM_PWML0 \ 643 SAM_PINMUX(b, 5, b, periph) 644 645 /* pb5s_jtag_tdo */ 646 #define PB5S_JTAG_TDO \ 647 SAM_PINMUX(b, 5, s, system) 648 649 /* pb5s_swd_traceswo */ 650 #define PB5S_SWD_TRACESWO \ 651 SAM_PINMUX(b, 5, s, system) 652 653 /* pb5x_supc_wkup13 */ 654 #define PB5X_SUPC_WKUP13 \ 655 SAM_PINMUX(b, 5, wkup13, wakeup) 656 657 /* pb6_gpio */ 658 #define PB6_GPIO \ 659 SAM_PINMUX(b, 6, gpio, gpio) 660 661 /* pb6s_jtag_tms */ 662 #define PB6S_JTAG_TMS \ 663 SAM_PINMUX(b, 6, s, system) 664 665 /* pb6s_swd_swdio */ 666 #define PB6S_SWD_SWDIO \ 667 SAM_PINMUX(b, 6, s, system) 668 669 /* pb7_gpio */ 670 #define PB7_GPIO \ 671 SAM_PINMUX(b, 7, gpio, gpio) 672 673 /* pb7s_jtag_tck */ 674 #define PB7S_JTAG_TCK \ 675 SAM_PINMUX(b, 7, s, system) 676 677 /* pb7s_swd_swclk */ 678 #define PB7S_SWD_SWCLK \ 679 SAM_PINMUX(b, 7, s, system) 680 681 /* pb8_gpio */ 682 #define PB8_GPIO \ 683 SAM_PINMUX(b, 8, gpio, gpio) 684 685 /* pb8s_supc_xout */ 686 #define PB8S_SUPC_XOUT \ 687 SAM_PINMUX(b, 8, s, system) 688 689 /* pb9_gpio */ 690 #define PB9_GPIO \ 691 SAM_PINMUX(b, 9, gpio, gpio) 692 693 /* pb9s_supc_xin */ 694 #define PB9S_SUPC_XIN \ 695 SAM_PINMUX(b, 9, s, system) 696 697 /* pb10_gpio */ 698 #define PB10_GPIO \ 699 SAM_PINMUX(b, 10, gpio, gpio) 700 701 /* pb10s_udp_ddm */ 702 #define PB10S_UDP_DDM \ 703 SAM_PINMUX(b, 10, s, system) 704 705 /* pb11_gpio */ 706 #define PB11_GPIO \ 707 SAM_PINMUX(b, 11, gpio, gpio) 708 709 /* pb11s_udp_ddp */ 710 #define PB11S_UDP_DDP \ 711 SAM_PINMUX(b, 11, s, system) 712 713 /* pb12_gpio */ 714 #define PB12_GPIO \ 715 SAM_PINMUX(b, 12, gpio, gpio) 716 717 /* pb12a_pwm_pwml1 */ 718 #define PB12A_PWM_PWML1 \ 719 SAM_PINMUX(b, 12, a, periph) 720 721 /* pb12s_flash_erase */ 722 #define PB12S_FLASH_ERASE \ 723 SAM_PINMUX(b, 12, s, system) 724 725 /* pb13_gpio */ 726 #define PB13_GPIO \ 727 SAM_PINMUX(b, 13, gpio, gpio) 728 729 /* pb13a_pwm_pwml2 */ 730 #define PB13A_PWM_PWML2 \ 731 SAM_PINMUX(b, 13, a, periph) 732 733 /* pb13b_pcm_pck0 */ 734 #define PB13B_PCM_PCK0 \ 735 SAM_PINMUX(b, 13, b, periph) 736 737 /* pb13c_usart0_sck */ 738 #define PB13C_USART0_SCK \ 739 SAM_PINMUX(b, 13, c, periph) 740 741 /* pb13x_dacc_dac0 */ 742 #define PB13X_DACC_DAC0 \ 743 SAM_PINMUX(b, 13, x, extra) 744 745 /* pb14_gpio */ 746 #define PB14_GPIO \ 747 SAM_PINMUX(b, 14, gpio, gpio) 748 749 /* pb14a_spi_npcs1 */ 750 #define PB14A_SPI_NPCS1 \ 751 SAM_PINMUX(b, 14, a, periph) 752 753 /* pb14b_pwm_pwmh3 */ 754 #define PB14B_PWM_PWMH3 \ 755 SAM_PINMUX(b, 14, b, periph) 756 757 /* pb14x_dacc_dac1 */ 758 #define PB14X_DACC_DAC1 \ 759 SAM_PINMUX(b, 14, x, extra) 760 761 /* pc0_gpio */ 762 #define PC0_GPIO \ 763 SAM_PINMUX(c, 0, gpio, gpio) 764 765 /* pc0b_pwm_pwml0 */ 766 #define PC0B_PWM_PWML0 \ 767 SAM_PINMUX(c, 0, b, periph) 768 769 /* pc0x_afec0_ad14 */ 770 #define PC0X_AFEC0_AD14 \ 771 SAM_PINMUX(c, 0, x, extra) 772 773 /* pc1_gpio */ 774 #define PC1_GPIO \ 775 SAM_PINMUX(c, 1, gpio, gpio) 776 777 /* pc1b_pwm_pwml1 */ 778 #define PC1B_PWM_PWML1 \ 779 SAM_PINMUX(c, 1, b, periph) 780 781 /* pc1x_afec1_ad4 */ 782 #define PC1X_AFEC1_AD4 \ 783 SAM_PINMUX(c, 1, x, extra) 784 785 /* pc2_gpio */ 786 #define PC2_GPIO \ 787 SAM_PINMUX(c, 2, gpio, gpio) 788 789 /* pc2b_pwm_pwml2 */ 790 #define PC2B_PWM_PWML2 \ 791 SAM_PINMUX(c, 2, b, periph) 792 793 /* pc2x_afec1_ad5 */ 794 #define PC2X_AFEC1_AD5 \ 795 SAM_PINMUX(c, 2, x, extra) 796 797 /* pc3_gpio */ 798 #define PC3_GPIO \ 799 SAM_PINMUX(c, 3, gpio, gpio) 800 801 /* pc3b_pwm_pwml3 */ 802 #define PC3B_PWM_PWML3 \ 803 SAM_PINMUX(c, 3, b, periph) 804 805 /* pc3x_afec1_ad6 */ 806 #define PC3X_AFEC1_AD6 \ 807 SAM_PINMUX(c, 3, x, extra) 808 809 /* pc4_gpio */ 810 #define PC4_GPIO \ 811 SAM_PINMUX(c, 4, gpio, gpio) 812 813 /* pc4b_spi_npcs1 */ 814 #define PC4B_SPI_NPCS1 \ 815 SAM_PINMUX(c, 4, b, periph) 816 817 /* pc4x_afec1_ad7 */ 818 #define PC4X_AFEC1_AD7 \ 819 SAM_PINMUX(c, 4, x, extra) 820 821 /* pc5_gpio */ 822 #define PC5_GPIO \ 823 SAM_PINMUX(c, 5, gpio, gpio) 824 825 /* pc5b_tc2_tioa6 */ 826 #define PC5B_TC2_TIOA6 \ 827 SAM_PINMUX(c, 5, b, periph) 828 829 /* pc6_gpio */ 830 #define PC6_GPIO \ 831 SAM_PINMUX(c, 6, gpio, gpio) 832 833 /* pc6b_tc2_tiob6 */ 834 #define PC6B_TC2_TIOB6 \ 835 SAM_PINMUX(c, 6, b, periph) 836 837 /* pc7_gpio */ 838 #define PC7_GPIO \ 839 SAM_PINMUX(c, 7, gpio, gpio) 840 841 /* pc7b_tc2_tclk6 */ 842 #define PC7B_TC2_TCLK6 \ 843 SAM_PINMUX(c, 7, b, periph) 844 845 /* pc8_gpio */ 846 #define PC8_GPIO \ 847 SAM_PINMUX(c, 8, gpio, gpio) 848 849 /* pc8b_tc2_tioa7 */ 850 #define PC8B_TC2_TIOA7 \ 851 SAM_PINMUX(c, 8, b, periph) 852 853 /* pc9_gpio */ 854 #define PC9_GPIO \ 855 SAM_PINMUX(c, 9, gpio, gpio) 856 857 /* pc9b_tc2_tiob7 */ 858 #define PC9B_TC2_TIOB7 \ 859 SAM_PINMUX(c, 9, b, periph) 860 861 /* pc10_gpio */ 862 #define PC10_GPIO \ 863 SAM_PINMUX(c, 10, gpio, gpio) 864 865 /* pc10b_tc2_tclk7 */ 866 #define PC10B_TC2_TCLK7 \ 867 SAM_PINMUX(c, 10, b, periph) 868 869 /* pc11_gpio */ 870 #define PC11_GPIO \ 871 SAM_PINMUX(c, 11, gpio, gpio) 872 873 /* pc11b_tc2_tioa8 */ 874 #define PC11B_TC2_TIOA8 \ 875 SAM_PINMUX(c, 11, b, periph) 876 877 /* pc12_gpio */ 878 #define PC12_GPIO \ 879 SAM_PINMUX(c, 12, gpio, gpio) 880 881 /* pc12b_tc2_tiob8 */ 882 #define PC12B_TC2_TIOB8 \ 883 SAM_PINMUX(c, 12, b, periph) 884 885 /* pc12c_can1_rx */ 886 #define PC12C_CAN1_RX \ 887 SAM_PINMUX(c, 12, c, periph) 888 889 /* pc12x_afec0_ad8 */ 890 #define PC12X_AFEC0_AD8 \ 891 SAM_PINMUX(c, 12, x, extra) 892 893 /* pc13_gpio */ 894 #define PC13_GPIO \ 895 SAM_PINMUX(c, 13, gpio, gpio) 896 897 /* pc13b_pwm_pwml0 */ 898 #define PC13B_PWM_PWML0 \ 899 SAM_PINMUX(c, 13, b, periph) 900 901 /* pc13x_afec0_ad6 */ 902 #define PC13X_AFEC0_AD6 \ 903 SAM_PINMUX(c, 13, x, extra) 904 905 /* pc14_gpio */ 906 #define PC14_GPIO \ 907 SAM_PINMUX(c, 14, gpio, gpio) 908 909 /* pc14b_tc2_tclk8 */ 910 #define PC14B_TC2_TCLK8 \ 911 SAM_PINMUX(c, 14, b, periph) 912 913 /* pc15_gpio */ 914 #define PC15_GPIO \ 915 SAM_PINMUX(c, 15, gpio, gpio) 916 917 /* pc15b_pwm_pwml1 */ 918 #define PC15B_PWM_PWML1 \ 919 SAM_PINMUX(c, 15, b, periph) 920 921 /* pc15c_can1_tx */ 922 #define PC15C_CAN1_TX \ 923 SAM_PINMUX(c, 15, c, periph) 924 925 /* pc15x_afec0_ad7 */ 926 #define PC15X_AFEC0_AD7 \ 927 SAM_PINMUX(c, 15, x, extra) 928 929 /* pc16_gpio */ 930 #define PC16_GPIO \ 931 SAM_PINMUX(c, 16, gpio, gpio) 932 933 /* pc17_gpio */ 934 #define PC17_GPIO \ 935 SAM_PINMUX(c, 17, gpio, gpio) 936 937 /* pc18_gpio */ 938 #define PC18_GPIO \ 939 SAM_PINMUX(c, 18, gpio, gpio) 940 941 /* pc18b_pwm_pwmh0 */ 942 #define PC18B_PWM_PWMH0 \ 943 SAM_PINMUX(c, 18, b, periph) 944 945 /* pc19_gpio */ 946 #define PC19_GPIO \ 947 SAM_PINMUX(c, 19, gpio, gpio) 948 949 /* pc19b_pwm_pwmh1 */ 950 #define PC19B_PWM_PWMH1 \ 951 SAM_PINMUX(c, 19, b, periph) 952 953 /* pc20_gpio */ 954 #define PC20_GPIO \ 955 SAM_PINMUX(c, 20, gpio, gpio) 956 957 /* pc20b_pwm_pwmh2 */ 958 #define PC20B_PWM_PWMH2 \ 959 SAM_PINMUX(c, 20, b, periph) 960 961 /* pc21_gpio */ 962 #define PC21_GPIO \ 963 SAM_PINMUX(c, 21, gpio, gpio) 964 965 /* pc21b_pwm_pwmh3 */ 966 #define PC21B_PWM_PWMH3 \ 967 SAM_PINMUX(c, 21, b, periph) 968 969 /* pc22_gpio */ 970 #define PC22_GPIO \ 971 SAM_PINMUX(c, 22, gpio, gpio) 972 973 /* pc22b_pwm_pwml3 */ 974 #define PC22B_PWM_PWML3 \ 975 SAM_PINMUX(c, 22, b, periph) 976 977 /* pc23_gpio */ 978 #define PC23_GPIO \ 979 SAM_PINMUX(c, 23, gpio, gpio) 980 981 /* pc23b_tc1_tioa3 */ 982 #define PC23B_TC1_TIOA3 \ 983 SAM_PINMUX(c, 23, b, periph) 984 985 /* pc24_gpio */ 986 #define PC24_GPIO \ 987 SAM_PINMUX(c, 24, gpio, gpio) 988 989 /* pc24b_tc1_tiob3 */ 990 #define PC24B_TC1_TIOB3 \ 991 SAM_PINMUX(c, 24, b, periph) 992 993 /* pc25_gpio */ 994 #define PC25_GPIO \ 995 SAM_PINMUX(c, 25, gpio, gpio) 996 997 /* pc25b_tc1_tclk3 */ 998 #define PC25B_TC1_TCLK3 \ 999 SAM_PINMUX(c, 25, b, periph) 1000 1001 /* pc26_gpio */ 1002 #define PC26_GPIO \ 1003 SAM_PINMUX(c, 26, gpio, gpio) 1004 1005 /* pc26b_tc1_tioa4 */ 1006 #define PC26B_TC1_TIOA4 \ 1007 SAM_PINMUX(c, 26, b, periph) 1008 1009 /* pc26x_afec0_ad12 */ 1010 #define PC26X_AFEC0_AD12 \ 1011 SAM_PINMUX(c, 26, x, extra) 1012 1013 /* pc27_gpio */ 1014 #define PC27_GPIO \ 1015 SAM_PINMUX(c, 27, gpio, gpio) 1016 1017 /* pc27b_tc1_tiob4 */ 1018 #define PC27B_TC1_TIOB4 \ 1019 SAM_PINMUX(c, 27, b, periph) 1020 1021 /* pc27x_afec0_ad13 */ 1022 #define PC27X_AFEC0_AD13 \ 1023 SAM_PINMUX(c, 27, x, extra) 1024 1025 /* pc28_gpio */ 1026 #define PC28_GPIO \ 1027 SAM_PINMUX(c, 28, gpio, gpio) 1028 1029 /* pc28b_tc1_tclk4 */ 1030 #define PC28B_TC1_TCLK4 \ 1031 SAM_PINMUX(c, 28, b, periph) 1032 1033 /* pc29_gpio */ 1034 #define PC29_GPIO \ 1035 SAM_PINMUX(c, 29, gpio, gpio) 1036 1037 /* pc29b_tc1_tioa5 */ 1038 #define PC29B_TC1_TIOA5 \ 1039 SAM_PINMUX(c, 29, b, periph) 1040 1041 /* pc29x_afec0_ad9 */ 1042 #define PC29X_AFEC0_AD9 \ 1043 SAM_PINMUX(c, 29, x, extra) 1044 1045 /* pc30_gpio */ 1046 #define PC30_GPIO \ 1047 SAM_PINMUX(c, 30, gpio, gpio) 1048 1049 /* pc30b_tc1_tiob5 */ 1050 #define PC30B_TC1_TIOB5 \ 1051 SAM_PINMUX(c, 30, b, periph) 1052 1053 /* pc30x_afec0_ad10 */ 1054 #define PC30X_AFEC0_AD10 \ 1055 SAM_PINMUX(c, 30, x, extra) 1056 1057 /* pc31_gpio */ 1058 #define PC31_GPIO \ 1059 SAM_PINMUX(c, 31, gpio, gpio) 1060 1061 /* pc31b_tc1_tclk5 */ 1062 #define PC31B_TC1_TCLK5 \ 1063 SAM_PINMUX(c, 31, b, periph) 1064 1065 /* pc31x_afec0_ad11 */ 1066 #define PC31X_AFEC0_AD11 \ 1067 SAM_PINMUX(c, 31, x, extra) 1068 1069 /* pd0_gpio */ 1070 #define PD0_GPIO \ 1071 SAM_PINMUX(d, 0, gpio, gpio) 1072 1073 /* pd0a_gmac_gtxck */ 1074 #define PD0A_GMAC_GTXCK \ 1075 SAM_PINMUX(d, 0, a, periph) 1076 1077 /* pd1_gpio */ 1078 #define PD1_GPIO \ 1079 SAM_PINMUX(d, 1, gpio, gpio) 1080 1081 /* pd1a_gmac_gtxen */ 1082 #define PD1A_GMAC_GTXEN \ 1083 SAM_PINMUX(d, 1, a, periph) 1084 1085 /* pd2_gpio */ 1086 #define PD2_GPIO \ 1087 SAM_PINMUX(d, 2, gpio, gpio) 1088 1089 /* pd2a_gmac_gtx0 */ 1090 #define PD2A_GMAC_GTX0 \ 1091 SAM_PINMUX(d, 2, a, periph) 1092 1093 /* pd3_gpio */ 1094 #define PD3_GPIO \ 1095 SAM_PINMUX(d, 3, gpio, gpio) 1096 1097 /* pd3a_gmac_gtx1 */ 1098 #define PD3A_GMAC_GTX1 \ 1099 SAM_PINMUX(d, 3, a, periph) 1100 1101 /* pd4_gpio */ 1102 #define PD4_GPIO \ 1103 SAM_PINMUX(d, 4, gpio, gpio) 1104 1105 /* pd4a_gmac_grxdv */ 1106 #define PD4A_GMAC_GRXDV \ 1107 SAM_PINMUX(d, 4, a, periph) 1108 1109 /* pd5_gpio */ 1110 #define PD5_GPIO \ 1111 SAM_PINMUX(d, 5, gpio, gpio) 1112 1113 /* pd5a_gmac_grx0 */ 1114 #define PD5A_GMAC_GRX0 \ 1115 SAM_PINMUX(d, 5, a, periph) 1116 1117 /* pd6_gpio */ 1118 #define PD6_GPIO \ 1119 SAM_PINMUX(d, 6, gpio, gpio) 1120 1121 /* pd6a_gmac_grx1 */ 1122 #define PD6A_GMAC_GRX1 \ 1123 SAM_PINMUX(d, 6, a, periph) 1124 1125 /* pd7_gpio */ 1126 #define PD7_GPIO \ 1127 SAM_PINMUX(d, 7, gpio, gpio) 1128 1129 /* pd7a_gmac_grxer */ 1130 #define PD7A_GMAC_GRXER \ 1131 SAM_PINMUX(d, 7, a, periph) 1132 1133 /* pd8_gpio */ 1134 #define PD8_GPIO \ 1135 SAM_PINMUX(d, 8, gpio, gpio) 1136 1137 /* pd8a_gmac_gmdc */ 1138 #define PD8A_GMAC_GMDC \ 1139 SAM_PINMUX(d, 8, a, periph) 1140 1141 /* pd9_gpio */ 1142 #define PD9_GPIO \ 1143 SAM_PINMUX(d, 9, gpio, gpio) 1144 1145 /* pd9a_gmac_gmdio */ 1146 #define PD9A_GMAC_GMDIO \ 1147 SAM_PINMUX(d, 9, a, periph) 1148 1149 /* pd10_gpio */ 1150 #define PD10_GPIO \ 1151 SAM_PINMUX(d, 10, gpio, gpio) 1152 1153 /* pd10a_gmac_gcrs */ 1154 #define PD10A_GMAC_GCRS \ 1155 SAM_PINMUX(d, 10, a, periph) 1156 1157 /* pd11_gpio */ 1158 #define PD11_GPIO \ 1159 SAM_PINMUX(d, 11, gpio, gpio) 1160 1161 /* pd11a_gmac_grx2 */ 1162 #define PD11A_GMAC_GRX2 \ 1163 SAM_PINMUX(d, 11, a, periph) 1164 1165 /* pd12_gpio */ 1166 #define PD12_GPIO \ 1167 SAM_PINMUX(d, 12, gpio, gpio) 1168 1169 /* pd12a_gmac_grx3 */ 1170 #define PD12A_GMAC_GRX3 \ 1171 SAM_PINMUX(d, 12, a, periph) 1172 1173 /* pd13_gpio */ 1174 #define PD13_GPIO \ 1175 SAM_PINMUX(d, 13, gpio, gpio) 1176 1177 /* pd13a_gmac_gcol */ 1178 #define PD13A_GMAC_GCOL \ 1179 SAM_PINMUX(d, 13, a, periph) 1180 1181 /* pd14_gpio */ 1182 #define PD14_GPIO \ 1183 SAM_PINMUX(d, 14, gpio, gpio) 1184 1185 /* pd14a_gmac_grxck */ 1186 #define PD14A_GMAC_GRXCK \ 1187 SAM_PINMUX(d, 14, a, periph) 1188 1189 /* pd15_gpio */ 1190 #define PD15_GPIO \ 1191 SAM_PINMUX(d, 15, gpio, gpio) 1192 1193 /* pd15a_gmac_gtx2 */ 1194 #define PD15A_GMAC_GTX2 \ 1195 SAM_PINMUX(d, 15, a, periph) 1196 1197 /* pd16_gpio */ 1198 #define PD16_GPIO \ 1199 SAM_PINMUX(d, 16, gpio, gpio) 1200 1201 /* pd16a_gmac_gtx3 */ 1202 #define PD16A_GMAC_GTX3 \ 1203 SAM_PINMUX(d, 16, a, periph) 1204 1205 /* pd17_gpio */ 1206 #define PD17_GPIO \ 1207 SAM_PINMUX(d, 17, gpio, gpio) 1208 1209 /* pd17a_gmac_gtxer */ 1210 #define PD17A_GMAC_GTXER \ 1211 SAM_PINMUX(d, 17, a, periph) 1212 1213 /* pd18_gpio */ 1214 #define PD18_GPIO \ 1215 SAM_PINMUX(d, 18, gpio, gpio) 1216 1217 /* pd19_gpio */ 1218 #define PD19_GPIO \ 1219 SAM_PINMUX(d, 19, gpio, gpio) 1220 1221 /* pd20_gpio */ 1222 #define PD20_GPIO \ 1223 SAM_PINMUX(d, 20, gpio, gpio) 1224 1225 /* pd20a_pwm_pwmh0 */ 1226 #define PD20A_PWM_PWMH0 \ 1227 SAM_PINMUX(d, 20, a, periph) 1228 1229 /* pd21_gpio */ 1230 #define PD21_GPIO \ 1231 SAM_PINMUX(d, 21, gpio, gpio) 1232 1233 /* pd21a_pwm_pwmh1 */ 1234 #define PD21A_PWM_PWMH1 \ 1235 SAM_PINMUX(d, 21, a, periph) 1236 1237 /* pd22_gpio */ 1238 #define PD22_GPIO \ 1239 SAM_PINMUX(d, 22, gpio, gpio) 1240 1241 /* pd22a_pwm_pwmh2 */ 1242 #define PD22A_PWM_PWMH2 \ 1243 SAM_PINMUX(d, 22, a, periph) 1244 1245 /* pd23_gpio */ 1246 #define PD23_GPIO \ 1247 SAM_PINMUX(d, 23, gpio, gpio) 1248 1249 /* pd23a_pwm_pwmh3 */ 1250 #define PD23A_PWM_PWMH3 \ 1251 SAM_PINMUX(d, 23, a, periph) 1252 1253 /* pd24_gpio */ 1254 #define PD24_GPIO \ 1255 SAM_PINMUX(d, 24, gpio, gpio) 1256 1257 /* pd24a_pwm_pwml0 */ 1258 #define PD24A_PWM_PWML0 \ 1259 SAM_PINMUX(d, 24, a, periph) 1260 1261 /* pd25_gpio */ 1262 #define PD25_GPIO \ 1263 SAM_PINMUX(d, 25, gpio, gpio) 1264 1265 /* pd25a_pwm_pwml1 */ 1266 #define PD25A_PWM_PWML1 \ 1267 SAM_PINMUX(d, 25, a, periph) 1268 1269 /* pd26_gpio */ 1270 #define PD26_GPIO \ 1271 SAM_PINMUX(d, 26, gpio, gpio) 1272 1273 /* pd26a_pwm_pwml2 */ 1274 #define PD26A_PWM_PWML2 \ 1275 SAM_PINMUX(d, 26, a, periph) 1276 1277 /* pd27_gpio */ 1278 #define PD27_GPIO \ 1279 SAM_PINMUX(d, 27, gpio, gpio) 1280 1281 /* pd27a_pwm_pwml3 */ 1282 #define PD27A_PWM_PWML3 \ 1283 SAM_PINMUX(d, 27, a, periph) 1284 1285 /* pd28_gpio */ 1286 #define PD28_GPIO \ 1287 SAM_PINMUX(d, 28, gpio, gpio) 1288 1289 /* pd29_gpio */ 1290 #define PD29_GPIO \ 1291 SAM_PINMUX(d, 29, gpio, gpio) 1292 1293 /* pd30_gpio */ 1294 #define PD30_GPIO \ 1295 SAM_PINMUX(d, 30, gpio, gpio) 1296 1297 /* pd31_gpio */ 1298 #define PD31_GPIO \ 1299 SAM_PINMUX(d, 31, gpio, gpio) 1300
