1 /** 2 * \file 3 * 4 * \brief Component description for AC 5 * 6 * Copyright (c) 2018 Microchip Technology Inc. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); you may 15 * not use this file except in compliance with the License. 16 * You may obtain a copy of the Licence at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 * \asf_license_stop 27 * 28 */ 29 30 #ifndef _SAMC21_AC_COMPONENT_ 31 #define _SAMC21_AC_COMPONENT_ 32 33 /* ========================================================================== */ 34 /** SOFTWARE API DEFINITION FOR AC */ 35 /* ========================================================================== */ 36 /** \addtogroup SAMC21_AC Analog Comparators */ 37 /*@{*/ 38 39 #define AC_U2245 40 #define REV_AC 0x111 41 42 /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */ 43 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 44 typedef union { 45 struct { 46 uint8_t SWRST:1; /*!< bit: 0 Software Reset */ 47 uint8_t ENABLE:1; /*!< bit: 1 Enable */ 48 uint8_t :6; /*!< bit: 2.. 7 Reserved */ 49 } bit; /*!< Structure used for bit access */ 50 uint8_t reg; /*!< Type used for register access */ 51 } AC_CTRLA_Type; 52 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 53 54 #define AC_CTRLA_OFFSET 0x00 /**< \brief (AC_CTRLA offset) Control A */ 55 #define AC_CTRLA_RESETVALUE _U_(0x00) /**< \brief (AC_CTRLA reset_value) Control A */ 56 57 #define AC_CTRLA_SWRST_Pos 0 /**< \brief (AC_CTRLA) Software Reset */ 58 #define AC_CTRLA_SWRST (_U_(0x1) << AC_CTRLA_SWRST_Pos) 59 #define AC_CTRLA_ENABLE_Pos 1 /**< \brief (AC_CTRLA) Enable */ 60 #define AC_CTRLA_ENABLE (_U_(0x1) << AC_CTRLA_ENABLE_Pos) 61 #define AC_CTRLA_MASK _U_(0x03) /**< \brief (AC_CTRLA) MASK Register */ 62 63 /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */ 64 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 65 typedef union { 66 struct { 67 uint8_t START0:1; /*!< bit: 0 Comparator 0 Start Comparison */ 68 uint8_t START1:1; /*!< bit: 1 Comparator 1 Start Comparison */ 69 uint8_t START2:1; /*!< bit: 2 Comparator 2 Start Comparison */ 70 uint8_t START3:1; /*!< bit: 3 Comparator 3 Start Comparison */ 71 uint8_t :4; /*!< bit: 4.. 7 Reserved */ 72 } bit; /*!< Structure used for bit access */ 73 struct { 74 uint8_t START:4; /*!< bit: 0.. 3 Comparator x Start Comparison */ 75 uint8_t :4; /*!< bit: 4.. 7 Reserved */ 76 } vec; /*!< Structure used for vec access */ 77 uint8_t reg; /*!< Type used for register access */ 78 } AC_CTRLB_Type; 79 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 80 81 #define AC_CTRLB_OFFSET 0x01 /**< \brief (AC_CTRLB offset) Control B */ 82 #define AC_CTRLB_RESETVALUE _U_(0x00) /**< \brief (AC_CTRLB reset_value) Control B */ 83 84 #define AC_CTRLB_START0_Pos 0 /**< \brief (AC_CTRLB) Comparator 0 Start Comparison */ 85 #define AC_CTRLB_START0 (_U_(1) << AC_CTRLB_START0_Pos) 86 #define AC_CTRLB_START1_Pos 1 /**< \brief (AC_CTRLB) Comparator 1 Start Comparison */ 87 #define AC_CTRLB_START1 (_U_(1) << AC_CTRLB_START1_Pos) 88 #define AC_CTRLB_START2_Pos 2 /**< \brief (AC_CTRLB) Comparator 2 Start Comparison */ 89 #define AC_CTRLB_START2 (_U_(1) << AC_CTRLB_START2_Pos) 90 #define AC_CTRLB_START3_Pos 3 /**< \brief (AC_CTRLB) Comparator 3 Start Comparison */ 91 #define AC_CTRLB_START3 (_U_(1) << AC_CTRLB_START3_Pos) 92 #define AC_CTRLB_START_Pos 0 /**< \brief (AC_CTRLB) Comparator x Start Comparison */ 93 #define AC_CTRLB_START_Msk (_U_(0xF) << AC_CTRLB_START_Pos) 94 #define AC_CTRLB_START(value) (AC_CTRLB_START_Msk & ((value) << AC_CTRLB_START_Pos)) 95 #define AC_CTRLB_MASK _U_(0x0F) /**< \brief (AC_CTRLB) MASK Register */ 96 97 /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */ 98 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 99 typedef union { 100 struct { 101 uint16_t COMPEO0:1; /*!< bit: 0 Comparator 0 Event Output Enable */ 102 uint16_t COMPEO1:1; /*!< bit: 1 Comparator 1 Event Output Enable */ 103 uint16_t COMPEO2:1; /*!< bit: 2 Comparator 2 Event Output Enable */ 104 uint16_t COMPEO3:1; /*!< bit: 3 Comparator 3 Event Output Enable */ 105 uint16_t WINEO0:1; /*!< bit: 4 Window 0 Event Output Enable */ 106 uint16_t WINEO1:1; /*!< bit: 5 Window 1 Event Output Enable */ 107 uint16_t :2; /*!< bit: 6.. 7 Reserved */ 108 uint16_t COMPEI0:1; /*!< bit: 8 Comparator 0 Event Input Enable */ 109 uint16_t COMPEI1:1; /*!< bit: 9 Comparator 1 Event Input Enable */ 110 uint16_t COMPEI2:1; /*!< bit: 10 Comparator 2 Event Input Enable */ 111 uint16_t COMPEI3:1; /*!< bit: 11 Comparator 3 Event Input Enable */ 112 uint16_t INVEI0:1; /*!< bit: 12 Comparator 0 Input Event Invert Enable */ 113 uint16_t INVEI1:1; /*!< bit: 13 Comparator 1 Input Event Invert Enable */ 114 uint16_t INVEI2:1; /*!< bit: 14 Comparator 2 Input Event Invert Enable */ 115 uint16_t INVEI3:1; /*!< bit: 15 Comparator 3 Input Event Invert Enable */ 116 } bit; /*!< Structure used for bit access */ 117 struct { 118 uint16_t COMPEO:4; /*!< bit: 0.. 3 Comparator x Event Output Enable */ 119 uint16_t WINEO:2; /*!< bit: 4.. 5 Window x Event Output Enable */ 120 uint16_t :2; /*!< bit: 6.. 7 Reserved */ 121 uint16_t COMPEI:4; /*!< bit: 8..11 Comparator x Event Input Enable */ 122 uint16_t INVEI:4; /*!< bit: 12..15 Comparator x Input Event Invert Enable */ 123 } vec; /*!< Structure used for vec access */ 124 uint16_t reg; /*!< Type used for register access */ 125 } AC_EVCTRL_Type; 126 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 127 128 #define AC_EVCTRL_OFFSET 0x02 /**< \brief (AC_EVCTRL offset) Event Control */ 129 #define AC_EVCTRL_RESETVALUE _U_(0x0000) /**< \brief (AC_EVCTRL reset_value) Event Control */ 130 131 #define AC_EVCTRL_COMPEO0_Pos 0 /**< \brief (AC_EVCTRL) Comparator 0 Event Output Enable */ 132 #define AC_EVCTRL_COMPEO0 (_U_(1) << AC_EVCTRL_COMPEO0_Pos) 133 #define AC_EVCTRL_COMPEO1_Pos 1 /**< \brief (AC_EVCTRL) Comparator 1 Event Output Enable */ 134 #define AC_EVCTRL_COMPEO1 (_U_(1) << AC_EVCTRL_COMPEO1_Pos) 135 #define AC_EVCTRL_COMPEO2_Pos 2 /**< \brief (AC_EVCTRL) Comparator 2 Event Output Enable */ 136 #define AC_EVCTRL_COMPEO2 (_U_(1) << AC_EVCTRL_COMPEO2_Pos) 137 #define AC_EVCTRL_COMPEO3_Pos 3 /**< \brief (AC_EVCTRL) Comparator 3 Event Output Enable */ 138 #define AC_EVCTRL_COMPEO3 (_U_(1) << AC_EVCTRL_COMPEO3_Pos) 139 #define AC_EVCTRL_COMPEO_Pos 0 /**< \brief (AC_EVCTRL) Comparator x Event Output Enable */ 140 #define AC_EVCTRL_COMPEO_Msk (_U_(0xF) << AC_EVCTRL_COMPEO_Pos) 141 #define AC_EVCTRL_COMPEO(value) (AC_EVCTRL_COMPEO_Msk & ((value) << AC_EVCTRL_COMPEO_Pos)) 142 #define AC_EVCTRL_WINEO0_Pos 4 /**< \brief (AC_EVCTRL) Window 0 Event Output Enable */ 143 #define AC_EVCTRL_WINEO0 (_U_(1) << AC_EVCTRL_WINEO0_Pos) 144 #define AC_EVCTRL_WINEO1_Pos 5 /**< \brief (AC_EVCTRL) Window 1 Event Output Enable */ 145 #define AC_EVCTRL_WINEO1 (_U_(1) << AC_EVCTRL_WINEO1_Pos) 146 #define AC_EVCTRL_WINEO_Pos 4 /**< \brief (AC_EVCTRL) Window x Event Output Enable */ 147 #define AC_EVCTRL_WINEO_Msk (_U_(0x3) << AC_EVCTRL_WINEO_Pos) 148 #define AC_EVCTRL_WINEO(value) (AC_EVCTRL_WINEO_Msk & ((value) << AC_EVCTRL_WINEO_Pos)) 149 #define AC_EVCTRL_COMPEI0_Pos 8 /**< \brief (AC_EVCTRL) Comparator 0 Event Input Enable */ 150 #define AC_EVCTRL_COMPEI0 (_U_(1) << AC_EVCTRL_COMPEI0_Pos) 151 #define AC_EVCTRL_COMPEI1_Pos 9 /**< \brief (AC_EVCTRL) Comparator 1 Event Input Enable */ 152 #define AC_EVCTRL_COMPEI1 (_U_(1) << AC_EVCTRL_COMPEI1_Pos) 153 #define AC_EVCTRL_COMPEI2_Pos 10 /**< \brief (AC_EVCTRL) Comparator 2 Event Input Enable */ 154 #define AC_EVCTRL_COMPEI2 (_U_(1) << AC_EVCTRL_COMPEI2_Pos) 155 #define AC_EVCTRL_COMPEI3_Pos 11 /**< \brief (AC_EVCTRL) Comparator 3 Event Input Enable */ 156 #define AC_EVCTRL_COMPEI3 (_U_(1) << AC_EVCTRL_COMPEI3_Pos) 157 #define AC_EVCTRL_COMPEI_Pos 8 /**< \brief (AC_EVCTRL) Comparator x Event Input Enable */ 158 #define AC_EVCTRL_COMPEI_Msk (_U_(0xF) << AC_EVCTRL_COMPEI_Pos) 159 #define AC_EVCTRL_COMPEI(value) (AC_EVCTRL_COMPEI_Msk & ((value) << AC_EVCTRL_COMPEI_Pos)) 160 #define AC_EVCTRL_INVEI0_Pos 12 /**< \brief (AC_EVCTRL) Comparator 0 Input Event Invert Enable */ 161 #define AC_EVCTRL_INVEI0 (_U_(1) << AC_EVCTRL_INVEI0_Pos) 162 #define AC_EVCTRL_INVEI1_Pos 13 /**< \brief (AC_EVCTRL) Comparator 1 Input Event Invert Enable */ 163 #define AC_EVCTRL_INVEI1 (_U_(1) << AC_EVCTRL_INVEI1_Pos) 164 #define AC_EVCTRL_INVEI2_Pos 14 /**< \brief (AC_EVCTRL) Comparator 2 Input Event Invert Enable */ 165 #define AC_EVCTRL_INVEI2 (_U_(1) << AC_EVCTRL_INVEI2_Pos) 166 #define AC_EVCTRL_INVEI3_Pos 15 /**< \brief (AC_EVCTRL) Comparator 3 Input Event Invert Enable */ 167 #define AC_EVCTRL_INVEI3 (_U_(1) << AC_EVCTRL_INVEI3_Pos) 168 #define AC_EVCTRL_INVEI_Pos 12 /**< \brief (AC_EVCTRL) Comparator x Input Event Invert Enable */ 169 #define AC_EVCTRL_INVEI_Msk (_U_(0xF) << AC_EVCTRL_INVEI_Pos) 170 #define AC_EVCTRL_INVEI(value) (AC_EVCTRL_INVEI_Msk & ((value) << AC_EVCTRL_INVEI_Pos)) 171 #define AC_EVCTRL_MASK _U_(0xFF3F) /**< \brief (AC_EVCTRL) MASK Register */ 172 173 /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */ 174 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 175 typedef union { 176 struct { 177 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ 178 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ 179 uint8_t COMP2:1; /*!< bit: 2 Comparator 2 Interrupt Enable */ 180 uint8_t COMP3:1; /*!< bit: 3 Comparator 3 Interrupt Enable */ 181 uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ 182 uint8_t WIN1:1; /*!< bit: 5 Window 1 Interrupt Enable */ 183 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 184 } bit; /*!< Structure used for bit access */ 185 struct { 186 uint8_t COMP:4; /*!< bit: 0.. 3 Comparator x Interrupt Enable */ 187 uint8_t WIN:2; /*!< bit: 4.. 5 Window x Interrupt Enable */ 188 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 189 } vec; /*!< Structure used for vec access */ 190 uint8_t reg; /*!< Type used for register access */ 191 } AC_INTENCLR_Type; 192 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 193 194 #define AC_INTENCLR_OFFSET 0x04 /**< \brief (AC_INTENCLR offset) Interrupt Enable Clear */ 195 #define AC_INTENCLR_RESETVALUE _U_(0x00) /**< \brief (AC_INTENCLR reset_value) Interrupt Enable Clear */ 196 197 #define AC_INTENCLR_COMP0_Pos 0 /**< \brief (AC_INTENCLR) Comparator 0 Interrupt Enable */ 198 #define AC_INTENCLR_COMP0 (_U_(1) << AC_INTENCLR_COMP0_Pos) 199 #define AC_INTENCLR_COMP1_Pos 1 /**< \brief (AC_INTENCLR) Comparator 1 Interrupt Enable */ 200 #define AC_INTENCLR_COMP1 (_U_(1) << AC_INTENCLR_COMP1_Pos) 201 #define AC_INTENCLR_COMP2_Pos 2 /**< \brief (AC_INTENCLR) Comparator 2 Interrupt Enable */ 202 #define AC_INTENCLR_COMP2 (_U_(1) << AC_INTENCLR_COMP2_Pos) 203 #define AC_INTENCLR_COMP3_Pos 3 /**< \brief (AC_INTENCLR) Comparator 3 Interrupt Enable */ 204 #define AC_INTENCLR_COMP3 (_U_(1) << AC_INTENCLR_COMP3_Pos) 205 #define AC_INTENCLR_COMP_Pos 0 /**< \brief (AC_INTENCLR) Comparator x Interrupt Enable */ 206 #define AC_INTENCLR_COMP_Msk (_U_(0xF) << AC_INTENCLR_COMP_Pos) 207 #define AC_INTENCLR_COMP(value) (AC_INTENCLR_COMP_Msk & ((value) << AC_INTENCLR_COMP_Pos)) 208 #define AC_INTENCLR_WIN0_Pos 4 /**< \brief (AC_INTENCLR) Window 0 Interrupt Enable */ 209 #define AC_INTENCLR_WIN0 (_U_(1) << AC_INTENCLR_WIN0_Pos) 210 #define AC_INTENCLR_WIN1_Pos 5 /**< \brief (AC_INTENCLR) Window 1 Interrupt Enable */ 211 #define AC_INTENCLR_WIN1 (_U_(1) << AC_INTENCLR_WIN1_Pos) 212 #define AC_INTENCLR_WIN_Pos 4 /**< \brief (AC_INTENCLR) Window x Interrupt Enable */ 213 #define AC_INTENCLR_WIN_Msk (_U_(0x3) << AC_INTENCLR_WIN_Pos) 214 #define AC_INTENCLR_WIN(value) (AC_INTENCLR_WIN_Msk & ((value) << AC_INTENCLR_WIN_Pos)) 215 #define AC_INTENCLR_MASK _U_(0x3F) /**< \brief (AC_INTENCLR) MASK Register */ 216 217 /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */ 218 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 219 typedef union { 220 struct { 221 uint8_t COMP0:1; /*!< bit: 0 Comparator 0 Interrupt Enable */ 222 uint8_t COMP1:1; /*!< bit: 1 Comparator 1 Interrupt Enable */ 223 uint8_t COMP2:1; /*!< bit: 2 Comparator 2 Interrupt Enable */ 224 uint8_t COMP3:1; /*!< bit: 3 Comparator 3 Interrupt Enable */ 225 uint8_t WIN0:1; /*!< bit: 4 Window 0 Interrupt Enable */ 226 uint8_t WIN1:1; /*!< bit: 5 Window 1 Interrupt Enable */ 227 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 228 } bit; /*!< Structure used for bit access */ 229 struct { 230 uint8_t COMP:4; /*!< bit: 0.. 3 Comparator x Interrupt Enable */ 231 uint8_t WIN:2; /*!< bit: 4.. 5 Window x Interrupt Enable */ 232 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 233 } vec; /*!< Structure used for vec access */ 234 uint8_t reg; /*!< Type used for register access */ 235 } AC_INTENSET_Type; 236 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 237 238 #define AC_INTENSET_OFFSET 0x05 /**< \brief (AC_INTENSET offset) Interrupt Enable Set */ 239 #define AC_INTENSET_RESETVALUE _U_(0x00) /**< \brief (AC_INTENSET reset_value) Interrupt Enable Set */ 240 241 #define AC_INTENSET_COMP0_Pos 0 /**< \brief (AC_INTENSET) Comparator 0 Interrupt Enable */ 242 #define AC_INTENSET_COMP0 (_U_(1) << AC_INTENSET_COMP0_Pos) 243 #define AC_INTENSET_COMP1_Pos 1 /**< \brief (AC_INTENSET) Comparator 1 Interrupt Enable */ 244 #define AC_INTENSET_COMP1 (_U_(1) << AC_INTENSET_COMP1_Pos) 245 #define AC_INTENSET_COMP2_Pos 2 /**< \brief (AC_INTENSET) Comparator 2 Interrupt Enable */ 246 #define AC_INTENSET_COMP2 (_U_(1) << AC_INTENSET_COMP2_Pos) 247 #define AC_INTENSET_COMP3_Pos 3 /**< \brief (AC_INTENSET) Comparator 3 Interrupt Enable */ 248 #define AC_INTENSET_COMP3 (_U_(1) << AC_INTENSET_COMP3_Pos) 249 #define AC_INTENSET_COMP_Pos 0 /**< \brief (AC_INTENSET) Comparator x Interrupt Enable */ 250 #define AC_INTENSET_COMP_Msk (_U_(0xF) << AC_INTENSET_COMP_Pos) 251 #define AC_INTENSET_COMP(value) (AC_INTENSET_COMP_Msk & ((value) << AC_INTENSET_COMP_Pos)) 252 #define AC_INTENSET_WIN0_Pos 4 /**< \brief (AC_INTENSET) Window 0 Interrupt Enable */ 253 #define AC_INTENSET_WIN0 (_U_(1) << AC_INTENSET_WIN0_Pos) 254 #define AC_INTENSET_WIN1_Pos 5 /**< \brief (AC_INTENSET) Window 1 Interrupt Enable */ 255 #define AC_INTENSET_WIN1 (_U_(1) << AC_INTENSET_WIN1_Pos) 256 #define AC_INTENSET_WIN_Pos 4 /**< \brief (AC_INTENSET) Window x Interrupt Enable */ 257 #define AC_INTENSET_WIN_Msk (_U_(0x3) << AC_INTENSET_WIN_Pos) 258 #define AC_INTENSET_WIN(value) (AC_INTENSET_WIN_Msk & ((value) << AC_INTENSET_WIN_Pos)) 259 #define AC_INTENSET_MASK _U_(0x3F) /**< \brief (AC_INTENSET) MASK Register */ 260 261 /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */ 262 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 263 typedef union { // __I to avoid read-modify-write on write-to-clear register 264 struct { 265 __I uint8_t COMP0:1; /*!< bit: 0 Comparator 0 */ 266 __I uint8_t COMP1:1; /*!< bit: 1 Comparator 1 */ 267 __I uint8_t COMP2:1; /*!< bit: 2 Comparator 2 */ 268 __I uint8_t COMP3:1; /*!< bit: 3 Comparator 3 */ 269 __I uint8_t WIN0:1; /*!< bit: 4 Window 0 */ 270 __I uint8_t WIN1:1; /*!< bit: 5 Window 1 */ 271 __I uint8_t :2; /*!< bit: 6.. 7 Reserved */ 272 } bit; /*!< Structure used for bit access */ 273 struct { 274 __I uint8_t COMP:4; /*!< bit: 0.. 3 Comparator x */ 275 __I uint8_t WIN:2; /*!< bit: 4.. 5 Window x */ 276 __I uint8_t :2; /*!< bit: 6.. 7 Reserved */ 277 } vec; /*!< Structure used for vec access */ 278 uint8_t reg; /*!< Type used for register access */ 279 } AC_INTFLAG_Type; 280 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 281 282 #define AC_INTFLAG_OFFSET 0x06 /**< \brief (AC_INTFLAG offset) Interrupt Flag Status and Clear */ 283 #define AC_INTFLAG_RESETVALUE _U_(0x00) /**< \brief (AC_INTFLAG reset_value) Interrupt Flag Status and Clear */ 284 285 #define AC_INTFLAG_COMP0_Pos 0 /**< \brief (AC_INTFLAG) Comparator 0 */ 286 #define AC_INTFLAG_COMP0 (_U_(1) << AC_INTFLAG_COMP0_Pos) 287 #define AC_INTFLAG_COMP1_Pos 1 /**< \brief (AC_INTFLAG) Comparator 1 */ 288 #define AC_INTFLAG_COMP1 (_U_(1) << AC_INTFLAG_COMP1_Pos) 289 #define AC_INTFLAG_COMP2_Pos 2 /**< \brief (AC_INTFLAG) Comparator 2 */ 290 #define AC_INTFLAG_COMP2 (_U_(1) << AC_INTFLAG_COMP2_Pos) 291 #define AC_INTFLAG_COMP3_Pos 3 /**< \brief (AC_INTFLAG) Comparator 3 */ 292 #define AC_INTFLAG_COMP3 (_U_(1) << AC_INTFLAG_COMP3_Pos) 293 #define AC_INTFLAG_COMP_Pos 0 /**< \brief (AC_INTFLAG) Comparator x */ 294 #define AC_INTFLAG_COMP_Msk (_U_(0xF) << AC_INTFLAG_COMP_Pos) 295 #define AC_INTFLAG_COMP(value) (AC_INTFLAG_COMP_Msk & ((value) << AC_INTFLAG_COMP_Pos)) 296 #define AC_INTFLAG_WIN0_Pos 4 /**< \brief (AC_INTFLAG) Window 0 */ 297 #define AC_INTFLAG_WIN0 (_U_(1) << AC_INTFLAG_WIN0_Pos) 298 #define AC_INTFLAG_WIN1_Pos 5 /**< \brief (AC_INTFLAG) Window 1 */ 299 #define AC_INTFLAG_WIN1 (_U_(1) << AC_INTFLAG_WIN1_Pos) 300 #define AC_INTFLAG_WIN_Pos 4 /**< \brief (AC_INTFLAG) Window x */ 301 #define AC_INTFLAG_WIN_Msk (_U_(0x3) << AC_INTFLAG_WIN_Pos) 302 #define AC_INTFLAG_WIN(value) (AC_INTFLAG_WIN_Msk & ((value) << AC_INTFLAG_WIN_Pos)) 303 #define AC_INTFLAG_MASK _U_(0x3F) /**< \brief (AC_INTFLAG) MASK Register */ 304 305 /* -------- AC_STATUSA : (AC Offset: 0x07) (R/ 8) Status A -------- */ 306 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 307 typedef union { 308 struct { 309 uint8_t STATE0:1; /*!< bit: 0 Comparator 0 Current State */ 310 uint8_t STATE1:1; /*!< bit: 1 Comparator 1 Current State */ 311 uint8_t STATE2:1; /*!< bit: 2 Comparator 2 Current State */ 312 uint8_t STATE3:1; /*!< bit: 3 Comparator 3 Current State */ 313 uint8_t WSTATE0:2; /*!< bit: 4.. 5 Window 0 Current State */ 314 uint8_t WSTATE1:2; /*!< bit: 6.. 7 Window 1 Current State */ 315 } bit; /*!< Structure used for bit access */ 316 struct { 317 uint8_t STATE:4; /*!< bit: 0.. 3 Comparator x Current State */ 318 uint8_t :4; /*!< bit: 4.. 7 Reserved */ 319 } vec; /*!< Structure used for vec access */ 320 uint8_t reg; /*!< Type used for register access */ 321 } AC_STATUSA_Type; 322 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 323 324 #define AC_STATUSA_OFFSET 0x07 /**< \brief (AC_STATUSA offset) Status A */ 325 #define AC_STATUSA_RESETVALUE _U_(0x00) /**< \brief (AC_STATUSA reset_value) Status A */ 326 327 #define AC_STATUSA_STATE0_Pos 0 /**< \brief (AC_STATUSA) Comparator 0 Current State */ 328 #define AC_STATUSA_STATE0 (_U_(1) << AC_STATUSA_STATE0_Pos) 329 #define AC_STATUSA_STATE1_Pos 1 /**< \brief (AC_STATUSA) Comparator 1 Current State */ 330 #define AC_STATUSA_STATE1 (_U_(1) << AC_STATUSA_STATE1_Pos) 331 #define AC_STATUSA_STATE2_Pos 2 /**< \brief (AC_STATUSA) Comparator 2 Current State */ 332 #define AC_STATUSA_STATE2 (_U_(1) << AC_STATUSA_STATE2_Pos) 333 #define AC_STATUSA_STATE3_Pos 3 /**< \brief (AC_STATUSA) Comparator 3 Current State */ 334 #define AC_STATUSA_STATE3 (_U_(1) << AC_STATUSA_STATE3_Pos) 335 #define AC_STATUSA_STATE_Pos 0 /**< \brief (AC_STATUSA) Comparator x Current State */ 336 #define AC_STATUSA_STATE_Msk (_U_(0xF) << AC_STATUSA_STATE_Pos) 337 #define AC_STATUSA_STATE(value) (AC_STATUSA_STATE_Msk & ((value) << AC_STATUSA_STATE_Pos)) 338 #define AC_STATUSA_WSTATE0_Pos 4 /**< \brief (AC_STATUSA) Window 0 Current State */ 339 #define AC_STATUSA_WSTATE0_Msk (_U_(0x3) << AC_STATUSA_WSTATE0_Pos) 340 #define AC_STATUSA_WSTATE0(value) (AC_STATUSA_WSTATE0_Msk & ((value) << AC_STATUSA_WSTATE0_Pos)) 341 #define AC_STATUSA_WSTATE0_ABOVE_Val _U_(0x0) /**< \brief (AC_STATUSA) Signal is above window */ 342 #define AC_STATUSA_WSTATE0_INSIDE_Val _U_(0x1) /**< \brief (AC_STATUSA) Signal is inside window */ 343 #define AC_STATUSA_WSTATE0_BELOW_Val _U_(0x2) /**< \brief (AC_STATUSA) Signal is below window */ 344 #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos) 345 #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos) 346 #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos) 347 #define AC_STATUSA_WSTATE1_Pos 6 /**< \brief (AC_STATUSA) Window 1 Current State */ 348 #define AC_STATUSA_WSTATE1_Msk (_U_(0x3) << AC_STATUSA_WSTATE1_Pos) 349 #define AC_STATUSA_WSTATE1(value) (AC_STATUSA_WSTATE1_Msk & ((value) << AC_STATUSA_WSTATE1_Pos)) 350 #define AC_STATUSA_WSTATE1_ABOVE_Val _U_(0x0) /**< \brief (AC_STATUSA) Signal is above window */ 351 #define AC_STATUSA_WSTATE1_INSIDE_Val _U_(0x1) /**< \brief (AC_STATUSA) Signal is inside window */ 352 #define AC_STATUSA_WSTATE1_BELOW_Val _U_(0x2) /**< \brief (AC_STATUSA) Signal is below window */ 353 #define AC_STATUSA_WSTATE1_ABOVE (AC_STATUSA_WSTATE1_ABOVE_Val << AC_STATUSA_WSTATE1_Pos) 354 #define AC_STATUSA_WSTATE1_INSIDE (AC_STATUSA_WSTATE1_INSIDE_Val << AC_STATUSA_WSTATE1_Pos) 355 #define AC_STATUSA_WSTATE1_BELOW (AC_STATUSA_WSTATE1_BELOW_Val << AC_STATUSA_WSTATE1_Pos) 356 #define AC_STATUSA_MASK _U_(0xFF) /**< \brief (AC_STATUSA) MASK Register */ 357 358 /* -------- AC_STATUSB : (AC Offset: 0x08) (R/ 8) Status B -------- */ 359 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 360 typedef union { 361 struct { 362 uint8_t READY0:1; /*!< bit: 0 Comparator 0 Ready */ 363 uint8_t READY1:1; /*!< bit: 1 Comparator 1 Ready */ 364 uint8_t READY2:1; /*!< bit: 2 Comparator 2 Ready */ 365 uint8_t READY3:1; /*!< bit: 3 Comparator 3 Ready */ 366 uint8_t :4; /*!< bit: 4.. 7 Reserved */ 367 } bit; /*!< Structure used for bit access */ 368 struct { 369 uint8_t READY:4; /*!< bit: 0.. 3 Comparator x Ready */ 370 uint8_t :4; /*!< bit: 4.. 7 Reserved */ 371 } vec; /*!< Structure used for vec access */ 372 uint8_t reg; /*!< Type used for register access */ 373 } AC_STATUSB_Type; 374 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 375 376 #define AC_STATUSB_OFFSET 0x08 /**< \brief (AC_STATUSB offset) Status B */ 377 #define AC_STATUSB_RESETVALUE _U_(0x00) /**< \brief (AC_STATUSB reset_value) Status B */ 378 379 #define AC_STATUSB_READY0_Pos 0 /**< \brief (AC_STATUSB) Comparator 0 Ready */ 380 #define AC_STATUSB_READY0 (_U_(1) << AC_STATUSB_READY0_Pos) 381 #define AC_STATUSB_READY1_Pos 1 /**< \brief (AC_STATUSB) Comparator 1 Ready */ 382 #define AC_STATUSB_READY1 (_U_(1) << AC_STATUSB_READY1_Pos) 383 #define AC_STATUSB_READY2_Pos 2 /**< \brief (AC_STATUSB) Comparator 2 Ready */ 384 #define AC_STATUSB_READY2 (_U_(1) << AC_STATUSB_READY2_Pos) 385 #define AC_STATUSB_READY3_Pos 3 /**< \brief (AC_STATUSB) Comparator 3 Ready */ 386 #define AC_STATUSB_READY3 (_U_(1) << AC_STATUSB_READY3_Pos) 387 #define AC_STATUSB_READY_Pos 0 /**< \brief (AC_STATUSB) Comparator x Ready */ 388 #define AC_STATUSB_READY_Msk (_U_(0xF) << AC_STATUSB_READY_Pos) 389 #define AC_STATUSB_READY(value) (AC_STATUSB_READY_Msk & ((value) << AC_STATUSB_READY_Pos)) 390 #define AC_STATUSB_MASK _U_(0x0F) /**< \brief (AC_STATUSB) MASK Register */ 391 392 /* -------- AC_DBGCTRL : (AC Offset: 0x09) (R/W 8) Debug Control -------- */ 393 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 394 typedef union { 395 struct { 396 uint8_t DBGRUN:1; /*!< bit: 0 Debug Run */ 397 uint8_t :7; /*!< bit: 1.. 7 Reserved */ 398 } bit; /*!< Structure used for bit access */ 399 uint8_t reg; /*!< Type used for register access */ 400 } AC_DBGCTRL_Type; 401 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 402 403 #define AC_DBGCTRL_OFFSET 0x09 /**< \brief (AC_DBGCTRL offset) Debug Control */ 404 #define AC_DBGCTRL_RESETVALUE _U_(0x00) /**< \brief (AC_DBGCTRL reset_value) Debug Control */ 405 406 #define AC_DBGCTRL_DBGRUN_Pos 0 /**< \brief (AC_DBGCTRL) Debug Run */ 407 #define AC_DBGCTRL_DBGRUN (_U_(0x1) << AC_DBGCTRL_DBGRUN_Pos) 408 #define AC_DBGCTRL_MASK _U_(0x01) /**< \brief (AC_DBGCTRL) MASK Register */ 409 410 /* -------- AC_WINCTRL : (AC Offset: 0x0A) (R/W 8) Window Control -------- */ 411 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 412 typedef union { 413 struct { 414 uint8_t WEN0:1; /*!< bit: 0 Window 0 Mode Enable */ 415 uint8_t WINTSEL0:2; /*!< bit: 1.. 2 Window 0 Interrupt Selection */ 416 uint8_t :1; /*!< bit: 3 Reserved */ 417 uint8_t WEN1:1; /*!< bit: 4 Window 1 Mode Enable */ 418 uint8_t WINTSEL1:2; /*!< bit: 5.. 6 Window 1 Interrupt Selection */ 419 uint8_t :1; /*!< bit: 7 Reserved */ 420 } bit; /*!< Structure used for bit access */ 421 uint8_t reg; /*!< Type used for register access */ 422 } AC_WINCTRL_Type; 423 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 424 425 #define AC_WINCTRL_OFFSET 0x0A /**< \brief (AC_WINCTRL offset) Window Control */ 426 #define AC_WINCTRL_RESETVALUE _U_(0x00) /**< \brief (AC_WINCTRL reset_value) Window Control */ 427 428 #define AC_WINCTRL_WEN0_Pos 0 /**< \brief (AC_WINCTRL) Window 0 Mode Enable */ 429 #define AC_WINCTRL_WEN0 (_U_(0x1) << AC_WINCTRL_WEN0_Pos) 430 #define AC_WINCTRL_WINTSEL0_Pos 1 /**< \brief (AC_WINCTRL) Window 0 Interrupt Selection */ 431 #define AC_WINCTRL_WINTSEL0_Msk (_U_(0x3) << AC_WINCTRL_WINTSEL0_Pos) 432 #define AC_WINCTRL_WINTSEL0(value) (AC_WINCTRL_WINTSEL0_Msk & ((value) << AC_WINCTRL_WINTSEL0_Pos)) 433 #define AC_WINCTRL_WINTSEL0_ABOVE_Val _U_(0x0) /**< \brief (AC_WINCTRL) Interrupt on signal above window */ 434 #define AC_WINCTRL_WINTSEL0_INSIDE_Val _U_(0x1) /**< \brief (AC_WINCTRL) Interrupt on signal inside window */ 435 #define AC_WINCTRL_WINTSEL0_BELOW_Val _U_(0x2) /**< \brief (AC_WINCTRL) Interrupt on signal below window */ 436 #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val _U_(0x3) /**< \brief (AC_WINCTRL) Interrupt on signal outside window */ 437 #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos) 438 #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) 439 #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos) 440 #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) 441 #define AC_WINCTRL_WEN1_Pos 4 /**< \brief (AC_WINCTRL) Window 1 Mode Enable */ 442 #define AC_WINCTRL_WEN1 (_U_(0x1) << AC_WINCTRL_WEN1_Pos) 443 #define AC_WINCTRL_WINTSEL1_Pos 5 /**< \brief (AC_WINCTRL) Window 1 Interrupt Selection */ 444 #define AC_WINCTRL_WINTSEL1_Msk (_U_(0x3) << AC_WINCTRL_WINTSEL1_Pos) 445 #define AC_WINCTRL_WINTSEL1(value) (AC_WINCTRL_WINTSEL1_Msk & ((value) << AC_WINCTRL_WINTSEL1_Pos)) 446 #define AC_WINCTRL_WINTSEL1_ABOVE_Val _U_(0x0) /**< \brief (AC_WINCTRL) Interrupt on signal above window */ 447 #define AC_WINCTRL_WINTSEL1_INSIDE_Val _U_(0x1) /**< \brief (AC_WINCTRL) Interrupt on signal inside window */ 448 #define AC_WINCTRL_WINTSEL1_BELOW_Val _U_(0x2) /**< \brief (AC_WINCTRL) Interrupt on signal below window */ 449 #define AC_WINCTRL_WINTSEL1_OUTSIDE_Val _U_(0x3) /**< \brief (AC_WINCTRL) Interrupt on signal outside window */ 450 #define AC_WINCTRL_WINTSEL1_ABOVE (AC_WINCTRL_WINTSEL1_ABOVE_Val << AC_WINCTRL_WINTSEL1_Pos) 451 #define AC_WINCTRL_WINTSEL1_INSIDE (AC_WINCTRL_WINTSEL1_INSIDE_Val << AC_WINCTRL_WINTSEL1_Pos) 452 #define AC_WINCTRL_WINTSEL1_BELOW (AC_WINCTRL_WINTSEL1_BELOW_Val << AC_WINCTRL_WINTSEL1_Pos) 453 #define AC_WINCTRL_WINTSEL1_OUTSIDE (AC_WINCTRL_WINTSEL1_OUTSIDE_Val << AC_WINCTRL_WINTSEL1_Pos) 454 #define AC_WINCTRL_MASK _U_(0x77) /**< \brief (AC_WINCTRL) MASK Register */ 455 456 /* -------- AC_SCALER : (AC Offset: 0x0C) (R/W 8) Scaler n -------- */ 457 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 458 typedef union { 459 struct { 460 uint8_t VALUE:6; /*!< bit: 0.. 5 Scaler Value */ 461 uint8_t :2; /*!< bit: 6.. 7 Reserved */ 462 } bit; /*!< Structure used for bit access */ 463 uint8_t reg; /*!< Type used for register access */ 464 } AC_SCALER_Type; 465 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 466 467 #define AC_SCALER_OFFSET 0x0C /**< \brief (AC_SCALER offset) Scaler n */ 468 #define AC_SCALER_RESETVALUE _U_(0x00) /**< \brief (AC_SCALER reset_value) Scaler n */ 469 470 #define AC_SCALER_VALUE_Pos 0 /**< \brief (AC_SCALER) Scaler Value */ 471 #define AC_SCALER_VALUE_Msk (_U_(0x3F) << AC_SCALER_VALUE_Pos) 472 #define AC_SCALER_VALUE(value) (AC_SCALER_VALUE_Msk & ((value) << AC_SCALER_VALUE_Pos)) 473 #define AC_SCALER_MASK _U_(0x3F) /**< \brief (AC_SCALER) MASK Register */ 474 475 /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */ 476 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 477 typedef union { 478 struct { 479 uint32_t :1; /*!< bit: 0 Reserved */ 480 uint32_t ENABLE:1; /*!< bit: 1 Enable */ 481 uint32_t SINGLE:1; /*!< bit: 2 Single-Shot Mode */ 482 uint32_t INTSEL:2; /*!< bit: 3.. 4 Interrupt Selection */ 483 uint32_t :1; /*!< bit: 5 Reserved */ 484 uint32_t RUNSTDBY:1; /*!< bit: 6 Run in Standby */ 485 uint32_t :1; /*!< bit: 7 Reserved */ 486 uint32_t MUXNEG:3; /*!< bit: 8..10 Negative Input Mux Selection */ 487 uint32_t :1; /*!< bit: 11 Reserved */ 488 uint32_t MUXPOS:3; /*!< bit: 12..14 Positive Input Mux Selection */ 489 uint32_t SWAP:1; /*!< bit: 15 Swap Inputs and Invert */ 490 uint32_t SPEED:2; /*!< bit: 16..17 Speed Selection */ 491 uint32_t :1; /*!< bit: 18 Reserved */ 492 uint32_t HYSTEN:1; /*!< bit: 19 Hysteresis Enable */ 493 uint32_t :4; /*!< bit: 20..23 Reserved */ 494 uint32_t FLEN:3; /*!< bit: 24..26 Filter Length */ 495 uint32_t :1; /*!< bit: 27 Reserved */ 496 uint32_t OUT:2; /*!< bit: 28..29 Output */ 497 uint32_t :2; /*!< bit: 30..31 Reserved */ 498 } bit; /*!< Structure used for bit access */ 499 uint32_t reg; /*!< Type used for register access */ 500 } AC_COMPCTRL_Type; 501 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 502 503 #define AC_COMPCTRL_OFFSET 0x10 /**< \brief (AC_COMPCTRL offset) Comparator Control n */ 504 #define AC_COMPCTRL_RESETVALUE _U_(0x00000000) /**< \brief (AC_COMPCTRL reset_value) Comparator Control n */ 505 506 #define AC_COMPCTRL_ENABLE_Pos 1 /**< \brief (AC_COMPCTRL) Enable */ 507 #define AC_COMPCTRL_ENABLE (_U_(0x1) << AC_COMPCTRL_ENABLE_Pos) 508 #define AC_COMPCTRL_SINGLE_Pos 2 /**< \brief (AC_COMPCTRL) Single-Shot Mode */ 509 #define AC_COMPCTRL_SINGLE (_U_(0x1) << AC_COMPCTRL_SINGLE_Pos) 510 #define AC_COMPCTRL_INTSEL_Pos 3 /**< \brief (AC_COMPCTRL) Interrupt Selection */ 511 #define AC_COMPCTRL_INTSEL_Msk (_U_(0x3) << AC_COMPCTRL_INTSEL_Pos) 512 #define AC_COMPCTRL_INTSEL(value) (AC_COMPCTRL_INTSEL_Msk & ((value) << AC_COMPCTRL_INTSEL_Pos)) 513 #define AC_COMPCTRL_INTSEL_TOGGLE_Val _U_(0x0) /**< \brief (AC_COMPCTRL) Interrupt on comparator output toggle */ 514 #define AC_COMPCTRL_INTSEL_RISING_Val _U_(0x1) /**< \brief (AC_COMPCTRL) Interrupt on comparator output rising */ 515 #define AC_COMPCTRL_INTSEL_FALLING_Val _U_(0x2) /**< \brief (AC_COMPCTRL) Interrupt on comparator output falling */ 516 #define AC_COMPCTRL_INTSEL_EOC_Val _U_(0x3) /**< \brief (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */ 517 #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos) 518 #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos) 519 #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos) 520 #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos) 521 #define AC_COMPCTRL_RUNSTDBY_Pos 6 /**< \brief (AC_COMPCTRL) Run in Standby */ 522 #define AC_COMPCTRL_RUNSTDBY (_U_(0x1) << AC_COMPCTRL_RUNSTDBY_Pos) 523 #define AC_COMPCTRL_MUXNEG_Pos 8 /**< \brief (AC_COMPCTRL) Negative Input Mux Selection */ 524 #define AC_COMPCTRL_MUXNEG_Msk (_U_(0x7) << AC_COMPCTRL_MUXNEG_Pos) 525 #define AC_COMPCTRL_MUXNEG(value) (AC_COMPCTRL_MUXNEG_Msk & ((value) << AC_COMPCTRL_MUXNEG_Pos)) 526 #define AC_COMPCTRL_MUXNEG_PIN0_Val _U_(0x0) /**< \brief (AC_COMPCTRL) I/O pin 0 */ 527 #define AC_COMPCTRL_MUXNEG_PIN1_Val _U_(0x1) /**< \brief (AC_COMPCTRL) I/O pin 1 */ 528 #define AC_COMPCTRL_MUXNEG_PIN2_Val _U_(0x2) /**< \brief (AC_COMPCTRL) I/O pin 2 */ 529 #define AC_COMPCTRL_MUXNEG_PIN3_Val _U_(0x3) /**< \brief (AC_COMPCTRL) I/O pin 3 */ 530 #define AC_COMPCTRL_MUXNEG_GND_Val _U_(0x4) /**< \brief (AC_COMPCTRL) Ground */ 531 #define AC_COMPCTRL_MUXNEG_VSCALE_Val _U_(0x5) /**< \brief (AC_COMPCTRL) VDD scaler */ 532 #define AC_COMPCTRL_MUXNEG_BANDGAP_Val _U_(0x6) /**< \brief (AC_COMPCTRL) Internal bandgap voltage */ 533 #define AC_COMPCTRL_MUXNEG_DAC_Val _U_(0x7) /**< \brief (AC_COMPCTRL) DAC output */ 534 #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos) 535 #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos) 536 #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos) 537 #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos) 538 #define AC_COMPCTRL_MUXNEG_GND (AC_COMPCTRL_MUXNEG_GND_Val << AC_COMPCTRL_MUXNEG_Pos) 539 #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos) 540 #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos) 541 #define AC_COMPCTRL_MUXNEG_DAC (AC_COMPCTRL_MUXNEG_DAC_Val << AC_COMPCTRL_MUXNEG_Pos) 542 #define AC_COMPCTRL_MUXPOS_Pos 12 /**< \brief (AC_COMPCTRL) Positive Input Mux Selection */ 543 #define AC_COMPCTRL_MUXPOS_Msk (_U_(0x7) << AC_COMPCTRL_MUXPOS_Pos) 544 #define AC_COMPCTRL_MUXPOS(value) (AC_COMPCTRL_MUXPOS_Msk & ((value) << AC_COMPCTRL_MUXPOS_Pos)) 545 #define AC_COMPCTRL_MUXPOS_PIN0_Val _U_(0x0) /**< \brief (AC_COMPCTRL) I/O pin 0 */ 546 #define AC_COMPCTRL_MUXPOS_PIN1_Val _U_(0x1) /**< \brief (AC_COMPCTRL) I/O pin 1 */ 547 #define AC_COMPCTRL_MUXPOS_PIN2_Val _U_(0x2) /**< \brief (AC_COMPCTRL) I/O pin 2 */ 548 #define AC_COMPCTRL_MUXPOS_PIN3_Val _U_(0x3) /**< \brief (AC_COMPCTRL) I/O pin 3 */ 549 #define AC_COMPCTRL_MUXPOS_VSCALE_Val _U_(0x4) /**< \brief (AC_COMPCTRL) VDD Scaler */ 550 #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos) 551 #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos) 552 #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos) 553 #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos) 554 #define AC_COMPCTRL_MUXPOS_VSCALE (AC_COMPCTRL_MUXPOS_VSCALE_Val << AC_COMPCTRL_MUXPOS_Pos) 555 #define AC_COMPCTRL_SWAP_Pos 15 /**< \brief (AC_COMPCTRL) Swap Inputs and Invert */ 556 #define AC_COMPCTRL_SWAP (_U_(0x1) << AC_COMPCTRL_SWAP_Pos) 557 #define AC_COMPCTRL_SPEED_Pos 16 /**< \brief (AC_COMPCTRL) Speed Selection */ 558 #define AC_COMPCTRL_SPEED_Msk (_U_(0x3) << AC_COMPCTRL_SPEED_Pos) 559 #define AC_COMPCTRL_SPEED(value) (AC_COMPCTRL_SPEED_Msk & ((value) << AC_COMPCTRL_SPEED_Pos)) 560 #define AC_COMPCTRL_SPEED_LOW_Val _U_(0x0) /**< \brief (AC_COMPCTRL) Low speed */ 561 #define AC_COMPCTRL_SPEED_HIGH_Val _U_(0x3) /**< \brief (AC_COMPCTRL) High speed */ 562 #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos) 563 #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos) 564 #define AC_COMPCTRL_HYSTEN_Pos 19 /**< \brief (AC_COMPCTRL) Hysteresis Enable */ 565 #define AC_COMPCTRL_HYSTEN (_U_(0x1) << AC_COMPCTRL_HYSTEN_Pos) 566 #define AC_COMPCTRL_FLEN_Pos 24 /**< \brief (AC_COMPCTRL) Filter Length */ 567 #define AC_COMPCTRL_FLEN_Msk (_U_(0x7) << AC_COMPCTRL_FLEN_Pos) 568 #define AC_COMPCTRL_FLEN(value) (AC_COMPCTRL_FLEN_Msk & ((value) << AC_COMPCTRL_FLEN_Pos)) 569 #define AC_COMPCTRL_FLEN_OFF_Val _U_(0x0) /**< \brief (AC_COMPCTRL) No filtering */ 570 #define AC_COMPCTRL_FLEN_MAJ3_Val _U_(0x1) /**< \brief (AC_COMPCTRL) 3-bit majority function (2 of 3) */ 571 #define AC_COMPCTRL_FLEN_MAJ5_Val _U_(0x2) /**< \brief (AC_COMPCTRL) 5-bit majority function (3 of 5) */ 572 #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos) 573 #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos) 574 #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos) 575 #define AC_COMPCTRL_OUT_Pos 28 /**< \brief (AC_COMPCTRL) Output */ 576 #define AC_COMPCTRL_OUT_Msk (_U_(0x3) << AC_COMPCTRL_OUT_Pos) 577 #define AC_COMPCTRL_OUT(value) (AC_COMPCTRL_OUT_Msk & ((value) << AC_COMPCTRL_OUT_Pos)) 578 #define AC_COMPCTRL_OUT_OFF_Val _U_(0x0) /**< \brief (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */ 579 #define AC_COMPCTRL_OUT_ASYNC_Val _U_(0x1) /**< \brief (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */ 580 #define AC_COMPCTRL_OUT_SYNC_Val _U_(0x2) /**< \brief (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */ 581 #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos) 582 #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos) 583 #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos) 584 #define AC_COMPCTRL_MASK _U_(0x370BF75E) /**< \brief (AC_COMPCTRL) MASK Register */ 585 586 /* -------- AC_SYNCBUSY : (AC Offset: 0x20) (R/ 32) Synchronization Busy -------- */ 587 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 588 typedef union { 589 struct { 590 uint32_t SWRST:1; /*!< bit: 0 Software Reset Synchronization Busy */ 591 uint32_t ENABLE:1; /*!< bit: 1 Enable Synchronization Busy */ 592 uint32_t WINCTRL:1; /*!< bit: 2 WINCTRL Synchronization Busy */ 593 uint32_t COMPCTRL0:1; /*!< bit: 3 COMPCTRL 0 Synchronization Busy */ 594 uint32_t COMPCTRL1:1; /*!< bit: 4 COMPCTRL 1 Synchronization Busy */ 595 uint32_t COMPCTRL2:1; /*!< bit: 5 COMPCTRL 2 Synchronization Busy */ 596 uint32_t COMPCTRL3:1; /*!< bit: 6 COMPCTRL 3 Synchronization Busy */ 597 uint32_t :25; /*!< bit: 7..31 Reserved */ 598 } bit; /*!< Structure used for bit access */ 599 struct { 600 uint32_t :3; /*!< bit: 0.. 2 Reserved */ 601 uint32_t COMPCTRL:4; /*!< bit: 3.. 6 COMPCTRL x Synchronization Busy */ 602 uint32_t :25; /*!< bit: 7..31 Reserved */ 603 } vec; /*!< Structure used for vec access */ 604 uint32_t reg; /*!< Type used for register access */ 605 } AC_SYNCBUSY_Type; 606 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 607 608 #define AC_SYNCBUSY_OFFSET 0x20 /**< \brief (AC_SYNCBUSY offset) Synchronization Busy */ 609 #define AC_SYNCBUSY_RESETVALUE _U_(0x00000000) /**< \brief (AC_SYNCBUSY reset_value) Synchronization Busy */ 610 611 #define AC_SYNCBUSY_SWRST_Pos 0 /**< \brief (AC_SYNCBUSY) Software Reset Synchronization Busy */ 612 #define AC_SYNCBUSY_SWRST (_U_(0x1) << AC_SYNCBUSY_SWRST_Pos) 613 #define AC_SYNCBUSY_ENABLE_Pos 1 /**< \brief (AC_SYNCBUSY) Enable Synchronization Busy */ 614 #define AC_SYNCBUSY_ENABLE (_U_(0x1) << AC_SYNCBUSY_ENABLE_Pos) 615 #define AC_SYNCBUSY_WINCTRL_Pos 2 /**< \brief (AC_SYNCBUSY) WINCTRL Synchronization Busy */ 616 #define AC_SYNCBUSY_WINCTRL (_U_(0x1) << AC_SYNCBUSY_WINCTRL_Pos) 617 #define AC_SYNCBUSY_COMPCTRL0_Pos 3 /**< \brief (AC_SYNCBUSY) COMPCTRL 0 Synchronization Busy */ 618 #define AC_SYNCBUSY_COMPCTRL0 (_U_(1) << AC_SYNCBUSY_COMPCTRL0_Pos) 619 #define AC_SYNCBUSY_COMPCTRL1_Pos 4 /**< \brief (AC_SYNCBUSY) COMPCTRL 1 Synchronization Busy */ 620 #define AC_SYNCBUSY_COMPCTRL1 (_U_(1) << AC_SYNCBUSY_COMPCTRL1_Pos) 621 #define AC_SYNCBUSY_COMPCTRL2_Pos 5 /**< \brief (AC_SYNCBUSY) COMPCTRL 2 Synchronization Busy */ 622 #define AC_SYNCBUSY_COMPCTRL2 (_U_(1) << AC_SYNCBUSY_COMPCTRL2_Pos) 623 #define AC_SYNCBUSY_COMPCTRL3_Pos 6 /**< \brief (AC_SYNCBUSY) COMPCTRL 3 Synchronization Busy */ 624 #define AC_SYNCBUSY_COMPCTRL3 (_U_(1) << AC_SYNCBUSY_COMPCTRL3_Pos) 625 #define AC_SYNCBUSY_COMPCTRL_Pos 3 /**< \brief (AC_SYNCBUSY) COMPCTRL x Synchronization Busy */ 626 #define AC_SYNCBUSY_COMPCTRL_Msk (_U_(0xF) << AC_SYNCBUSY_COMPCTRL_Pos) 627 #define AC_SYNCBUSY_COMPCTRL(value) (AC_SYNCBUSY_COMPCTRL_Msk & ((value) << AC_SYNCBUSY_COMPCTRL_Pos)) 628 #define AC_SYNCBUSY_MASK _U_(0x0000007F) /**< \brief (AC_SYNCBUSY) MASK Register */ 629 630 /** \brief AC hardware registers */ 631 #if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 632 typedef struct { 633 __IO AC_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */ 634 __O AC_CTRLB_Type CTRLB; /**< \brief Offset: 0x01 ( /W 8) Control B */ 635 __IO AC_EVCTRL_Type EVCTRL; /**< \brief Offset: 0x02 (R/W 16) Event Control */ 636 __IO AC_INTENCLR_Type INTENCLR; /**< \brief Offset: 0x04 (R/W 8) Interrupt Enable Clear */ 637 __IO AC_INTENSET_Type INTENSET; /**< \brief Offset: 0x05 (R/W 8) Interrupt Enable Set */ 638 __IO AC_INTFLAG_Type INTFLAG; /**< \brief Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */ 639 __I AC_STATUSA_Type STATUSA; /**< \brief Offset: 0x07 (R/ 8) Status A */ 640 __I AC_STATUSB_Type STATUSB; /**< \brief Offset: 0x08 (R/ 8) Status B */ 641 __IO AC_DBGCTRL_Type DBGCTRL; /**< \brief Offset: 0x09 (R/W 8) Debug Control */ 642 __IO AC_WINCTRL_Type WINCTRL; /**< \brief Offset: 0x0A (R/W 8) Window Control */ 643 RoReg8 Reserved1[0x1]; 644 __IO AC_SCALER_Type SCALER[4]; /**< \brief Offset: 0x0C (R/W 8) Scaler n */ 645 __IO AC_COMPCTRL_Type COMPCTRL[4]; /**< \brief Offset: 0x10 (R/W 32) Comparator Control n */ 646 __I AC_SYNCBUSY_Type SYNCBUSY; /**< \brief Offset: 0x20 (R/ 32) Synchronization Busy */ 647 } Ac; 648 #endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ 649 650 /*@}*/ 651 652 #endif /* _SAMC21_AC_COMPONENT_ */ 653
