1 /**
2  * \file
3  *
4  * \brief Instance description for TRNG
5  *
6  * Copyright (c) 2019 Microchip Technology Inc.
7  *
8  * \license_start
9  *
10  * \page License
11  *
12  * SPDX-License-Identifier: Apache-2.0
13  *
14  * Licensed under the Apache License, Version 2.0 (the "License");
15  * you may not use this file except in compliance with the License.
16  * You may obtain a copy of the License at
17  *
18  *   http://www.apache.org/licenses/LICENSE-2.0
19  *
20  * Unless required by applicable law or agreed to in writing, software
21  * distributed under the License is distributed on an "AS IS" BASIS,
22  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23  * See the License for the specific language governing permissions and
24  * limitations under the License.
25  *
26  * \license_stop
27  *
28  */
29 
30 /* file generated from device description version 2017-08-25T14:00:00Z */
31 #ifndef _SAME70_TRNG_INSTANCE_H_
32 #define _SAME70_TRNG_INSTANCE_H_
33 
34 /* ========== Register definition for TRNG peripheral ========== */
35 #if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
36 
37 #define REG_TRNG_CR             (0x40070000) /**< (TRNG) Control Register */
38 #define REG_TRNG_IER            (0x40070010) /**< (TRNG) Interrupt Enable Register */
39 #define REG_TRNG_IDR            (0x40070014) /**< (TRNG) Interrupt Disable Register */
40 #define REG_TRNG_IMR            (0x40070018) /**< (TRNG) Interrupt Mask Register */
41 #define REG_TRNG_ISR            (0x4007001C) /**< (TRNG) Interrupt Status Register */
42 #define REG_TRNG_ODATA          (0x40070050) /**< (TRNG) Output Data Register */
43 
44 #else
45 
46 #define REG_TRNG_CR             (*(__O  uint32_t*)0x40070000U) /**< (TRNG) Control Register */
47 #define REG_TRNG_IER            (*(__O  uint32_t*)0x40070010U) /**< (TRNG) Interrupt Enable Register */
48 #define REG_TRNG_IDR            (*(__O  uint32_t*)0x40070014U) /**< (TRNG) Interrupt Disable Register */
49 #define REG_TRNG_IMR            (*(__I  uint32_t*)0x40070018U) /**< (TRNG) Interrupt Mask Register */
50 #define REG_TRNG_ISR            (*(__I  uint32_t*)0x4007001CU) /**< (TRNG) Interrupt Status Register */
51 #define REG_TRNG_ODATA          (*(__I  uint32_t*)0x40070050U) /**< (TRNG) Output Data Register */
52 
53 #endif /* (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
54 
55 /* ========== Instance Parameter definitions for TRNG peripheral ========== */
56 #define TRNG_INSTANCE_ID                         57
57 
58 #endif /* _SAME70_TRNG_INSTANCE_ */
59