1 /** 2 * \file 3 * 4 * \brief Peripheral I/O description for SAM4LC4A 5 * 6 * Copyright (c) 2016 Atmel Corporation, 7 * a wholly owned subsidiary of Microchip Technology Inc. 8 * 9 * \asf_license_start 10 * 11 * \page License 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the Licence at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 * \asf_license_stop 26 * 27 */ 28 29 #ifndef _SAM4LC4A_PIO_ 30 #define _SAM4LC4A_PIO_ 31 32 #define PIN_PA00 0 /**< \brief Pin Number for PA00 */ 33 #define GPIO_PA00 _UL_(1 << 0) /**< \brief GPIO Mask for PA00 */ 34 #define PIN_PA01 1 /**< \brief Pin Number for PA01 */ 35 #define GPIO_PA01 _UL_(1 << 1) /**< \brief GPIO Mask for PA01 */ 36 #define PIN_PA02 2 /**< \brief Pin Number for PA02 */ 37 #define GPIO_PA02 _UL_(1 << 2) /**< \brief GPIO Mask for PA02 */ 38 #define PIN_PA03 3 /**< \brief Pin Number for PA03 */ 39 #define GPIO_PA03 _UL_(1 << 3) /**< \brief GPIO Mask for PA03 */ 40 #define PIN_PA04 4 /**< \brief Pin Number for PA04 */ 41 #define GPIO_PA04 _UL_(1 << 4) /**< \brief GPIO Mask for PA04 */ 42 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */ 43 #define GPIO_PA05 _UL_(1 << 5) /**< \brief GPIO Mask for PA05 */ 44 #define PIN_PA06 6 /**< \brief Pin Number for PA06 */ 45 #define GPIO_PA06 _UL_(1 << 6) /**< \brief GPIO Mask for PA06 */ 46 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */ 47 #define GPIO_PA07 _UL_(1 << 7) /**< \brief GPIO Mask for PA07 */ 48 #define PIN_PA08 8 /**< \brief Pin Number for PA08 */ 49 #define GPIO_PA08 _UL_(1 << 8) /**< \brief GPIO Mask for PA08 */ 50 #define PIN_PA09 9 /**< \brief Pin Number for PA09 */ 51 #define GPIO_PA09 _UL_(1 << 9) /**< \brief GPIO Mask for PA09 */ 52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */ 53 #define GPIO_PA10 _UL_(1 << 10) /**< \brief GPIO Mask for PA10 */ 54 #define PIN_PA11 11 /**< \brief Pin Number for PA11 */ 55 #define GPIO_PA11 _UL_(1 << 11) /**< \brief GPIO Mask for PA11 */ 56 #define PIN_PA12 12 /**< \brief Pin Number for PA12 */ 57 #define GPIO_PA12 _UL_(1 << 12) /**< \brief GPIO Mask for PA12 */ 58 #define PIN_PA13 13 /**< \brief Pin Number for PA13 */ 59 #define GPIO_PA13 _UL_(1 << 13) /**< \brief GPIO Mask for PA13 */ 60 #define PIN_PA14 14 /**< \brief Pin Number for PA14 */ 61 #define GPIO_PA14 _UL_(1 << 14) /**< \brief GPIO Mask for PA14 */ 62 #define PIN_PA15 15 /**< \brief Pin Number for PA15 */ 63 #define GPIO_PA15 _UL_(1 << 15) /**< \brief GPIO Mask for PA15 */ 64 #define PIN_PA16 16 /**< \brief Pin Number for PA16 */ 65 #define GPIO_PA16 _UL_(1 << 16) /**< \brief GPIO Mask for PA16 */ 66 #define PIN_PA17 17 /**< \brief Pin Number for PA17 */ 67 #define GPIO_PA17 _UL_(1 << 17) /**< \brief GPIO Mask for PA17 */ 68 #define PIN_PA18 18 /**< \brief Pin Number for PA18 */ 69 #define GPIO_PA18 _UL_(1 << 18) /**< \brief GPIO Mask for PA18 */ 70 #define PIN_PA19 19 /**< \brief Pin Number for PA19 */ 71 #define GPIO_PA19 _UL_(1 << 19) /**< \brief GPIO Mask for PA19 */ 72 #define PIN_PA20 20 /**< \brief Pin Number for PA20 */ 73 #define GPIO_PA20 _UL_(1 << 20) /**< \brief GPIO Mask for PA20 */ 74 #define PIN_PA21 21 /**< \brief Pin Number for PA21 */ 75 #define GPIO_PA21 _UL_(1 << 21) /**< \brief GPIO Mask for PA21 */ 76 #define PIN_PA22 22 /**< \brief Pin Number for PA22 */ 77 #define GPIO_PA22 _UL_(1 << 22) /**< \brief GPIO Mask for PA22 */ 78 #define PIN_PA23 23 /**< \brief Pin Number for PA23 */ 79 #define GPIO_PA23 _UL_(1 << 23) /**< \brief GPIO Mask for PA23 */ 80 #define PIN_PA24 24 /**< \brief Pin Number for PA24 */ 81 #define GPIO_PA24 _UL_(1 << 24) /**< \brief GPIO Mask for PA24 */ 82 #define PIN_PA25 25 /**< \brief Pin Number for PA25 */ 83 #define GPIO_PA25 _UL_(1 << 25) /**< \brief GPIO Mask for PA25 */ 84 #define PIN_PA26 26 /**< \brief Pin Number for PA26 */ 85 #define GPIO_PA26 _UL_(1 << 26) /**< \brief GPIO Mask for PA26 */ 86 /* ========== GPIO definition for TWIMS0 peripheral ========== */ 87 #define PIN_PA24B_TWIMS0_TWCK _L_(24) /**< \brief TWIMS0 signal: TWCK on PA24 mux B */ 88 #define MUX_PA24B_TWIMS0_TWCK _L_(1) 89 #define PINMUX_PA24B_TWIMS0_TWCK ((PIN_PA24B_TWIMS0_TWCK << 16) | MUX_PA24B_TWIMS0_TWCK) 90 #define GPIO_PA24B_TWIMS0_TWCK _UL_(1 << 24) 91 #define PIN_PA23B_TWIMS0_TWD _L_(23) /**< \brief TWIMS0 signal: TWD on PA23 mux B */ 92 #define MUX_PA23B_TWIMS0_TWD _L_(1) 93 #define PINMUX_PA23B_TWIMS0_TWD ((PIN_PA23B_TWIMS0_TWD << 16) | MUX_PA23B_TWIMS0_TWD) 94 #define GPIO_PA23B_TWIMS0_TWD _UL_(1 << 23) 95 /* ========== GPIO definition for TWIMS2 peripheral ========== */ 96 #define PIN_PA22E_TWIMS2_TWCK _L_(22) /**< \brief TWIMS2 signal: TWCK on PA22 mux E */ 97 #define MUX_PA22E_TWIMS2_TWCK _L_(4) 98 #define PINMUX_PA22E_TWIMS2_TWCK ((PIN_PA22E_TWIMS2_TWCK << 16) | MUX_PA22E_TWIMS2_TWCK) 99 #define GPIO_PA22E_TWIMS2_TWCK _UL_(1 << 22) 100 #define PIN_PA21E_TWIMS2_TWD _L_(21) /**< \brief TWIMS2 signal: TWD on PA21 mux E */ 101 #define MUX_PA21E_TWIMS2_TWD _L_(4) 102 #define PINMUX_PA21E_TWIMS2_TWD ((PIN_PA21E_TWIMS2_TWD << 16) | MUX_PA21E_TWIMS2_TWD) 103 #define GPIO_PA21E_TWIMS2_TWD _UL_(1 << 21) 104 /* ========== GPIO definition for SPI peripheral ========== */ 105 #define PIN_PA03B_SPI_MISO _L_(3) /**< \brief SPI signal: MISO on PA03 mux B */ 106 #define MUX_PA03B_SPI_MISO _L_(1) 107 #define PINMUX_PA03B_SPI_MISO ((PIN_PA03B_SPI_MISO << 16) | MUX_PA03B_SPI_MISO) 108 #define GPIO_PA03B_SPI_MISO _UL_(1 << 3) 109 #define PIN_PA21A_SPI_MISO _L_(21) /**< \brief SPI signal: MISO on PA21 mux A */ 110 #define MUX_PA21A_SPI_MISO _L_(0) 111 #define PINMUX_PA21A_SPI_MISO ((PIN_PA21A_SPI_MISO << 16) | MUX_PA21A_SPI_MISO) 112 #define GPIO_PA21A_SPI_MISO _UL_(1 << 21) 113 #define PIN_PA22A_SPI_MOSI _L_(22) /**< \brief SPI signal: MOSI on PA22 mux A */ 114 #define MUX_PA22A_SPI_MOSI _L_(0) 115 #define PINMUX_PA22A_SPI_MOSI ((PIN_PA22A_SPI_MOSI << 16) | MUX_PA22A_SPI_MOSI) 116 #define GPIO_PA22A_SPI_MOSI _UL_(1 << 22) 117 #define PIN_PA02B_SPI_NPCS0 _L_(2) /**< \brief SPI signal: NPCS0 on PA02 mux B */ 118 #define MUX_PA02B_SPI_NPCS0 _L_(1) 119 #define PINMUX_PA02B_SPI_NPCS0 ((PIN_PA02B_SPI_NPCS0 << 16) | MUX_PA02B_SPI_NPCS0) 120 #define GPIO_PA02B_SPI_NPCS0 _UL_(1 << 2) 121 #define PIN_PA24A_SPI_NPCS0 _L_(24) /**< \brief SPI signal: NPCS0 on PA24 mux A */ 122 #define MUX_PA24A_SPI_NPCS0 _L_(0) 123 #define PINMUX_PA24A_SPI_NPCS0 ((PIN_PA24A_SPI_NPCS0 << 16) | MUX_PA24A_SPI_NPCS0) 124 #define GPIO_PA24A_SPI_NPCS0 _UL_(1 << 24) 125 #define PIN_PA13C_SPI_NPCS1 _L_(13) /**< \brief SPI signal: NPCS1 on PA13 mux C */ 126 #define MUX_PA13C_SPI_NPCS1 _L_(2) 127 #define PINMUX_PA13C_SPI_NPCS1 ((PIN_PA13C_SPI_NPCS1 << 16) | MUX_PA13C_SPI_NPCS1) 128 #define GPIO_PA13C_SPI_NPCS1 _UL_(1 << 13) 129 #define PIN_PA14C_SPI_NPCS2 _L_(14) /**< \brief SPI signal: NPCS2 on PA14 mux C */ 130 #define MUX_PA14C_SPI_NPCS2 _L_(2) 131 #define PINMUX_PA14C_SPI_NPCS2 ((PIN_PA14C_SPI_NPCS2 << 16) | MUX_PA14C_SPI_NPCS2) 132 #define GPIO_PA14C_SPI_NPCS2 _UL_(1 << 14) 133 #define PIN_PA15C_SPI_NPCS3 _L_(15) /**< \brief SPI signal: NPCS3 on PA15 mux C */ 134 #define MUX_PA15C_SPI_NPCS3 _L_(2) 135 #define PINMUX_PA15C_SPI_NPCS3 ((PIN_PA15C_SPI_NPCS3 << 16) | MUX_PA15C_SPI_NPCS3) 136 #define GPIO_PA15C_SPI_NPCS3 _UL_(1 << 15) 137 #define PIN_PA23A_SPI_SCK _L_(23) /**< \brief SPI signal: SCK on PA23 mux A */ 138 #define MUX_PA23A_SPI_SCK _L_(0) 139 #define PINMUX_PA23A_SPI_SCK ((PIN_PA23A_SPI_SCK << 16) | MUX_PA23A_SPI_SCK) 140 #define GPIO_PA23A_SPI_SCK _UL_(1 << 23) 141 /* ========== GPIO definition for TC0 peripheral ========== */ 142 #define PIN_PA08B_TC0_A0 _L_(8) /**< \brief TC0 signal: A0 on PA08 mux B */ 143 #define MUX_PA08B_TC0_A0 _L_(1) 144 #define PINMUX_PA08B_TC0_A0 ((PIN_PA08B_TC0_A0 << 16) | MUX_PA08B_TC0_A0) 145 #define GPIO_PA08B_TC0_A0 _UL_(1 << 8) 146 #define PIN_PA10B_TC0_A1 _L_(10) /**< \brief TC0 signal: A1 on PA10 mux B */ 147 #define MUX_PA10B_TC0_A1 _L_(1) 148 #define PINMUX_PA10B_TC0_A1 ((PIN_PA10B_TC0_A1 << 16) | MUX_PA10B_TC0_A1) 149 #define GPIO_PA10B_TC0_A1 _UL_(1 << 10) 150 #define PIN_PA12B_TC0_A2 _L_(12) /**< \brief TC0 signal: A2 on PA12 mux B */ 151 #define MUX_PA12B_TC0_A2 _L_(1) 152 #define PINMUX_PA12B_TC0_A2 ((PIN_PA12B_TC0_A2 << 16) | MUX_PA12B_TC0_A2) 153 #define GPIO_PA12B_TC0_A2 _UL_(1 << 12) 154 #define PIN_PA09B_TC0_B0 _L_(9) /**< \brief TC0 signal: B0 on PA09 mux B */ 155 #define MUX_PA09B_TC0_B0 _L_(1) 156 #define PINMUX_PA09B_TC0_B0 ((PIN_PA09B_TC0_B0 << 16) | MUX_PA09B_TC0_B0) 157 #define GPIO_PA09B_TC0_B0 _UL_(1 << 9) 158 #define PIN_PA11B_TC0_B1 _L_(11) /**< \brief TC0 signal: B1 on PA11 mux B */ 159 #define MUX_PA11B_TC0_B1 _L_(1) 160 #define PINMUX_PA11B_TC0_B1 ((PIN_PA11B_TC0_B1 << 16) | MUX_PA11B_TC0_B1) 161 #define GPIO_PA11B_TC0_B1 _UL_(1 << 11) 162 #define PIN_PA13B_TC0_B2 _L_(13) /**< \brief TC0 signal: B2 on PA13 mux B */ 163 #define MUX_PA13B_TC0_B2 _L_(1) 164 #define PINMUX_PA13B_TC0_B2 ((PIN_PA13B_TC0_B2 << 16) | MUX_PA13B_TC0_B2) 165 #define GPIO_PA13B_TC0_B2 _UL_(1 << 13) 166 #define PIN_PA14B_TC0_CLK0 _L_(14) /**< \brief TC0 signal: CLK0 on PA14 mux B */ 167 #define MUX_PA14B_TC0_CLK0 _L_(1) 168 #define PINMUX_PA14B_TC0_CLK0 ((PIN_PA14B_TC0_CLK0 << 16) | MUX_PA14B_TC0_CLK0) 169 #define GPIO_PA14B_TC0_CLK0 _UL_(1 << 14) 170 #define PIN_PA15B_TC0_CLK1 _L_(15) /**< \brief TC0 signal: CLK1 on PA15 mux B */ 171 #define MUX_PA15B_TC0_CLK1 _L_(1) 172 #define PINMUX_PA15B_TC0_CLK1 ((PIN_PA15B_TC0_CLK1 << 16) | MUX_PA15B_TC0_CLK1) 173 #define GPIO_PA15B_TC0_CLK1 _UL_(1 << 15) 174 #define PIN_PA16B_TC0_CLK2 _L_(16) /**< \brief TC0 signal: CLK2 on PA16 mux B */ 175 #define MUX_PA16B_TC0_CLK2 _L_(1) 176 #define PINMUX_PA16B_TC0_CLK2 ((PIN_PA16B_TC0_CLK2 << 16) | MUX_PA16B_TC0_CLK2) 177 #define GPIO_PA16B_TC0_CLK2 _UL_(1 << 16) 178 /* ========== GPIO definition for USART0 peripheral ========== */ 179 #define PIN_PA04B_USART0_CLK _L_(4) /**< \brief USART0 signal: CLK on PA04 mux B */ 180 #define MUX_PA04B_USART0_CLK _L_(1) 181 #define PINMUX_PA04B_USART0_CLK ((PIN_PA04B_USART0_CLK << 16) | MUX_PA04B_USART0_CLK) 182 #define GPIO_PA04B_USART0_CLK _UL_(1 << 4) 183 #define PIN_PA10A_USART0_CLK _L_(10) /**< \brief USART0 signal: CLK on PA10 mux A */ 184 #define MUX_PA10A_USART0_CLK _L_(0) 185 #define PINMUX_PA10A_USART0_CLK ((PIN_PA10A_USART0_CLK << 16) | MUX_PA10A_USART0_CLK) 186 #define GPIO_PA10A_USART0_CLK _UL_(1 << 10) 187 #define PIN_PA09A_USART0_CTS _L_(9) /**< \brief USART0 signal: CTS on PA09 mux A */ 188 #define MUX_PA09A_USART0_CTS _L_(0) 189 #define PINMUX_PA09A_USART0_CTS ((PIN_PA09A_USART0_CTS << 16) | MUX_PA09A_USART0_CTS) 190 #define GPIO_PA09A_USART0_CTS _UL_(1 << 9) 191 #define PIN_PA06B_USART0_RTS _L_(6) /**< \brief USART0 signal: RTS on PA06 mux B */ 192 #define MUX_PA06B_USART0_RTS _L_(1) 193 #define PINMUX_PA06B_USART0_RTS ((PIN_PA06B_USART0_RTS << 16) | MUX_PA06B_USART0_RTS) 194 #define GPIO_PA06B_USART0_RTS _UL_(1 << 6) 195 #define PIN_PA08A_USART0_RTS _L_(8) /**< \brief USART0 signal: RTS on PA08 mux A */ 196 #define MUX_PA08A_USART0_RTS _L_(0) 197 #define PINMUX_PA08A_USART0_RTS ((PIN_PA08A_USART0_RTS << 16) | MUX_PA08A_USART0_RTS) 198 #define GPIO_PA08A_USART0_RTS _UL_(1 << 8) 199 #define PIN_PA05B_USART0_RXD _L_(5) /**< \brief USART0 signal: RXD on PA05 mux B */ 200 #define MUX_PA05B_USART0_RXD _L_(1) 201 #define PINMUX_PA05B_USART0_RXD ((PIN_PA05B_USART0_RXD << 16) | MUX_PA05B_USART0_RXD) 202 #define GPIO_PA05B_USART0_RXD _UL_(1 << 5) 203 #define PIN_PA11A_USART0_RXD _L_(11) /**< \brief USART0 signal: RXD on PA11 mux A */ 204 #define MUX_PA11A_USART0_RXD _L_(0) 205 #define PINMUX_PA11A_USART0_RXD ((PIN_PA11A_USART0_RXD << 16) | MUX_PA11A_USART0_RXD) 206 #define GPIO_PA11A_USART0_RXD _UL_(1 << 11) 207 #define PIN_PA07B_USART0_TXD _L_(7) /**< \brief USART0 signal: TXD on PA07 mux B */ 208 #define MUX_PA07B_USART0_TXD _L_(1) 209 #define PINMUX_PA07B_USART0_TXD ((PIN_PA07B_USART0_TXD << 16) | MUX_PA07B_USART0_TXD) 210 #define GPIO_PA07B_USART0_TXD _UL_(1 << 7) 211 #define PIN_PA12A_USART0_TXD _L_(12) /**< \brief USART0 signal: TXD on PA12 mux A */ 212 #define MUX_PA12A_USART0_TXD _L_(0) 213 #define PINMUX_PA12A_USART0_TXD ((PIN_PA12A_USART0_TXD << 16) | MUX_PA12A_USART0_TXD) 214 #define GPIO_PA12A_USART0_TXD _UL_(1 << 12) 215 /* ========== GPIO definition for USART1 peripheral ========== */ 216 #define PIN_PA14A_USART1_CLK _L_(14) /**< \brief USART1 signal: CLK on PA14 mux A */ 217 #define MUX_PA14A_USART1_CLK _L_(0) 218 #define PINMUX_PA14A_USART1_CLK ((PIN_PA14A_USART1_CLK << 16) | MUX_PA14A_USART1_CLK) 219 #define GPIO_PA14A_USART1_CLK _UL_(1 << 14) 220 #define PIN_PA21B_USART1_CTS _L_(21) /**< \brief USART1 signal: CTS on PA21 mux B */ 221 #define MUX_PA21B_USART1_CTS _L_(1) 222 #define PINMUX_PA21B_USART1_CTS ((PIN_PA21B_USART1_CTS << 16) | MUX_PA21B_USART1_CTS) 223 #define GPIO_PA21B_USART1_CTS _UL_(1 << 21) 224 #define PIN_PA13A_USART1_RTS _L_(13) /**< \brief USART1 signal: RTS on PA13 mux A */ 225 #define MUX_PA13A_USART1_RTS _L_(0) 226 #define PINMUX_PA13A_USART1_RTS ((PIN_PA13A_USART1_RTS << 16) | MUX_PA13A_USART1_RTS) 227 #define GPIO_PA13A_USART1_RTS _UL_(1 << 13) 228 #define PIN_PA15A_USART1_RXD _L_(15) /**< \brief USART1 signal: RXD on PA15 mux A */ 229 #define MUX_PA15A_USART1_RXD _L_(0) 230 #define PINMUX_PA15A_USART1_RXD ((PIN_PA15A_USART1_RXD << 16) | MUX_PA15A_USART1_RXD) 231 #define GPIO_PA15A_USART1_RXD _UL_(1 << 15) 232 #define PIN_PA16A_USART1_TXD _L_(16) /**< \brief USART1 signal: TXD on PA16 mux A */ 233 #define MUX_PA16A_USART1_TXD _L_(0) 234 #define PINMUX_PA16A_USART1_TXD ((PIN_PA16A_USART1_TXD << 16) | MUX_PA16A_USART1_TXD) 235 #define GPIO_PA16A_USART1_TXD _UL_(1 << 16) 236 /* ========== GPIO definition for USART2 peripheral ========== */ 237 #define PIN_PA18A_USART2_CLK _L_(18) /**< \brief USART2 signal: CLK on PA18 mux A */ 238 #define MUX_PA18A_USART2_CLK _L_(0) 239 #define PINMUX_PA18A_USART2_CLK ((PIN_PA18A_USART2_CLK << 16) | MUX_PA18A_USART2_CLK) 240 #define GPIO_PA18A_USART2_CLK _UL_(1 << 18) 241 #define PIN_PA22B_USART2_CTS _L_(22) /**< \brief USART2 signal: CTS on PA22 mux B */ 242 #define MUX_PA22B_USART2_CTS _L_(1) 243 #define PINMUX_PA22B_USART2_CTS ((PIN_PA22B_USART2_CTS << 16) | MUX_PA22B_USART2_CTS) 244 #define GPIO_PA22B_USART2_CTS _UL_(1 << 22) 245 #define PIN_PA17A_USART2_RTS _L_(17) /**< \brief USART2 signal: RTS on PA17 mux A */ 246 #define MUX_PA17A_USART2_RTS _L_(0) 247 #define PINMUX_PA17A_USART2_RTS ((PIN_PA17A_USART2_RTS << 16) | MUX_PA17A_USART2_RTS) 248 #define GPIO_PA17A_USART2_RTS _UL_(1 << 17) 249 #define PIN_PA25B_USART2_RXD _L_(25) /**< \brief USART2 signal: RXD on PA25 mux B */ 250 #define MUX_PA25B_USART2_RXD _L_(1) 251 #define PINMUX_PA25B_USART2_RXD ((PIN_PA25B_USART2_RXD << 16) | MUX_PA25B_USART2_RXD) 252 #define GPIO_PA25B_USART2_RXD _UL_(1 << 25) 253 #define PIN_PA19A_USART2_RXD _L_(19) /**< \brief USART2 signal: RXD on PA19 mux A */ 254 #define MUX_PA19A_USART2_RXD _L_(0) 255 #define PINMUX_PA19A_USART2_RXD ((PIN_PA19A_USART2_RXD << 16) | MUX_PA19A_USART2_RXD) 256 #define GPIO_PA19A_USART2_RXD _UL_(1 << 19) 257 #define PIN_PA26B_USART2_TXD _L_(26) /**< \brief USART2 signal: TXD on PA26 mux B */ 258 #define MUX_PA26B_USART2_TXD _L_(1) 259 #define PINMUX_PA26B_USART2_TXD ((PIN_PA26B_USART2_TXD << 16) | MUX_PA26B_USART2_TXD) 260 #define GPIO_PA26B_USART2_TXD _UL_(1 << 26) 261 #define PIN_PA20A_USART2_TXD _L_(20) /**< \brief USART2 signal: TXD on PA20 mux A */ 262 #define MUX_PA20A_USART2_TXD _L_(0) 263 #define PINMUX_PA20A_USART2_TXD ((PIN_PA20A_USART2_TXD << 16) | MUX_PA20A_USART2_TXD) 264 #define GPIO_PA20A_USART2_TXD _UL_(1 << 20) 265 /* ========== GPIO definition for ADCIFE peripheral ========== */ 266 #define PIN_PA04A_ADCIFE_AD0 _L_(4) /**< \brief ADCIFE signal: AD0 on PA04 mux A */ 267 #define MUX_PA04A_ADCIFE_AD0 _L_(0) 268 #define PINMUX_PA04A_ADCIFE_AD0 ((PIN_PA04A_ADCIFE_AD0 << 16) | MUX_PA04A_ADCIFE_AD0) 269 #define GPIO_PA04A_ADCIFE_AD0 _UL_(1 << 4) 270 #define PIN_PA05A_ADCIFE_AD1 _L_(5) /**< \brief ADCIFE signal: AD1 on PA05 mux A */ 271 #define MUX_PA05A_ADCIFE_AD1 _L_(0) 272 #define PINMUX_PA05A_ADCIFE_AD1 ((PIN_PA05A_ADCIFE_AD1 << 16) | MUX_PA05A_ADCIFE_AD1) 273 #define GPIO_PA05A_ADCIFE_AD1 _UL_(1 << 5) 274 #define PIN_PA07A_ADCIFE_AD2 _L_(7) /**< \brief ADCIFE signal: AD2 on PA07 mux A */ 275 #define MUX_PA07A_ADCIFE_AD2 _L_(0) 276 #define PINMUX_PA07A_ADCIFE_AD2 ((PIN_PA07A_ADCIFE_AD2 << 16) | MUX_PA07A_ADCIFE_AD2) 277 #define GPIO_PA07A_ADCIFE_AD2 _UL_(1 << 7) 278 #define PIN_PA05E_ADCIFE_TRIGGER _L_(5) /**< \brief ADCIFE signal: TRIGGER on PA05 mux E */ 279 #define MUX_PA05E_ADCIFE_TRIGGER _L_(4) 280 #define PINMUX_PA05E_ADCIFE_TRIGGER ((PIN_PA05E_ADCIFE_TRIGGER << 16) | MUX_PA05E_ADCIFE_TRIGGER) 281 #define GPIO_PA05E_ADCIFE_TRIGGER _UL_(1 << 5) 282 /* ========== GPIO definition for DACC peripheral ========== */ 283 #define PIN_PA06A_DACC_VOUT _L_(6) /**< \brief DACC signal: VOUT on PA06 mux A */ 284 #define MUX_PA06A_DACC_VOUT _L_(0) 285 #define PINMUX_PA06A_DACC_VOUT ((PIN_PA06A_DACC_VOUT << 16) | MUX_PA06A_DACC_VOUT) 286 #define GPIO_PA06A_DACC_VOUT _UL_(1 << 6) 287 /* ========== GPIO definition for ACIFC peripheral ========== */ 288 #define PIN_PA06E_ACIFC_ACAN0 _L_(6) /**< \brief ACIFC signal: ACAN0 on PA06 mux E */ 289 #define MUX_PA06E_ACIFC_ACAN0 _L_(4) 290 #define PINMUX_PA06E_ACIFC_ACAN0 ((PIN_PA06E_ACIFC_ACAN0 << 16) | MUX_PA06E_ACIFC_ACAN0) 291 #define GPIO_PA06E_ACIFC_ACAN0 _UL_(1 << 6) 292 #define PIN_PA07E_ACIFC_ACAP0 _L_(7) /**< \brief ACIFC signal: ACAP0 on PA07 mux E */ 293 #define MUX_PA07E_ACIFC_ACAP0 _L_(4) 294 #define PINMUX_PA07E_ACIFC_ACAP0 ((PIN_PA07E_ACIFC_ACAP0 << 16) | MUX_PA07E_ACIFC_ACAP0) 295 #define GPIO_PA07E_ACIFC_ACAP0 _UL_(1 << 7) 296 /* ========== GPIO definition for GLOC peripheral ========== */ 297 #define PIN_PA06D_GLOC_IN0 _L_(6) /**< \brief GLOC signal: IN0 on PA06 mux D */ 298 #define MUX_PA06D_GLOC_IN0 _L_(3) 299 #define PINMUX_PA06D_GLOC_IN0 ((PIN_PA06D_GLOC_IN0 << 16) | MUX_PA06D_GLOC_IN0) 300 #define GPIO_PA06D_GLOC_IN0 _UL_(1 << 6) 301 #define PIN_PA20D_GLOC_IN0 _L_(20) /**< \brief GLOC signal: IN0 on PA20 mux D */ 302 #define MUX_PA20D_GLOC_IN0 _L_(3) 303 #define PINMUX_PA20D_GLOC_IN0 ((PIN_PA20D_GLOC_IN0 << 16) | MUX_PA20D_GLOC_IN0) 304 #define GPIO_PA20D_GLOC_IN0 _UL_(1 << 20) 305 #define PIN_PA04D_GLOC_IN1 _L_(4) /**< \brief GLOC signal: IN1 on PA04 mux D */ 306 #define MUX_PA04D_GLOC_IN1 _L_(3) 307 #define PINMUX_PA04D_GLOC_IN1 ((PIN_PA04D_GLOC_IN1 << 16) | MUX_PA04D_GLOC_IN1) 308 #define GPIO_PA04D_GLOC_IN1 _UL_(1 << 4) 309 #define PIN_PA21D_GLOC_IN1 _L_(21) /**< \brief GLOC signal: IN1 on PA21 mux D */ 310 #define MUX_PA21D_GLOC_IN1 _L_(3) 311 #define PINMUX_PA21D_GLOC_IN1 ((PIN_PA21D_GLOC_IN1 << 16) | MUX_PA21D_GLOC_IN1) 312 #define GPIO_PA21D_GLOC_IN1 _UL_(1 << 21) 313 #define PIN_PA05D_GLOC_IN2 _L_(5) /**< \brief GLOC signal: IN2 on PA05 mux D */ 314 #define MUX_PA05D_GLOC_IN2 _L_(3) 315 #define PINMUX_PA05D_GLOC_IN2 ((PIN_PA05D_GLOC_IN2 << 16) | MUX_PA05D_GLOC_IN2) 316 #define GPIO_PA05D_GLOC_IN2 _UL_(1 << 5) 317 #define PIN_PA22D_GLOC_IN2 _L_(22) /**< \brief GLOC signal: IN2 on PA22 mux D */ 318 #define MUX_PA22D_GLOC_IN2 _L_(3) 319 #define PINMUX_PA22D_GLOC_IN2 ((PIN_PA22D_GLOC_IN2 << 16) | MUX_PA22D_GLOC_IN2) 320 #define GPIO_PA22D_GLOC_IN2 _UL_(1 << 22) 321 #define PIN_PA07D_GLOC_IN3 _L_(7) /**< \brief GLOC signal: IN3 on PA07 mux D */ 322 #define MUX_PA07D_GLOC_IN3 _L_(3) 323 #define PINMUX_PA07D_GLOC_IN3 ((PIN_PA07D_GLOC_IN3 << 16) | MUX_PA07D_GLOC_IN3) 324 #define GPIO_PA07D_GLOC_IN3 _UL_(1 << 7) 325 #define PIN_PA23D_GLOC_IN3 _L_(23) /**< \brief GLOC signal: IN3 on PA23 mux D */ 326 #define MUX_PA23D_GLOC_IN3 _L_(3) 327 #define PINMUX_PA23D_GLOC_IN3 ((PIN_PA23D_GLOC_IN3 << 16) | MUX_PA23D_GLOC_IN3) 328 #define GPIO_PA23D_GLOC_IN3 _UL_(1 << 23) 329 #define PIN_PA08D_GLOC_OUT0 _L_(8) /**< \brief GLOC signal: OUT0 on PA08 mux D */ 330 #define MUX_PA08D_GLOC_OUT0 _L_(3) 331 #define PINMUX_PA08D_GLOC_OUT0 ((PIN_PA08D_GLOC_OUT0 << 16) | MUX_PA08D_GLOC_OUT0) 332 #define GPIO_PA08D_GLOC_OUT0 _UL_(1 << 8) 333 #define PIN_PA24D_GLOC_OUT0 _L_(24) /**< \brief GLOC signal: OUT0 on PA24 mux D */ 334 #define MUX_PA24D_GLOC_OUT0 _L_(3) 335 #define PINMUX_PA24D_GLOC_OUT0 ((PIN_PA24D_GLOC_OUT0 << 16) | MUX_PA24D_GLOC_OUT0) 336 #define GPIO_PA24D_GLOC_OUT0 _UL_(1 << 24) 337 /* ========== GPIO definition for ABDACB peripheral ========== */ 338 #define PIN_PA17B_ABDACB_DAC0 _L_(17) /**< \brief ABDACB signal: DAC0 on PA17 mux B */ 339 #define MUX_PA17B_ABDACB_DAC0 _L_(1) 340 #define PINMUX_PA17B_ABDACB_DAC0 ((PIN_PA17B_ABDACB_DAC0 << 16) | MUX_PA17B_ABDACB_DAC0) 341 #define GPIO_PA17B_ABDACB_DAC0 _UL_(1 << 17) 342 #define PIN_PA19B_ABDACB_DAC1 _L_(19) /**< \brief ABDACB signal: DAC1 on PA19 mux B */ 343 #define MUX_PA19B_ABDACB_DAC1 _L_(1) 344 #define PINMUX_PA19B_ABDACB_DAC1 ((PIN_PA19B_ABDACB_DAC1 << 16) | MUX_PA19B_ABDACB_DAC1) 345 #define GPIO_PA19B_ABDACB_DAC1 _UL_(1 << 19) 346 #define PIN_PA18B_ABDACB_DACN0 _L_(18) /**< \brief ABDACB signal: DACN0 on PA18 mux B */ 347 #define MUX_PA18B_ABDACB_DACN0 _L_(1) 348 #define PINMUX_PA18B_ABDACB_DACN0 ((PIN_PA18B_ABDACB_DACN0 << 16) | MUX_PA18B_ABDACB_DACN0) 349 #define GPIO_PA18B_ABDACB_DACN0 _UL_(1 << 18) 350 #define PIN_PA20B_ABDACB_DACN1 _L_(20) /**< \brief ABDACB signal: DACN1 on PA20 mux B */ 351 #define MUX_PA20B_ABDACB_DACN1 _L_(1) 352 #define PINMUX_PA20B_ABDACB_DACN1 ((PIN_PA20B_ABDACB_DACN1 << 16) | MUX_PA20B_ABDACB_DACN1) 353 #define GPIO_PA20B_ABDACB_DACN1 _UL_(1 << 20) 354 /* ========== GPIO definition for PARC peripheral ========== */ 355 #define PIN_PA17D_PARC_PCCK _L_(17) /**< \brief PARC signal: PCCK on PA17 mux D */ 356 #define MUX_PA17D_PARC_PCCK _L_(3) 357 #define PINMUX_PA17D_PARC_PCCK ((PIN_PA17D_PARC_PCCK << 16) | MUX_PA17D_PARC_PCCK) 358 #define GPIO_PA17D_PARC_PCCK _UL_(1 << 17) 359 #define PIN_PA09D_PARC_PCDATA0 _L_(9) /**< \brief PARC signal: PCDATA0 on PA09 mux D */ 360 #define MUX_PA09D_PARC_PCDATA0 _L_(3) 361 #define PINMUX_PA09D_PARC_PCDATA0 ((PIN_PA09D_PARC_PCDATA0 << 16) | MUX_PA09D_PARC_PCDATA0) 362 #define GPIO_PA09D_PARC_PCDATA0 _UL_(1 << 9) 363 #define PIN_PA10D_PARC_PCDATA1 _L_(10) /**< \brief PARC signal: PCDATA1 on PA10 mux D */ 364 #define MUX_PA10D_PARC_PCDATA1 _L_(3) 365 #define PINMUX_PA10D_PARC_PCDATA1 ((PIN_PA10D_PARC_PCDATA1 << 16) | MUX_PA10D_PARC_PCDATA1) 366 #define GPIO_PA10D_PARC_PCDATA1 _UL_(1 << 10) 367 #define PIN_PA11D_PARC_PCDATA2 _L_(11) /**< \brief PARC signal: PCDATA2 on PA11 mux D */ 368 #define MUX_PA11D_PARC_PCDATA2 _L_(3) 369 #define PINMUX_PA11D_PARC_PCDATA2 ((PIN_PA11D_PARC_PCDATA2 << 16) | MUX_PA11D_PARC_PCDATA2) 370 #define GPIO_PA11D_PARC_PCDATA2 _UL_(1 << 11) 371 #define PIN_PA12D_PARC_PCDATA3 _L_(12) /**< \brief PARC signal: PCDATA3 on PA12 mux D */ 372 #define MUX_PA12D_PARC_PCDATA3 _L_(3) 373 #define PINMUX_PA12D_PARC_PCDATA3 ((PIN_PA12D_PARC_PCDATA3 << 16) | MUX_PA12D_PARC_PCDATA3) 374 #define GPIO_PA12D_PARC_PCDATA3 _UL_(1 << 12) 375 #define PIN_PA13D_PARC_PCDATA4 _L_(13) /**< \brief PARC signal: PCDATA4 on PA13 mux D */ 376 #define MUX_PA13D_PARC_PCDATA4 _L_(3) 377 #define PINMUX_PA13D_PARC_PCDATA4 ((PIN_PA13D_PARC_PCDATA4 << 16) | MUX_PA13D_PARC_PCDATA4) 378 #define GPIO_PA13D_PARC_PCDATA4 _UL_(1 << 13) 379 #define PIN_PA14D_PARC_PCDATA5 _L_(14) /**< \brief PARC signal: PCDATA5 on PA14 mux D */ 380 #define MUX_PA14D_PARC_PCDATA5 _L_(3) 381 #define PINMUX_PA14D_PARC_PCDATA5 ((PIN_PA14D_PARC_PCDATA5 << 16) | MUX_PA14D_PARC_PCDATA5) 382 #define GPIO_PA14D_PARC_PCDATA5 _UL_(1 << 14) 383 #define PIN_PA15D_PARC_PCDATA6 _L_(15) /**< \brief PARC signal: PCDATA6 on PA15 mux D */ 384 #define MUX_PA15D_PARC_PCDATA6 _L_(3) 385 #define PINMUX_PA15D_PARC_PCDATA6 ((PIN_PA15D_PARC_PCDATA6 << 16) | MUX_PA15D_PARC_PCDATA6) 386 #define GPIO_PA15D_PARC_PCDATA6 _UL_(1 << 15) 387 #define PIN_PA16D_PARC_PCDATA7 _L_(16) /**< \brief PARC signal: PCDATA7 on PA16 mux D */ 388 #define MUX_PA16D_PARC_PCDATA7 _L_(3) 389 #define PINMUX_PA16D_PARC_PCDATA7 ((PIN_PA16D_PARC_PCDATA7 << 16) | MUX_PA16D_PARC_PCDATA7) 390 #define GPIO_PA16D_PARC_PCDATA7 _UL_(1 << 16) 391 #define PIN_PA18D_PARC_PCEN1 _L_(18) /**< \brief PARC signal: PCEN1 on PA18 mux D */ 392 #define MUX_PA18D_PARC_PCEN1 _L_(3) 393 #define PINMUX_PA18D_PARC_PCEN1 ((PIN_PA18D_PARC_PCEN1 << 16) | MUX_PA18D_PARC_PCEN1) 394 #define GPIO_PA18D_PARC_PCEN1 _UL_(1 << 18) 395 #define PIN_PA19D_PARC_PCEN2 _L_(19) /**< \brief PARC signal: PCEN2 on PA19 mux D */ 396 #define MUX_PA19D_PARC_PCEN2 _L_(3) 397 #define PINMUX_PA19D_PARC_PCEN2 ((PIN_PA19D_PARC_PCEN2 << 16) | MUX_PA19D_PARC_PCEN2) 398 #define GPIO_PA19D_PARC_PCEN2 _UL_(1 << 19) 399 /* ========== GPIO definition for CATB peripheral ========== */ 400 #define PIN_PA02G_CATB_DIS _L_(2) /**< \brief CATB signal: DIS on PA02 mux G */ 401 #define MUX_PA02G_CATB_DIS _L_(6) 402 #define PINMUX_PA02G_CATB_DIS ((PIN_PA02G_CATB_DIS << 16) | MUX_PA02G_CATB_DIS) 403 #define GPIO_PA02G_CATB_DIS _UL_(1 << 2) 404 #define PIN_PA12G_CATB_DIS _L_(12) /**< \brief CATB signal: DIS on PA12 mux G */ 405 #define MUX_PA12G_CATB_DIS _L_(6) 406 #define PINMUX_PA12G_CATB_DIS ((PIN_PA12G_CATB_DIS << 16) | MUX_PA12G_CATB_DIS) 407 #define GPIO_PA12G_CATB_DIS _UL_(1 << 12) 408 #define PIN_PA23G_CATB_DIS _L_(23) /**< \brief CATB signal: DIS on PA23 mux G */ 409 #define MUX_PA23G_CATB_DIS _L_(6) 410 #define PINMUX_PA23G_CATB_DIS ((PIN_PA23G_CATB_DIS << 16) | MUX_PA23G_CATB_DIS) 411 #define GPIO_PA23G_CATB_DIS _UL_(1 << 23) 412 #define PIN_PA04G_CATB_SENSE0 _L_(4) /**< \brief CATB signal: SENSE0 on PA04 mux G */ 413 #define MUX_PA04G_CATB_SENSE0 _L_(6) 414 #define PINMUX_PA04G_CATB_SENSE0 ((PIN_PA04G_CATB_SENSE0 << 16) | MUX_PA04G_CATB_SENSE0) 415 #define GPIO_PA04G_CATB_SENSE0 _UL_(1 << 4) 416 #define PIN_PA05G_CATB_SENSE1 _L_(5) /**< \brief CATB signal: SENSE1 on PA05 mux G */ 417 #define MUX_PA05G_CATB_SENSE1 _L_(6) 418 #define PINMUX_PA05G_CATB_SENSE1 ((PIN_PA05G_CATB_SENSE1 << 16) | MUX_PA05G_CATB_SENSE1) 419 #define GPIO_PA05G_CATB_SENSE1 _UL_(1 << 5) 420 #define PIN_PA06G_CATB_SENSE2 _L_(6) /**< \brief CATB signal: SENSE2 on PA06 mux G */ 421 #define MUX_PA06G_CATB_SENSE2 _L_(6) 422 #define PINMUX_PA06G_CATB_SENSE2 ((PIN_PA06G_CATB_SENSE2 << 16) | MUX_PA06G_CATB_SENSE2) 423 #define GPIO_PA06G_CATB_SENSE2 _UL_(1 << 6) 424 #define PIN_PA07G_CATB_SENSE3 _L_(7) /**< \brief CATB signal: SENSE3 on PA07 mux G */ 425 #define MUX_PA07G_CATB_SENSE3 _L_(6) 426 #define PINMUX_PA07G_CATB_SENSE3 ((PIN_PA07G_CATB_SENSE3 << 16) | MUX_PA07G_CATB_SENSE3) 427 #define GPIO_PA07G_CATB_SENSE3 _UL_(1 << 7) 428 #define PIN_PA08G_CATB_SENSE4 _L_(8) /**< \brief CATB signal: SENSE4 on PA08 mux G */ 429 #define MUX_PA08G_CATB_SENSE4 _L_(6) 430 #define PINMUX_PA08G_CATB_SENSE4 ((PIN_PA08G_CATB_SENSE4 << 16) | MUX_PA08G_CATB_SENSE4) 431 #define GPIO_PA08G_CATB_SENSE4 _UL_(1 << 8) 432 #define PIN_PA09G_CATB_SENSE5 _L_(9) /**< \brief CATB signal: SENSE5 on PA09 mux G */ 433 #define MUX_PA09G_CATB_SENSE5 _L_(6) 434 #define PINMUX_PA09G_CATB_SENSE5 ((PIN_PA09G_CATB_SENSE5 << 16) | MUX_PA09G_CATB_SENSE5) 435 #define GPIO_PA09G_CATB_SENSE5 _UL_(1 << 9) 436 #define PIN_PA10G_CATB_SENSE6 _L_(10) /**< \brief CATB signal: SENSE6 on PA10 mux G */ 437 #define MUX_PA10G_CATB_SENSE6 _L_(6) 438 #define PINMUX_PA10G_CATB_SENSE6 ((PIN_PA10G_CATB_SENSE6 << 16) | MUX_PA10G_CATB_SENSE6) 439 #define GPIO_PA10G_CATB_SENSE6 _UL_(1 << 10) 440 #define PIN_PA11G_CATB_SENSE7 _L_(11) /**< \brief CATB signal: SENSE7 on PA11 mux G */ 441 #define MUX_PA11G_CATB_SENSE7 _L_(6) 442 #define PINMUX_PA11G_CATB_SENSE7 ((PIN_PA11G_CATB_SENSE7 << 16) | MUX_PA11G_CATB_SENSE7) 443 #define GPIO_PA11G_CATB_SENSE7 _UL_(1 << 11) 444 #define PIN_PA13G_CATB_SENSE8 _L_(13) /**< \brief CATB signal: SENSE8 on PA13 mux G */ 445 #define MUX_PA13G_CATB_SENSE8 _L_(6) 446 #define PINMUX_PA13G_CATB_SENSE8 ((PIN_PA13G_CATB_SENSE8 << 16) | MUX_PA13G_CATB_SENSE8) 447 #define GPIO_PA13G_CATB_SENSE8 _UL_(1 << 13) 448 #define PIN_PA14G_CATB_SENSE9 _L_(14) /**< \brief CATB signal: SENSE9 on PA14 mux G */ 449 #define MUX_PA14G_CATB_SENSE9 _L_(6) 450 #define PINMUX_PA14G_CATB_SENSE9 ((PIN_PA14G_CATB_SENSE9 << 16) | MUX_PA14G_CATB_SENSE9) 451 #define GPIO_PA14G_CATB_SENSE9 _UL_(1 << 14) 452 #define PIN_PA15G_CATB_SENSE10 _L_(15) /**< \brief CATB signal: SENSE10 on PA15 mux G */ 453 #define MUX_PA15G_CATB_SENSE10 _L_(6) 454 #define PINMUX_PA15G_CATB_SENSE10 ((PIN_PA15G_CATB_SENSE10 << 16) | MUX_PA15G_CATB_SENSE10) 455 #define GPIO_PA15G_CATB_SENSE10 _UL_(1 << 15) 456 #define PIN_PA16G_CATB_SENSE11 _L_(16) /**< \brief CATB signal: SENSE11 on PA16 mux G */ 457 #define MUX_PA16G_CATB_SENSE11 _L_(6) 458 #define PINMUX_PA16G_CATB_SENSE11 ((PIN_PA16G_CATB_SENSE11 << 16) | MUX_PA16G_CATB_SENSE11) 459 #define GPIO_PA16G_CATB_SENSE11 _UL_(1 << 16) 460 #define PIN_PA17G_CATB_SENSE12 _L_(17) /**< \brief CATB signal: SENSE12 on PA17 mux G */ 461 #define MUX_PA17G_CATB_SENSE12 _L_(6) 462 #define PINMUX_PA17G_CATB_SENSE12 ((PIN_PA17G_CATB_SENSE12 << 16) | MUX_PA17G_CATB_SENSE12) 463 #define GPIO_PA17G_CATB_SENSE12 _UL_(1 << 17) 464 #define PIN_PA18G_CATB_SENSE13 _L_(18) /**< \brief CATB signal: SENSE13 on PA18 mux G */ 465 #define MUX_PA18G_CATB_SENSE13 _L_(6) 466 #define PINMUX_PA18G_CATB_SENSE13 ((PIN_PA18G_CATB_SENSE13 << 16) | MUX_PA18G_CATB_SENSE13) 467 #define GPIO_PA18G_CATB_SENSE13 _UL_(1 << 18) 468 #define PIN_PA19G_CATB_SENSE14 _L_(19) /**< \brief CATB signal: SENSE14 on PA19 mux G */ 469 #define MUX_PA19G_CATB_SENSE14 _L_(6) 470 #define PINMUX_PA19G_CATB_SENSE14 ((PIN_PA19G_CATB_SENSE14 << 16) | MUX_PA19G_CATB_SENSE14) 471 #define GPIO_PA19G_CATB_SENSE14 _UL_(1 << 19) 472 #define PIN_PA20G_CATB_SENSE15 _L_(20) /**< \brief CATB signal: SENSE15 on PA20 mux G */ 473 #define MUX_PA20G_CATB_SENSE15 _L_(6) 474 #define PINMUX_PA20G_CATB_SENSE15 ((PIN_PA20G_CATB_SENSE15 << 16) | MUX_PA20G_CATB_SENSE15) 475 #define GPIO_PA20G_CATB_SENSE15 _UL_(1 << 20) 476 #define PIN_PA21G_CATB_SENSE16 _L_(21) /**< \brief CATB signal: SENSE16 on PA21 mux G */ 477 #define MUX_PA21G_CATB_SENSE16 _L_(6) 478 #define PINMUX_PA21G_CATB_SENSE16 ((PIN_PA21G_CATB_SENSE16 << 16) | MUX_PA21G_CATB_SENSE16) 479 #define GPIO_PA21G_CATB_SENSE16 _UL_(1 << 21) 480 #define PIN_PA22G_CATB_SENSE17 _L_(22) /**< \brief CATB signal: SENSE17 on PA22 mux G */ 481 #define MUX_PA22G_CATB_SENSE17 _L_(6) 482 #define PINMUX_PA22G_CATB_SENSE17 ((PIN_PA22G_CATB_SENSE17 << 16) | MUX_PA22G_CATB_SENSE17) 483 #define GPIO_PA22G_CATB_SENSE17 _UL_(1 << 22) 484 #define PIN_PA24G_CATB_SENSE18 _L_(24) /**< \brief CATB signal: SENSE18 on PA24 mux G */ 485 #define MUX_PA24G_CATB_SENSE18 _L_(6) 486 #define PINMUX_PA24G_CATB_SENSE18 ((PIN_PA24G_CATB_SENSE18 << 16) | MUX_PA24G_CATB_SENSE18) 487 #define GPIO_PA24G_CATB_SENSE18 _UL_(1 << 24) 488 #define PIN_PA25G_CATB_SENSE19 _L_(25) /**< \brief CATB signal: SENSE19 on PA25 mux G */ 489 #define MUX_PA25G_CATB_SENSE19 _L_(6) 490 #define PINMUX_PA25G_CATB_SENSE19 ((PIN_PA25G_CATB_SENSE19 << 16) | MUX_PA25G_CATB_SENSE19) 491 #define GPIO_PA25G_CATB_SENSE19 _UL_(1 << 25) 492 #define PIN_PA26G_CATB_SENSE20 _L_(26) /**< \brief CATB signal: SENSE20 on PA26 mux G */ 493 #define MUX_PA26G_CATB_SENSE20 _L_(6) 494 #define PINMUX_PA26G_CATB_SENSE20 ((PIN_PA26G_CATB_SENSE20 << 16) | MUX_PA26G_CATB_SENSE20) 495 #define GPIO_PA26G_CATB_SENSE20 _UL_(1 << 26) 496 /* ========== GPIO definition for LCDCA peripheral ========== */ 497 #define PIN_PA12F_LCDCA_COM0 _L_(12) /**< \brief LCDCA signal: COM0 on PA12 mux F */ 498 #define MUX_PA12F_LCDCA_COM0 _L_(5) 499 #define PINMUX_PA12F_LCDCA_COM0 ((PIN_PA12F_LCDCA_COM0 << 16) | MUX_PA12F_LCDCA_COM0) 500 #define GPIO_PA12F_LCDCA_COM0 _UL_(1 << 12) 501 #define PIN_PA11F_LCDCA_COM1 _L_(11) /**< \brief LCDCA signal: COM1 on PA11 mux F */ 502 #define MUX_PA11F_LCDCA_COM1 _L_(5) 503 #define PINMUX_PA11F_LCDCA_COM1 ((PIN_PA11F_LCDCA_COM1 << 16) | MUX_PA11F_LCDCA_COM1) 504 #define GPIO_PA11F_LCDCA_COM1 _UL_(1 << 11) 505 #define PIN_PA10F_LCDCA_COM2 _L_(10) /**< \brief LCDCA signal: COM2 on PA10 mux F */ 506 #define MUX_PA10F_LCDCA_COM2 _L_(5) 507 #define PINMUX_PA10F_LCDCA_COM2 ((PIN_PA10F_LCDCA_COM2 << 16) | MUX_PA10F_LCDCA_COM2) 508 #define GPIO_PA10F_LCDCA_COM2 _UL_(1 << 10) 509 #define PIN_PA09F_LCDCA_COM3 _L_(9) /**< \brief LCDCA signal: COM3 on PA09 mux F */ 510 #define MUX_PA09F_LCDCA_COM3 _L_(5) 511 #define PINMUX_PA09F_LCDCA_COM3 ((PIN_PA09F_LCDCA_COM3 << 16) | MUX_PA09F_LCDCA_COM3) 512 #define GPIO_PA09F_LCDCA_COM3 _UL_(1 << 9) 513 #define PIN_PA13F_LCDCA_SEG5 _L_(13) /**< \brief LCDCA signal: SEG5 on PA13 mux F */ 514 #define MUX_PA13F_LCDCA_SEG5 _L_(5) 515 #define PINMUX_PA13F_LCDCA_SEG5 ((PIN_PA13F_LCDCA_SEG5 << 16) | MUX_PA13F_LCDCA_SEG5) 516 #define GPIO_PA13F_LCDCA_SEG5 _UL_(1 << 13) 517 #define PIN_PA14F_LCDCA_SEG6 _L_(14) /**< \brief LCDCA signal: SEG6 on PA14 mux F */ 518 #define MUX_PA14F_LCDCA_SEG6 _L_(5) 519 #define PINMUX_PA14F_LCDCA_SEG6 ((PIN_PA14F_LCDCA_SEG6 << 16) | MUX_PA14F_LCDCA_SEG6) 520 #define GPIO_PA14F_LCDCA_SEG6 _UL_(1 << 14) 521 #define PIN_PA15F_LCDCA_SEG7 _L_(15) /**< \brief LCDCA signal: SEG7 on PA15 mux F */ 522 #define MUX_PA15F_LCDCA_SEG7 _L_(5) 523 #define PINMUX_PA15F_LCDCA_SEG7 ((PIN_PA15F_LCDCA_SEG7 << 16) | MUX_PA15F_LCDCA_SEG7) 524 #define GPIO_PA15F_LCDCA_SEG7 _UL_(1 << 15) 525 #define PIN_PA16F_LCDCA_SEG8 _L_(16) /**< \brief LCDCA signal: SEG8 on PA16 mux F */ 526 #define MUX_PA16F_LCDCA_SEG8 _L_(5) 527 #define PINMUX_PA16F_LCDCA_SEG8 ((PIN_PA16F_LCDCA_SEG8 << 16) | MUX_PA16F_LCDCA_SEG8) 528 #define GPIO_PA16F_LCDCA_SEG8 _UL_(1 << 16) 529 #define PIN_PA17F_LCDCA_SEG9 _L_(17) /**< \brief LCDCA signal: SEG9 on PA17 mux F */ 530 #define MUX_PA17F_LCDCA_SEG9 _L_(5) 531 #define PINMUX_PA17F_LCDCA_SEG9 ((PIN_PA17F_LCDCA_SEG9 << 16) | MUX_PA17F_LCDCA_SEG9) 532 #define GPIO_PA17F_LCDCA_SEG9 _UL_(1 << 17) 533 #define PIN_PA18F_LCDCA_SEG18 _L_(18) /**< \brief LCDCA signal: SEG18 on PA18 mux F */ 534 #define MUX_PA18F_LCDCA_SEG18 _L_(5) 535 #define PINMUX_PA18F_LCDCA_SEG18 ((PIN_PA18F_LCDCA_SEG18 << 16) | MUX_PA18F_LCDCA_SEG18) 536 #define GPIO_PA18F_LCDCA_SEG18 _UL_(1 << 18) 537 #define PIN_PA19F_LCDCA_SEG19 _L_(19) /**< \brief LCDCA signal: SEG19 on PA19 mux F */ 538 #define MUX_PA19F_LCDCA_SEG19 _L_(5) 539 #define PINMUX_PA19F_LCDCA_SEG19 ((PIN_PA19F_LCDCA_SEG19 << 16) | MUX_PA19F_LCDCA_SEG19) 540 #define GPIO_PA19F_LCDCA_SEG19 _UL_(1 << 19) 541 #define PIN_PA20F_LCDCA_SEG20 _L_(20) /**< \brief LCDCA signal: SEG20 on PA20 mux F */ 542 #define MUX_PA20F_LCDCA_SEG20 _L_(5) 543 #define PINMUX_PA20F_LCDCA_SEG20 ((PIN_PA20F_LCDCA_SEG20 << 16) | MUX_PA20F_LCDCA_SEG20) 544 #define GPIO_PA20F_LCDCA_SEG20 _UL_(1 << 20) 545 #define PIN_PA08F_LCDCA_SEG23 _L_(8) /**< \brief LCDCA signal: SEG23 on PA08 mux F */ 546 #define MUX_PA08F_LCDCA_SEG23 _L_(5) 547 #define PINMUX_PA08F_LCDCA_SEG23 ((PIN_PA08F_LCDCA_SEG23 << 16) | MUX_PA08F_LCDCA_SEG23) 548 #define GPIO_PA08F_LCDCA_SEG23 _UL_(1 << 8) 549 #define PIN_PA21F_LCDCA_SEG34 _L_(21) /**< \brief LCDCA signal: SEG34 on PA21 mux F */ 550 #define MUX_PA21F_LCDCA_SEG34 _L_(5) 551 #define PINMUX_PA21F_LCDCA_SEG34 ((PIN_PA21F_LCDCA_SEG34 << 16) | MUX_PA21F_LCDCA_SEG34) 552 #define GPIO_PA21F_LCDCA_SEG34 _UL_(1 << 21) 553 #define PIN_PA22F_LCDCA_SEG35 _L_(22) /**< \brief LCDCA signal: SEG35 on PA22 mux F */ 554 #define MUX_PA22F_LCDCA_SEG35 _L_(5) 555 #define PINMUX_PA22F_LCDCA_SEG35 ((PIN_PA22F_LCDCA_SEG35 << 16) | MUX_PA22F_LCDCA_SEG35) 556 #define GPIO_PA22F_LCDCA_SEG35 _UL_(1 << 22) 557 #define PIN_PA23F_LCDCA_SEG38 _L_(23) /**< \brief LCDCA signal: SEG38 on PA23 mux F */ 558 #define MUX_PA23F_LCDCA_SEG38 _L_(5) 559 #define PINMUX_PA23F_LCDCA_SEG38 ((PIN_PA23F_LCDCA_SEG38 << 16) | MUX_PA23F_LCDCA_SEG38) 560 #define GPIO_PA23F_LCDCA_SEG38 _UL_(1 << 23) 561 #define PIN_PA24F_LCDCA_SEG39 _L_(24) /**< \brief LCDCA signal: SEG39 on PA24 mux F */ 562 #define MUX_PA24F_LCDCA_SEG39 _L_(5) 563 #define PINMUX_PA24F_LCDCA_SEG39 ((PIN_PA24F_LCDCA_SEG39 << 16) | MUX_PA24F_LCDCA_SEG39) 564 #define GPIO_PA24F_LCDCA_SEG39 _UL_(1 << 24) 565 /* ========== GPIO definition for USBC peripheral ========== */ 566 #define PIN_PA25A_USBC_DM _L_(25) /**< \brief USBC signal: DM on PA25 mux A */ 567 #define MUX_PA25A_USBC_DM _L_(0) 568 #define PINMUX_PA25A_USBC_DM ((PIN_PA25A_USBC_DM << 16) | MUX_PA25A_USBC_DM) 569 #define GPIO_PA25A_USBC_DM _UL_(1 << 25) 570 #define PIN_PA26A_USBC_DP _L_(26) /**< \brief USBC signal: DP on PA26 mux A */ 571 #define MUX_PA26A_USBC_DP _L_(0) 572 #define PINMUX_PA26A_USBC_DP ((PIN_PA26A_USBC_DP << 16) | MUX_PA26A_USBC_DP) 573 #define GPIO_PA26A_USBC_DP _UL_(1 << 26) 574 /* ========== GPIO definition for PEVC peripheral ========== */ 575 #define PIN_PA08C_PEVC_PAD_EVT0 _L_(8) /**< \brief PEVC signal: PAD_EVT0 on PA08 mux C */ 576 #define MUX_PA08C_PEVC_PAD_EVT0 _L_(2) 577 #define PINMUX_PA08C_PEVC_PAD_EVT0 ((PIN_PA08C_PEVC_PAD_EVT0 << 16) | MUX_PA08C_PEVC_PAD_EVT0) 578 #define GPIO_PA08C_PEVC_PAD_EVT0 _UL_(1 << 8) 579 #define PIN_PA09C_PEVC_PAD_EVT1 _L_(9) /**< \brief PEVC signal: PAD_EVT1 on PA09 mux C */ 580 #define MUX_PA09C_PEVC_PAD_EVT1 _L_(2) 581 #define PINMUX_PA09C_PEVC_PAD_EVT1 ((PIN_PA09C_PEVC_PAD_EVT1 << 16) | MUX_PA09C_PEVC_PAD_EVT1) 582 #define GPIO_PA09C_PEVC_PAD_EVT1 _UL_(1 << 9) 583 #define PIN_PA10C_PEVC_PAD_EVT2 _L_(10) /**< \brief PEVC signal: PAD_EVT2 on PA10 mux C */ 584 #define MUX_PA10C_PEVC_PAD_EVT2 _L_(2) 585 #define PINMUX_PA10C_PEVC_PAD_EVT2 ((PIN_PA10C_PEVC_PAD_EVT2 << 16) | MUX_PA10C_PEVC_PAD_EVT2) 586 #define GPIO_PA10C_PEVC_PAD_EVT2 _UL_(1 << 10) 587 #define PIN_PA11C_PEVC_PAD_EVT3 _L_(11) /**< \brief PEVC signal: PAD_EVT3 on PA11 mux C */ 588 #define MUX_PA11C_PEVC_PAD_EVT3 _L_(2) 589 #define PINMUX_PA11C_PEVC_PAD_EVT3 ((PIN_PA11C_PEVC_PAD_EVT3 << 16) | MUX_PA11C_PEVC_PAD_EVT3) 590 #define GPIO_PA11C_PEVC_PAD_EVT3 _UL_(1 << 11) 591 /* ========== GPIO definition for SCIF peripheral ========== */ 592 #define PIN_PA19E_SCIF_GCLK0 _L_(19) /**< \brief SCIF signal: GCLK0 on PA19 mux E */ 593 #define MUX_PA19E_SCIF_GCLK0 _L_(4) 594 #define PINMUX_PA19E_SCIF_GCLK0 ((PIN_PA19E_SCIF_GCLK0 << 16) | MUX_PA19E_SCIF_GCLK0) 595 #define GPIO_PA19E_SCIF_GCLK0 _UL_(1 << 19) 596 #define PIN_PA02A_SCIF_GCLK0 _L_(2) /**< \brief SCIF signal: GCLK0 on PA02 mux A */ 597 #define MUX_PA02A_SCIF_GCLK0 _L_(0) 598 #define PINMUX_PA02A_SCIF_GCLK0 ((PIN_PA02A_SCIF_GCLK0 << 16) | MUX_PA02A_SCIF_GCLK0) 599 #define GPIO_PA02A_SCIF_GCLK0 _UL_(1 << 2) 600 #define PIN_PA20E_SCIF_GCLK1 _L_(20) /**< \brief SCIF signal: GCLK1 on PA20 mux E */ 601 #define MUX_PA20E_SCIF_GCLK1 _L_(4) 602 #define PINMUX_PA20E_SCIF_GCLK1 ((PIN_PA20E_SCIF_GCLK1 << 16) | MUX_PA20E_SCIF_GCLK1) 603 #define GPIO_PA20E_SCIF_GCLK1 _UL_(1 << 20) 604 #define PIN_PA23E_SCIF_GCLK_IN0 _L_(23) /**< \brief SCIF signal: GCLK_IN0 on PA23 mux E */ 605 #define MUX_PA23E_SCIF_GCLK_IN0 _L_(4) 606 #define PINMUX_PA23E_SCIF_GCLK_IN0 ((PIN_PA23E_SCIF_GCLK_IN0 << 16) | MUX_PA23E_SCIF_GCLK_IN0) 607 #define GPIO_PA23E_SCIF_GCLK_IN0 _UL_(1 << 23) 608 #define PIN_PA24E_SCIF_GCLK_IN1 _L_(24) /**< \brief SCIF signal: GCLK_IN1 on PA24 mux E */ 609 #define MUX_PA24E_SCIF_GCLK_IN1 _L_(4) 610 #define PINMUX_PA24E_SCIF_GCLK_IN1 ((PIN_PA24E_SCIF_GCLK_IN1 << 16) | MUX_PA24E_SCIF_GCLK_IN1) 611 #define GPIO_PA24E_SCIF_GCLK_IN1 _UL_(1 << 24) 612 /* ========== GPIO definition for EIC peripheral ========== */ 613 #define PIN_PA06C_EIC_EXTINT1 _L_(6) /**< \brief EIC signal: EXTINT1 on PA06 mux C */ 614 #define MUX_PA06C_EIC_EXTINT1 _L_(2) 615 #define PINMUX_PA06C_EIC_EXTINT1 ((PIN_PA06C_EIC_EXTINT1 << 16) | MUX_PA06C_EIC_EXTINT1) 616 #define GPIO_PA06C_EIC_EXTINT1 _UL_(1 << 6) 617 #define PIN_PA06C_EIC_EXTINT_NUM _L_(1) /**< \brief EIC signal: PIN_PA06 External Interrupt Line */ 618 #define PIN_PA16C_EIC_EXTINT1 _L_(16) /**< \brief EIC signal: EXTINT1 on PA16 mux C */ 619 #define MUX_PA16C_EIC_EXTINT1 _L_(2) 620 #define PINMUX_PA16C_EIC_EXTINT1 ((PIN_PA16C_EIC_EXTINT1 << 16) | MUX_PA16C_EIC_EXTINT1) 621 #define GPIO_PA16C_EIC_EXTINT1 _UL_(1 << 16) 622 #define PIN_PA16C_EIC_EXTINT_NUM _L_(1) /**< \brief EIC signal: PIN_PA16 External Interrupt Line */ 623 #define PIN_PA04C_EIC_EXTINT2 _L_(4) /**< \brief EIC signal: EXTINT2 on PA04 mux C */ 624 #define MUX_PA04C_EIC_EXTINT2 _L_(2) 625 #define PINMUX_PA04C_EIC_EXTINT2 ((PIN_PA04C_EIC_EXTINT2 << 16) | MUX_PA04C_EIC_EXTINT2) 626 #define GPIO_PA04C_EIC_EXTINT2 _UL_(1 << 4) 627 #define PIN_PA04C_EIC_EXTINT_NUM _L_(2) /**< \brief EIC signal: PIN_PA04 External Interrupt Line */ 628 #define PIN_PA17C_EIC_EXTINT2 _L_(17) /**< \brief EIC signal: EXTINT2 on PA17 mux C */ 629 #define MUX_PA17C_EIC_EXTINT2 _L_(2) 630 #define PINMUX_PA17C_EIC_EXTINT2 ((PIN_PA17C_EIC_EXTINT2 << 16) | MUX_PA17C_EIC_EXTINT2) 631 #define GPIO_PA17C_EIC_EXTINT2 _UL_(1 << 17) 632 #define PIN_PA17C_EIC_EXTINT_NUM _L_(2) /**< \brief EIC signal: PIN_PA17 External Interrupt Line */ 633 #define PIN_PA05C_EIC_EXTINT3 _L_(5) /**< \brief EIC signal: EXTINT3 on PA05 mux C */ 634 #define MUX_PA05C_EIC_EXTINT3 _L_(2) 635 #define PINMUX_PA05C_EIC_EXTINT3 ((PIN_PA05C_EIC_EXTINT3 << 16) | MUX_PA05C_EIC_EXTINT3) 636 #define GPIO_PA05C_EIC_EXTINT3 _UL_(1 << 5) 637 #define PIN_PA05C_EIC_EXTINT_NUM _L_(3) /**< \brief EIC signal: PIN_PA05 External Interrupt Line */ 638 #define PIN_PA18C_EIC_EXTINT3 _L_(18) /**< \brief EIC signal: EXTINT3 on PA18 mux C */ 639 #define MUX_PA18C_EIC_EXTINT3 _L_(2) 640 #define PINMUX_PA18C_EIC_EXTINT3 ((PIN_PA18C_EIC_EXTINT3 << 16) | MUX_PA18C_EIC_EXTINT3) 641 #define GPIO_PA18C_EIC_EXTINT3 _UL_(1 << 18) 642 #define PIN_PA18C_EIC_EXTINT_NUM _L_(3) /**< \brief EIC signal: PIN_PA18 External Interrupt Line */ 643 #define PIN_PA07C_EIC_EXTINT4 _L_(7) /**< \brief EIC signal: EXTINT4 on PA07 mux C */ 644 #define MUX_PA07C_EIC_EXTINT4 _L_(2) 645 #define PINMUX_PA07C_EIC_EXTINT4 ((PIN_PA07C_EIC_EXTINT4 << 16) | MUX_PA07C_EIC_EXTINT4) 646 #define GPIO_PA07C_EIC_EXTINT4 _UL_(1 << 7) 647 #define PIN_PA07C_EIC_EXTINT_NUM _L_(4) /**< \brief EIC signal: PIN_PA07 External Interrupt Line */ 648 #define PIN_PA19C_EIC_EXTINT4 _L_(19) /**< \brief EIC signal: EXTINT4 on PA19 mux C */ 649 #define MUX_PA19C_EIC_EXTINT4 _L_(2) 650 #define PINMUX_PA19C_EIC_EXTINT4 ((PIN_PA19C_EIC_EXTINT4 << 16) | MUX_PA19C_EIC_EXTINT4) 651 #define GPIO_PA19C_EIC_EXTINT4 _UL_(1 << 19) 652 #define PIN_PA19C_EIC_EXTINT_NUM _L_(4) /**< \brief EIC signal: PIN_PA19 External Interrupt Line */ 653 #define PIN_PA20C_EIC_EXTINT5 _L_(20) /**< \brief EIC signal: EXTINT5 on PA20 mux C */ 654 #define MUX_PA20C_EIC_EXTINT5 _L_(2) 655 #define PINMUX_PA20C_EIC_EXTINT5 ((PIN_PA20C_EIC_EXTINT5 << 16) | MUX_PA20C_EIC_EXTINT5) 656 #define GPIO_PA20C_EIC_EXTINT5 _UL_(1 << 20) 657 #define PIN_PA20C_EIC_EXTINT_NUM _L_(5) /**< \brief EIC signal: PIN_PA20 External Interrupt Line */ 658 #define PIN_PA21C_EIC_EXTINT6 _L_(21) /**< \brief EIC signal: EXTINT6 on PA21 mux C */ 659 #define MUX_PA21C_EIC_EXTINT6 _L_(2) 660 #define PINMUX_PA21C_EIC_EXTINT6 ((PIN_PA21C_EIC_EXTINT6 << 16) | MUX_PA21C_EIC_EXTINT6) 661 #define GPIO_PA21C_EIC_EXTINT6 _UL_(1 << 21) 662 #define PIN_PA21C_EIC_EXTINT_NUM _L_(6) /**< \brief EIC signal: PIN_PA21 External Interrupt Line */ 663 #define PIN_PA22C_EIC_EXTINT7 _L_(22) /**< \brief EIC signal: EXTINT7 on PA22 mux C */ 664 #define MUX_PA22C_EIC_EXTINT7 _L_(2) 665 #define PINMUX_PA22C_EIC_EXTINT7 ((PIN_PA22C_EIC_EXTINT7 << 16) | MUX_PA22C_EIC_EXTINT7) 666 #define GPIO_PA22C_EIC_EXTINT7 _UL_(1 << 22) 667 #define PIN_PA22C_EIC_EXTINT_NUM _L_(7) /**< \brief EIC signal: PIN_PA22 External Interrupt Line */ 668 #define PIN_PA23C_EIC_EXTINT8 _L_(23) /**< \brief EIC signal: EXTINT8 on PA23 mux C */ 669 #define MUX_PA23C_EIC_EXTINT8 _L_(2) 670 #define PINMUX_PA23C_EIC_EXTINT8 ((PIN_PA23C_EIC_EXTINT8 << 16) | MUX_PA23C_EIC_EXTINT8) 671 #define GPIO_PA23C_EIC_EXTINT8 _UL_(1 << 23) 672 #define PIN_PA23C_EIC_EXTINT_NUM _L_(8) /**< \brief EIC signal: PIN_PA23 External Interrupt Line */ 673 674 #endif /* _SAM4LC4A_PIO_ */ 675
