1 /* 2 * Autogenerated file 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h> 8 9 /* pa0_gpio */ 10 #define PA0_GPIO \ 11 SAM_PINMUX(a, 0, gpio, gpio) 12 13 /* pa1_gpio */ 14 #define PA1_GPIO \ 15 SAM_PINMUX(a, 1, gpio, gpio) 16 17 /* pa2_gpio */ 18 #define PA2_GPIO \ 19 SAM_PINMUX(a, 2, gpio, gpio) 20 21 /* pa2a_scif_gclk0 */ 22 #define PA2A_SCIF_GCLK0 \ 23 SAM_PINMUX(a, 2, a, periph) 24 25 /* pa2b_spi_npcs0 */ 26 #define PA2B_SPI_NPCS0 \ 27 SAM_PINMUX(a, 2, b, periph) 28 29 /* pa2g_catb_dis */ 30 #define PA2G_CATB_DIS \ 31 SAM_PINMUX(a, 2, g, periph) 32 33 /* pa3_gpio */ 34 #define PA3_GPIO \ 35 SAM_PINMUX(a, 3, gpio, gpio) 36 37 /* pa3b_spi_miso */ 38 #define PA3B_SPI_MISO \ 39 SAM_PINMUX(a, 3, b, periph) 40 41 /* pa4_gpio */ 42 #define PA4_GPIO \ 43 SAM_PINMUX(a, 4, gpio, gpio) 44 45 /* pa4a_adcife_ad0 */ 46 #define PA4A_ADCIFE_AD0 \ 47 SAM_PINMUX(a, 4, a, periph) 48 49 /* pa4b_usart0_clk */ 50 #define PA4B_USART0_CLK \ 51 SAM_PINMUX(a, 4, b, periph) 52 53 /* pa4c_eic_extint2 */ 54 #define PA4C_EIC_EXTINT2 \ 55 SAM_PINMUX(a, 4, c, periph) 56 57 /* pa4d_gloc_in1 */ 58 #define PA4D_GLOC_IN1 \ 59 SAM_PINMUX(a, 4, d, periph) 60 61 /* pa4g_catb_sense0 */ 62 #define PA4G_CATB_SENSE0 \ 63 SAM_PINMUX(a, 4, g, periph) 64 65 /* pa5_gpio */ 66 #define PA5_GPIO \ 67 SAM_PINMUX(a, 5, gpio, gpio) 68 69 /* pa5a_adcife_ad1 */ 70 #define PA5A_ADCIFE_AD1 \ 71 SAM_PINMUX(a, 5, a, periph) 72 73 /* pa5b_usart0_rxd */ 74 #define PA5B_USART0_RXD \ 75 SAM_PINMUX(a, 5, b, periph) 76 77 /* pa5c_eic_extint3 */ 78 #define PA5C_EIC_EXTINT3 \ 79 SAM_PINMUX(a, 5, c, periph) 80 81 /* pa5d_gloc_in2 */ 82 #define PA5D_GLOC_IN2 \ 83 SAM_PINMUX(a, 5, d, periph) 84 85 /* pa5e_adcife_trigger */ 86 #define PA5E_ADCIFE_TRIGGER \ 87 SAM_PINMUX(a, 5, e, periph) 88 89 /* pa5g_catb_sense1 */ 90 #define PA5G_CATB_SENSE1 \ 91 SAM_PINMUX(a, 5, g, periph) 92 93 /* pa6_gpio */ 94 #define PA6_GPIO \ 95 SAM_PINMUX(a, 6, gpio, gpio) 96 97 /* pa6a_dacc_vout */ 98 #define PA6A_DACC_VOUT \ 99 SAM_PINMUX(a, 6, a, periph) 100 101 /* pa6b_usart0_rts */ 102 #define PA6B_USART0_RTS \ 103 SAM_PINMUX(a, 6, b, periph) 104 105 /* pa6c_eic_extint1 */ 106 #define PA6C_EIC_EXTINT1 \ 107 SAM_PINMUX(a, 6, c, periph) 108 109 /* pa6d_gloc_in0 */ 110 #define PA6D_GLOC_IN0 \ 111 SAM_PINMUX(a, 6, d, periph) 112 113 /* pa6e_acifc_acan0 */ 114 #define PA6E_ACIFC_ACAN0 \ 115 SAM_PINMUX(a, 6, e, periph) 116 117 /* pa6g_catb_sense2 */ 118 #define PA6G_CATB_SENSE2 \ 119 SAM_PINMUX(a, 6, g, periph) 120 121 /* pa7_gpio */ 122 #define PA7_GPIO \ 123 SAM_PINMUX(a, 7, gpio, gpio) 124 125 /* pa7a_adcife_ad2 */ 126 #define PA7A_ADCIFE_AD2 \ 127 SAM_PINMUX(a, 7, a, periph) 128 129 /* pa7b_usart0_txd */ 130 #define PA7B_USART0_TXD \ 131 SAM_PINMUX(a, 7, b, periph) 132 133 /* pa7c_eic_extint4 */ 134 #define PA7C_EIC_EXTINT4 \ 135 SAM_PINMUX(a, 7, c, periph) 136 137 /* pa7d_gloc_in3 */ 138 #define PA7D_GLOC_IN3 \ 139 SAM_PINMUX(a, 7, d, periph) 140 141 /* pa7e_acifc_acap0 */ 142 #define PA7E_ACIFC_ACAP0 \ 143 SAM_PINMUX(a, 7, e, periph) 144 145 /* pa7g_catb_sense3 */ 146 #define PA7G_CATB_SENSE3 \ 147 SAM_PINMUX(a, 7, g, periph) 148 149 /* pa8_gpio */ 150 #define PA8_GPIO \ 151 SAM_PINMUX(a, 8, gpio, gpio) 152 153 /* pa8a_usart0_rts */ 154 #define PA8A_USART0_RTS \ 155 SAM_PINMUX(a, 8, a, periph) 156 157 /* pa8b_tc0_a0 */ 158 #define PA8B_TC0_A0 \ 159 SAM_PINMUX(a, 8, b, periph) 160 161 /* pa8c_pevc_evt0 */ 162 #define PA8C_PEVC_EVT0 \ 163 SAM_PINMUX(a, 8, c, periph) 164 165 /* pa8d_gloc_out0 */ 166 #define PA8D_GLOC_OUT0 \ 167 SAM_PINMUX(a, 8, d, periph) 168 169 /* pa8g_catb_sense4 */ 170 #define PA8G_CATB_SENSE4 \ 171 SAM_PINMUX(a, 8, g, periph) 172 173 /* pa9_gpio */ 174 #define PA9_GPIO \ 175 SAM_PINMUX(a, 9, gpio, gpio) 176 177 /* pa9a_usart0_cts */ 178 #define PA9A_USART0_CTS \ 179 SAM_PINMUX(a, 9, a, periph) 180 181 /* pa9b_tc0_b0 */ 182 #define PA9B_TC0_B0 \ 183 SAM_PINMUX(a, 9, b, periph) 184 185 /* pa9c_pevc_evt1 */ 186 #define PA9C_PEVC_EVT1 \ 187 SAM_PINMUX(a, 9, c, periph) 188 189 /* pa9d_parc_pcdata0 */ 190 #define PA9D_PARC_PCDATA0 \ 191 SAM_PINMUX(a, 9, d, periph) 192 193 /* pa9g_catb_sense5 */ 194 #define PA9G_CATB_SENSE5 \ 195 SAM_PINMUX(a, 9, g, periph) 196 197 /* pa10_gpio */ 198 #define PA10_GPIO \ 199 SAM_PINMUX(a, 10, gpio, gpio) 200 201 /* pa10a_usart0_clk */ 202 #define PA10A_USART0_CLK \ 203 SAM_PINMUX(a, 10, a, periph) 204 205 /* pa10b_tc0_a1 */ 206 #define PA10B_TC0_A1 \ 207 SAM_PINMUX(a, 10, b, periph) 208 209 /* pa10c_pevc_evt2 */ 210 #define PA10C_PEVC_EVT2 \ 211 SAM_PINMUX(a, 10, c, periph) 212 213 /* pa10d_parc_pcdata1 */ 214 #define PA10D_PARC_PCDATA1 \ 215 SAM_PINMUX(a, 10, d, periph) 216 217 /* pa10g_catb_sense6 */ 218 #define PA10G_CATB_SENSE6 \ 219 SAM_PINMUX(a, 10, g, periph) 220 221 /* pa11_gpio */ 222 #define PA11_GPIO \ 223 SAM_PINMUX(a, 11, gpio, gpio) 224 225 /* pa11a_usart0_rxd */ 226 #define PA11A_USART0_RXD \ 227 SAM_PINMUX(a, 11, a, periph) 228 229 /* pa11b_tc0_b1 */ 230 #define PA11B_TC0_B1 \ 231 SAM_PINMUX(a, 11, b, periph) 232 233 /* pa11c_pevc_evt3 */ 234 #define PA11C_PEVC_EVT3 \ 235 SAM_PINMUX(a, 11, c, periph) 236 237 /* pa11d_parc_pcdata2 */ 238 #define PA11D_PARC_PCDATA2 \ 239 SAM_PINMUX(a, 11, d, periph) 240 241 /* pa11g_catb_sense7 */ 242 #define PA11G_CATB_SENSE7 \ 243 SAM_PINMUX(a, 11, g, periph) 244 245 /* pa12_gpio */ 246 #define PA12_GPIO \ 247 SAM_PINMUX(a, 12, gpio, gpio) 248 249 /* pa12a_usart0_txd */ 250 #define PA12A_USART0_TXD \ 251 SAM_PINMUX(a, 12, a, periph) 252 253 /* pa12b_tc0_a2 */ 254 #define PA12B_TC0_A2 \ 255 SAM_PINMUX(a, 12, b, periph) 256 257 /* pa12d_parc_pcdata3 */ 258 #define PA12D_PARC_PCDATA3 \ 259 SAM_PINMUX(a, 12, d, periph) 260 261 /* pa12g_catb_dis */ 262 #define PA12G_CATB_DIS \ 263 SAM_PINMUX(a, 12, g, periph) 264 265 /* pa13_gpio */ 266 #define PA13_GPIO \ 267 SAM_PINMUX(a, 13, gpio, gpio) 268 269 /* pa13a_usart1_rts */ 270 #define PA13A_USART1_RTS \ 271 SAM_PINMUX(a, 13, a, periph) 272 273 /* pa13b_tc0_b2 */ 274 #define PA13B_TC0_B2 \ 275 SAM_PINMUX(a, 13, b, periph) 276 277 /* pa13c_spi_npcs1 */ 278 #define PA13C_SPI_NPCS1 \ 279 SAM_PINMUX(a, 13, c, periph) 280 281 /* pa13d_parc_pcdata4 */ 282 #define PA13D_PARC_PCDATA4 \ 283 SAM_PINMUX(a, 13, d, periph) 284 285 /* pa13g_catb_sense8 */ 286 #define PA13G_CATB_SENSE8 \ 287 SAM_PINMUX(a, 13, g, periph) 288 289 /* pa14_gpio */ 290 #define PA14_GPIO \ 291 SAM_PINMUX(a, 14, gpio, gpio) 292 293 /* pa14a_usart1_clk */ 294 #define PA14A_USART1_CLK \ 295 SAM_PINMUX(a, 14, a, periph) 296 297 /* pa14b_tc0_clk0 */ 298 #define PA14B_TC0_CLK0 \ 299 SAM_PINMUX(a, 14, b, periph) 300 301 /* pa14c_spi_npcs2 */ 302 #define PA14C_SPI_NPCS2 \ 303 SAM_PINMUX(a, 14, c, periph) 304 305 /* pa14d_parc_pcdata5 */ 306 #define PA14D_PARC_PCDATA5 \ 307 SAM_PINMUX(a, 14, d, periph) 308 309 /* pa14g_catb_sense9 */ 310 #define PA14G_CATB_SENSE9 \ 311 SAM_PINMUX(a, 14, g, periph) 312 313 /* pa15_gpio */ 314 #define PA15_GPIO \ 315 SAM_PINMUX(a, 15, gpio, gpio) 316 317 /* pa15a_usart1_rxd */ 318 #define PA15A_USART1_RXD \ 319 SAM_PINMUX(a, 15, a, periph) 320 321 /* pa15b_tc0_clk1 */ 322 #define PA15B_TC0_CLK1 \ 323 SAM_PINMUX(a, 15, b, periph) 324 325 /* pa15c_spi_npcs3 */ 326 #define PA15C_SPI_NPCS3 \ 327 SAM_PINMUX(a, 15, c, periph) 328 329 /* pa15d_parc_pcdata6 */ 330 #define PA15D_PARC_PCDATA6 \ 331 SAM_PINMUX(a, 15, d, periph) 332 333 /* pa15g_catb_sense10 */ 334 #define PA15G_CATB_SENSE10 \ 335 SAM_PINMUX(a, 15, g, periph) 336 337 /* pa16_gpio */ 338 #define PA16_GPIO \ 339 SAM_PINMUX(a, 16, gpio, gpio) 340 341 /* pa16a_usart1_txd */ 342 #define PA16A_USART1_TXD \ 343 SAM_PINMUX(a, 16, a, periph) 344 345 /* pa16b_tc0_clk2 */ 346 #define PA16B_TC0_CLK2 \ 347 SAM_PINMUX(a, 16, b, periph) 348 349 /* pa16c_eic_extint1 */ 350 #define PA16C_EIC_EXTINT1 \ 351 SAM_PINMUX(a, 16, c, periph) 352 353 /* pa16d_parc_pcdata7 */ 354 #define PA16D_PARC_PCDATA7 \ 355 SAM_PINMUX(a, 16, d, periph) 356 357 /* pa16g_catb_sense11 */ 358 #define PA16G_CATB_SENSE11 \ 359 SAM_PINMUX(a, 16, g, periph) 360 361 /* pa17_gpio */ 362 #define PA17_GPIO \ 363 SAM_PINMUX(a, 17, gpio, gpio) 364 365 /* pa17a_usart2_rts */ 366 #define PA17A_USART2_RTS \ 367 SAM_PINMUX(a, 17, a, periph) 368 369 /* pa17b_abdacb_dac0 */ 370 #define PA17B_ABDACB_DAC0 \ 371 SAM_PINMUX(a, 17, b, periph) 372 373 /* pa17c_eic_extint2 */ 374 #define PA17C_EIC_EXTINT2 \ 375 SAM_PINMUX(a, 17, c, periph) 376 377 /* pa17d_parc_pcck */ 378 #define PA17D_PARC_PCCK \ 379 SAM_PINMUX(a, 17, d, periph) 380 381 /* pa17g_catb_sense12 */ 382 #define PA17G_CATB_SENSE12 \ 383 SAM_PINMUX(a, 17, g, periph) 384 385 /* pa18_gpio */ 386 #define PA18_GPIO \ 387 SAM_PINMUX(a, 18, gpio, gpio) 388 389 /* pa18a_usart2_clk */ 390 #define PA18A_USART2_CLK \ 391 SAM_PINMUX(a, 18, a, periph) 392 393 /* pa18b_abdacb_dacn0 */ 394 #define PA18B_ABDACB_DACN0 \ 395 SAM_PINMUX(a, 18, b, periph) 396 397 /* pa18c_eic_extint3 */ 398 #define PA18C_EIC_EXTINT3 \ 399 SAM_PINMUX(a, 18, c, periph) 400 401 /* pa18d_parc_pcen1 */ 402 #define PA18D_PARC_PCEN1 \ 403 SAM_PINMUX(a, 18, d, periph) 404 405 /* pa18g_catb_sense13 */ 406 #define PA18G_CATB_SENSE13 \ 407 SAM_PINMUX(a, 18, g, periph) 408 409 /* pa19_gpio */ 410 #define PA19_GPIO \ 411 SAM_PINMUX(a, 19, gpio, gpio) 412 413 /* pa19a_usart2_rxd */ 414 #define PA19A_USART2_RXD \ 415 SAM_PINMUX(a, 19, a, periph) 416 417 /* pa19b_abdacb_dac1 */ 418 #define PA19B_ABDACB_DAC1 \ 419 SAM_PINMUX(a, 19, b, periph) 420 421 /* pa19c_eic_extint4 */ 422 #define PA19C_EIC_EXTINT4 \ 423 SAM_PINMUX(a, 19, c, periph) 424 425 /* pa19d_parc_pcen2 */ 426 #define PA19D_PARC_PCEN2 \ 427 SAM_PINMUX(a, 19, d, periph) 428 429 /* pa19e_scif_gclk0 */ 430 #define PA19E_SCIF_GCLK0 \ 431 SAM_PINMUX(a, 19, e, periph) 432 433 /* pa19g_catb_sense14 */ 434 #define PA19G_CATB_SENSE14 \ 435 SAM_PINMUX(a, 19, g, periph) 436 437 /* pa20_gpio */ 438 #define PA20_GPIO \ 439 SAM_PINMUX(a, 20, gpio, gpio) 440 441 /* pa20a_usart2_txd */ 442 #define PA20A_USART2_TXD \ 443 SAM_PINMUX(a, 20, a, periph) 444 445 /* pa20b_abdacb_dacn1 */ 446 #define PA20B_ABDACB_DACN1 \ 447 SAM_PINMUX(a, 20, b, periph) 448 449 /* pa20c_eic_extint5 */ 450 #define PA20C_EIC_EXTINT5 \ 451 SAM_PINMUX(a, 20, c, periph) 452 453 /* pa20d_gcloc_in0 */ 454 #define PA20D_GCLOC_IN0 \ 455 SAM_PINMUX(a, 20, d, periph) 456 457 /* pa20e_scif_gclk1 */ 458 #define PA20E_SCIF_GCLK1 \ 459 SAM_PINMUX(a, 20, e, periph) 460 461 /* pa20g_catb_sense15 */ 462 #define PA20G_CATB_SENSE15 \ 463 SAM_PINMUX(a, 20, g, periph) 464 465 /* pa21_gpio */ 466 #define PA21_GPIO \ 467 SAM_PINMUX(a, 21, gpio, gpio) 468 469 /* pa21a_spi_miso */ 470 #define PA21A_SPI_MISO \ 471 SAM_PINMUX(a, 21, a, periph) 472 473 /* pa21b_usart1_cts */ 474 #define PA21B_USART1_CTS \ 475 SAM_PINMUX(a, 21, b, periph) 476 477 /* pa21c_eic_extint6 */ 478 #define PA21C_EIC_EXTINT6 \ 479 SAM_PINMUX(a, 21, c, periph) 480 481 /* pa21d_gcloc_in1 */ 482 #define PA21D_GCLOC_IN1 \ 483 SAM_PINMUX(a, 21, d, periph) 484 485 /* pa21e_twim2_twd */ 486 #define PA21E_TWIM2_TWD \ 487 SAM_PINMUX(a, 21, e, periph) 488 489 /* pa21g_catb_sense16 */ 490 #define PA21G_CATB_SENSE16 \ 491 SAM_PINMUX(a, 21, g, periph) 492 493 /* pa22_gpio */ 494 #define PA22_GPIO \ 495 SAM_PINMUX(a, 22, gpio, gpio) 496 497 /* pa22a_spi_mosi */ 498 #define PA22A_SPI_MOSI \ 499 SAM_PINMUX(a, 22, a, periph) 500 501 /* pa22b_usart2_cts */ 502 #define PA22B_USART2_CTS \ 503 SAM_PINMUX(a, 22, b, periph) 504 505 /* pa22c_eic_extint7 */ 506 #define PA22C_EIC_EXTINT7 \ 507 SAM_PINMUX(a, 22, c, periph) 508 509 /* pa22d_gcloc_in2 */ 510 #define PA22D_GCLOC_IN2 \ 511 SAM_PINMUX(a, 22, d, periph) 512 513 /* pa22e_twim2_twck */ 514 #define PA22E_TWIM2_TWCK \ 515 SAM_PINMUX(a, 22, e, periph) 516 517 /* pa22g_catb_sense17 */ 518 #define PA22G_CATB_SENSE17 \ 519 SAM_PINMUX(a, 22, g, periph) 520 521 /* pa23_gpio */ 522 #define PA23_GPIO \ 523 SAM_PINMUX(a, 23, gpio, gpio) 524 525 /* pa23a_spi_sck */ 526 #define PA23A_SPI_SCK \ 527 SAM_PINMUX(a, 23, a, periph) 528 529 /* pa23b_twims0_twd */ 530 #define PA23B_TWIMS0_TWD \ 531 SAM_PINMUX(a, 23, b, periph) 532 533 /* pa23c_eic_extint8 */ 534 #define PA23C_EIC_EXTINT8 \ 535 SAM_PINMUX(a, 23, c, periph) 536 537 /* pa23d_gcloc_in3 */ 538 #define PA23D_GCLOC_IN3 \ 539 SAM_PINMUX(a, 23, d, periph) 540 541 /* pa23e_scif_glck_in0 */ 542 #define PA23E_SCIF_GLCK_IN0 \ 543 SAM_PINMUX(a, 23, e, periph) 544 545 /* pa23g_catb_dis */ 546 #define PA23G_CATB_DIS \ 547 SAM_PINMUX(a, 23, g, periph) 548 549 /* pa24_gpio */ 550 #define PA24_GPIO \ 551 SAM_PINMUX(a, 24, gpio, gpio) 552 553 /* pa24a_spi_npcs0 */ 554 #define PA24A_SPI_NPCS0 \ 555 SAM_PINMUX(a, 24, a, periph) 556 557 /* pa24b_twims0_twck */ 558 #define PA24B_TWIMS0_TWCK \ 559 SAM_PINMUX(a, 24, b, periph) 560 561 /* pa24d_gcloc_out0 */ 562 #define PA24D_GCLOC_OUT0 \ 563 SAM_PINMUX(a, 24, d, periph) 564 565 /* pa24e_scif_glck_in1 */ 566 #define PA24E_SCIF_GLCK_IN1 \ 567 SAM_PINMUX(a, 24, e, periph) 568 569 /* pa24g_catb_sense18 */ 570 #define PA24G_CATB_SENSE18 \ 571 SAM_PINMUX(a, 24, g, periph) 572 573 /* pa25_gpio */ 574 #define PA25_GPIO \ 575 SAM_PINMUX(a, 25, gpio, gpio) 576 577 /* pa25b_usart2_rxd */ 578 #define PA25B_USART2_RXD \ 579 SAM_PINMUX(a, 25, b, periph) 580 581 /* pa25g_catb_sense19 */ 582 #define PA25G_CATB_SENSE19 \ 583 SAM_PINMUX(a, 25, g, periph) 584 585 /* pa26_gpio */ 586 #define PA26_GPIO \ 587 SAM_PINMUX(a, 26, gpio, gpio) 588 589 /* pa26b_usart2_txd */ 590 #define PA26B_USART2_TXD \ 591 SAM_PINMUX(a, 26, b, periph) 592 593 /* pa26g_catb_sense20 */ 594 #define PA26G_CATB_SENSE20 \ 595 SAM_PINMUX(a, 26, g, periph) 596 597 /* pa27_gpio */ 598 #define PA27_GPIO \ 599 SAM_PINMUX(a, 27, gpio, gpio) 600 601 /* pa27a_spi_miso */ 602 #define PA27A_SPI_MISO \ 603 SAM_PINMUX(a, 27, a, periph) 604 605 /* pa27b_iisc_isck */ 606 #define PA27B_IISC_ISCK \ 607 SAM_PINMUX(a, 27, b, periph) 608 609 /* pa27c_abdacb_dac0 */ 610 #define PA27C_ABDACB_DAC0 \ 611 SAM_PINMUX(a, 27, c, periph) 612 613 /* pa27d_gloc_in4 */ 614 #define PA27D_GLOC_IN4 \ 615 SAM_PINMUX(a, 27, d, periph) 616 617 /* pa27e_usart3_rts */ 618 #define PA27E_USART3_RTS \ 619 SAM_PINMUX(a, 27, e, periph) 620 621 /* pa27g_catb_sense0 */ 622 #define PA27G_CATB_SENSE0 \ 623 SAM_PINMUX(a, 27, g, periph) 624 625 /* pa28_gpio */ 626 #define PA28_GPIO \ 627 SAM_PINMUX(a, 28, gpio, gpio) 628 629 /* pa28a_spi_mosi */ 630 #define PA28A_SPI_MOSI \ 631 SAM_PINMUX(a, 28, a, periph) 632 633 /* pa28b_iisc_isdi */ 634 #define PA28B_IISC_ISDI \ 635 SAM_PINMUX(a, 28, b, periph) 636 637 /* pa28c_abdacb_dacn0 */ 638 #define PA28C_ABDACB_DACN0 \ 639 SAM_PINMUX(a, 28, c, periph) 640 641 /* pa28d_gloc_in5 */ 642 #define PA28D_GLOC_IN5 \ 643 SAM_PINMUX(a, 28, d, periph) 644 645 /* pa28e_usart3_cts */ 646 #define PA28E_USART3_CTS \ 647 SAM_PINMUX(a, 28, e, periph) 648 649 /* pa28g_catb_sense1 */ 650 #define PA28G_CATB_SENSE1 \ 651 SAM_PINMUX(a, 28, g, periph) 652 653 /* pa29_gpio */ 654 #define PA29_GPIO \ 655 SAM_PINMUX(a, 29, gpio, gpio) 656 657 /* pa29a_spi_sck */ 658 #define PA29A_SPI_SCK \ 659 SAM_PINMUX(a, 29, a, periph) 660 661 /* pa29b_iisc_iws */ 662 #define PA29B_IISC_IWS \ 663 SAM_PINMUX(a, 29, b, periph) 664 665 /* pa29c_abdacb_dac1 */ 666 #define PA29C_ABDACB_DAC1 \ 667 SAM_PINMUX(a, 29, c, periph) 668 669 /* pa29d_gloc_in6 */ 670 #define PA29D_GLOC_IN6 \ 671 SAM_PINMUX(a, 29, d, periph) 672 673 /* pa29e_usart3_clk */ 674 #define PA29E_USART3_CLK \ 675 SAM_PINMUX(a, 29, e, periph) 676 677 /* pa29g_catb_sense2 */ 678 #define PA29G_CATB_SENSE2 \ 679 SAM_PINMUX(a, 29, g, periph) 680 681 /* pa30_gpio */ 682 #define PA30_GPIO \ 683 SAM_PINMUX(a, 30, gpio, gpio) 684 685 /* pa30a_spi_npcs0 */ 686 #define PA30A_SPI_NPCS0 \ 687 SAM_PINMUX(a, 30, a, periph) 688 689 /* pa30b_iisc_isdo */ 690 #define PA30B_IISC_ISDO \ 691 SAM_PINMUX(a, 30, b, periph) 692 693 /* pa30c_abdacb_dacn1 */ 694 #define PA30C_ABDACB_DACN1 \ 695 SAM_PINMUX(a, 30, c, periph) 696 697 /* pa30d_gloc_in7 */ 698 #define PA30D_GLOC_IN7 \ 699 SAM_PINMUX(a, 30, d, periph) 700 701 /* pa30e_usart3_rxd */ 702 #define PA30E_USART3_RXD \ 703 SAM_PINMUX(a, 30, e, periph) 704 705 /* pa30g_catb_sense3 */ 706 #define PA30G_CATB_SENSE3 \ 707 SAM_PINMUX(a, 30, g, periph) 708 709 /* pa31_gpio */ 710 #define PA31_GPIO \ 711 SAM_PINMUX(a, 31, gpio, gpio) 712 713 /* pa31a_spi_npcs1 */ 714 #define PA31A_SPI_NPCS1 \ 715 SAM_PINMUX(a, 31, a, periph) 716 717 /* pa31b_iisc_imck */ 718 #define PA31B_IISC_IMCK \ 719 SAM_PINMUX(a, 31, b, periph) 720 721 /* pa31c_abdacb_clk */ 722 #define PA31C_ABDACB_CLK \ 723 SAM_PINMUX(a, 31, c, periph) 724 725 /* pa31d_gloc_out1 */ 726 #define PA31D_GLOC_OUT1 \ 727 SAM_PINMUX(a, 31, d, periph) 728 729 /* pa31e_usart3_txd */ 730 #define PA31E_USART3_TXD \ 731 SAM_PINMUX(a, 31, e, periph) 732 733 /* pa31g_catb_dis */ 734 #define PA31G_CATB_DIS \ 735 SAM_PINMUX(a, 31, g, periph) 736
