1 /* 2 * Autogenerated file 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h> 8 9 /* pa0_gpio */ 10 #define PA0_GPIO \ 11 SAM_PINMUX(a, 0, gpio, gpio) 12 13 /* pa0a_pwm_pwmh0 */ 14 #define PA0A_PWM_PWMH0 \ 15 SAM_PINMUX(a, 0, a, periph) 16 17 /* pa0b_tc0_tioa0 */ 18 #define PA0B_TC0_TIOA0 \ 19 SAM_PINMUX(a, 0, b, periph) 20 21 /* pa0c_ebi_a17 */ 22 #define PA0C_EBI_A17 \ 23 SAM_PINMUX(a, 0, c, periph) 24 25 /* pa0x_supc_wkup0 */ 26 #define PA0X_SUPC_WKUP0 \ 27 SAM_PINMUX(a, 0, x, extra) 28 29 /* pa1_gpio */ 30 #define PA1_GPIO \ 31 SAM_PINMUX(a, 1, gpio, gpio) 32 33 /* pa1a_pwm_pwmh1 */ 34 #define PA1A_PWM_PWMH1 \ 35 SAM_PINMUX(a, 1, a, periph) 36 37 /* pa1b_tc0_tiob0 */ 38 #define PA1B_TC0_TIOB0 \ 39 SAM_PINMUX(a, 1, b, periph) 40 41 /* pa1c_ebi_a18 */ 42 #define PA1C_EBI_A18 \ 43 SAM_PINMUX(a, 1, c, periph) 44 45 /* pa1x_supc_wkup1 */ 46 #define PA1X_SUPC_WKUP1 \ 47 SAM_PINMUX(a, 1, x, extra) 48 49 /* pa2_gpio */ 50 #define PA2_GPIO \ 51 SAM_PINMUX(a, 2, gpio, gpio) 52 53 /* pa2a_pwm_pwmh2 */ 54 #define PA2A_PWM_PWMH2 \ 55 SAM_PINMUX(a, 2, a, periph) 56 57 /* pa2c_dacc_datrg */ 58 #define PA2C_DACC_DATRG \ 59 SAM_PINMUX(a, 2, c, periph) 60 61 /* pa2x_supc_wkup2 */ 62 #define PA2X_SUPC_WKUP2 \ 63 SAM_PINMUX(a, 2, x, extra) 64 65 /* pa3_gpio */ 66 #define PA3_GPIO \ 67 SAM_PINMUX(a, 3, gpio, gpio) 68 69 /* pa3a_twi0_twd */ 70 #define PA3A_TWI0_TWD \ 71 SAM_PINMUX(a, 3, a, periph) 72 73 /* pa3b_spi_npcs3 */ 74 #define PA3B_SPI_NPCS3 \ 75 SAM_PINMUX(a, 3, b, periph) 76 77 /* pa4_gpio */ 78 #define PA4_GPIO \ 79 SAM_PINMUX(a, 4, gpio, gpio) 80 81 /* pa4a_twi0_twck */ 82 #define PA4A_TWI0_TWCK \ 83 SAM_PINMUX(a, 4, a, periph) 84 85 /* pa4b_tc0_tclk0 */ 86 #define PA4B_TC0_TCLK0 \ 87 SAM_PINMUX(a, 4, b, periph) 88 89 /* pa4x_supc_wkup3 */ 90 #define PA4X_SUPC_WKUP3 \ 91 SAM_PINMUX(a, 4, x, extra) 92 93 /* pa5_gpio */ 94 #define PA5_GPIO \ 95 SAM_PINMUX(a, 5, gpio, gpio) 96 97 /* pa5b_spi_npcs3 */ 98 #define PA5B_SPI_NPCS3 \ 99 SAM_PINMUX(a, 5, b, periph) 100 101 /* pa5c_uart1_rxd */ 102 #define PA5C_UART1_RXD \ 103 SAM_PINMUX(a, 5, c, periph) 104 105 /* pa5x_supc_wkup4 */ 106 #define PA5X_SUPC_WKUP4 \ 107 SAM_PINMUX(a, 5, x, extra) 108 109 /* pa6_gpio */ 110 #define PA6_GPIO \ 111 SAM_PINMUX(a, 6, gpio, gpio) 112 113 /* pa6b_pmc_pck0 */ 114 #define PA6B_PMC_PCK0 \ 115 SAM_PINMUX(a, 6, b, periph) 116 117 /* pa6c_uart1_txd */ 118 #define PA6C_UART1_TXD \ 119 SAM_PINMUX(a, 6, c, periph) 120 121 /* pa7_gpio */ 122 #define PA7_GPIO \ 123 SAM_PINMUX(a, 7, gpio, gpio) 124 125 /* pa7b_pwm_pwmh3 */ 126 #define PA7B_PWM_PWMH3 \ 127 SAM_PINMUX(a, 7, b, periph) 128 129 /* pa7s_supc_xin32 */ 130 #define PA7S_SUPC_XIN32 \ 131 SAM_PINMUX(a, 7, s, system) 132 133 /* pa8_gpio */ 134 #define PA8_GPIO \ 135 SAM_PINMUX(a, 8, gpio, gpio) 136 137 /* pa8b_afec0_adtrg */ 138 #define PA8B_AFEC0_ADTRG \ 139 SAM_PINMUX(a, 8, b, periph) 140 141 /* pa8x_supc_wkup5 */ 142 #define PA8X_SUPC_WKUP5 \ 143 SAM_PINMUX(a, 8, x, extra) 144 145 /* pa8s_supc_xout32 */ 146 #define PA8S_SUPC_XOUT32 \ 147 SAM_PINMUX(a, 8, s, system) 148 149 /* pa9_gpio */ 150 #define PA9_GPIO \ 151 SAM_PINMUX(a, 9, gpio, gpio) 152 153 /* pa9a_uart0_rxd */ 154 #define PA9A_UART0_RXD \ 155 SAM_PINMUX(a, 9, a, periph) 156 157 /* pa9b_spi_npcs1 */ 158 #define PA9B_SPI_NPCS1 \ 159 SAM_PINMUX(a, 9, b, periph) 160 161 /* pa9c_pwm_pwmfi0 */ 162 #define PA9C_PWM_PWMFI0 \ 163 SAM_PINMUX(a, 9, c, periph) 164 165 /* pa9x_supc_wkup6 */ 166 #define PA9X_SUPC_WKUP6 \ 167 SAM_PINMUX(a, 9, x, extra) 168 169 /* pa10_gpio */ 170 #define PA10_GPIO \ 171 SAM_PINMUX(a, 10, gpio, gpio) 172 173 /* pa10a_uart0_txd */ 174 #define PA10A_UART0_TXD \ 175 SAM_PINMUX(a, 10, a, periph) 176 177 /* pa10b_spi_npcs2 */ 178 #define PA10B_SPI_NPCS2 \ 179 SAM_PINMUX(a, 10, b, periph) 180 181 /* pa11_gpio */ 182 #define PA11_GPIO \ 183 SAM_PINMUX(a, 11, gpio, gpio) 184 185 /* pa11a_spi_npcs0 */ 186 #define PA11A_SPI_NPCS0 \ 187 SAM_PINMUX(a, 11, a, periph) 188 189 /* pa11b_pwm_pwmh0 */ 190 #define PA11B_PWM_PWMH0 \ 191 SAM_PINMUX(a, 11, b, periph) 192 193 /* pa11x_supc_wkup7 */ 194 #define PA11X_SUPC_WKUP7 \ 195 SAM_PINMUX(a, 11, x, extra) 196 197 /* pa12_gpio */ 198 #define PA12_GPIO \ 199 SAM_PINMUX(a, 12, gpio, gpio) 200 201 /* pa12a_spi_miso */ 202 #define PA12A_SPI_MISO \ 203 SAM_PINMUX(a, 12, a, periph) 204 205 /* pa12b_pwm_pwmh1 */ 206 #define PA12B_PWM_PWMH1 \ 207 SAM_PINMUX(a, 12, b, periph) 208 209 /* pa13_gpio */ 210 #define PA13_GPIO \ 211 SAM_PINMUX(a, 13, gpio, gpio) 212 213 /* pa13a_spi_mosi */ 214 #define PA13A_SPI_MOSI \ 215 SAM_PINMUX(a, 13, a, periph) 216 217 /* pa13b_pwm_pwmh2 */ 218 #define PA13B_PWM_PWMH2 \ 219 SAM_PINMUX(a, 13, b, periph) 220 221 /* pa14_gpio */ 222 #define PA14_GPIO \ 223 SAM_PINMUX(a, 14, gpio, gpio) 224 225 /* pa14a_spi_spck */ 226 #define PA14A_SPI_SPCK \ 227 SAM_PINMUX(a, 14, a, periph) 228 229 /* pa14b_pwm_pwmh3 */ 230 #define PA14B_PWM_PWMH3 \ 231 SAM_PINMUX(a, 14, b, periph) 232 233 /* pa14x_supc_wkup8 */ 234 #define PA14X_SUPC_WKUP8 \ 235 SAM_PINMUX(a, 14, x, extra) 236 237 /* pa15_gpio */ 238 #define PA15_GPIO \ 239 SAM_PINMUX(a, 15, gpio, gpio) 240 241 /* pa15b_tc0_tioa1 */ 242 #define PA15B_TC0_TIOA1 \ 243 SAM_PINMUX(a, 15, b, periph) 244 245 /* pa15c_pwm_pwml3 */ 246 #define PA15C_PWM_PWML3 \ 247 SAM_PINMUX(a, 15, c, periph) 248 249 /* pa15x_pio_piodcen1 */ 250 #define PA15X_PIO_PIODCEN1 \ 251 SAM_PINMUX(a, 15, x, extra) 252 253 /* pa15x_supc_wkup14 */ 254 #define PA15X_SUPC_WKUP14 \ 255 SAM_PINMUX(a, 15, x, extra) 256 257 /* pa16_gpio */ 258 #define PA16_GPIO \ 259 SAM_PINMUX(a, 16, gpio, gpio) 260 261 /* pa16b_tc0_tiob1 */ 262 #define PA16B_TC0_TIOB1 \ 263 SAM_PINMUX(a, 16, b, periph) 264 265 /* pa16c_pwm_pwml2 */ 266 #define PA16C_PWM_PWML2 \ 267 SAM_PINMUX(a, 16, c, periph) 268 269 /* pa16x_pio_piodcen2 */ 270 #define PA16X_PIO_PIODCEN2 \ 271 SAM_PINMUX(a, 16, x, extra) 272 273 /* pa16x_supc_wkup15 */ 274 #define PA16X_SUPC_WKUP15 \ 275 SAM_PINMUX(a, 16, x, extra) 276 277 /* pa17_gpio */ 278 #define PA17_GPIO \ 279 SAM_PINMUX(a, 17, gpio, gpio) 280 281 /* pa17b_pmc_pck1 */ 282 #define PA17B_PMC_PCK1 \ 283 SAM_PINMUX(a, 17, b, periph) 284 285 /* pa17c_pwm_pwmh3 */ 286 #define PA17C_PWM_PWMH3 \ 287 SAM_PINMUX(a, 17, c, periph) 288 289 /* pa17x_afec0_ad0 */ 290 #define PA17X_AFEC0_AD0 \ 291 SAM_PINMUX(a, 17, x, extra) 292 293 /* pa18_gpio */ 294 #define PA18_GPIO \ 295 SAM_PINMUX(a, 18, gpio, gpio) 296 297 /* pa18b_pmc_pck2 */ 298 #define PA18B_PMC_PCK2 \ 299 SAM_PINMUX(a, 18, b, periph) 300 301 /* pa18c_ebi_a14 */ 302 #define PA18C_EBI_A14 \ 303 SAM_PINMUX(a, 18, c, periph) 304 305 /* pa18x_afec0_ad1 */ 306 #define PA18X_AFEC0_AD1 \ 307 SAM_PINMUX(a, 18, x, extra) 308 309 /* pa19_gpio */ 310 #define PA19_GPIO \ 311 SAM_PINMUX(a, 19, gpio, gpio) 312 313 /* pa19b_pwm_pwml0 */ 314 #define PA19B_PWM_PWML0 \ 315 SAM_PINMUX(a, 19, b, periph) 316 317 /* pa19c_ebi_a15 */ 318 #define PA19C_EBI_A15 \ 319 SAM_PINMUX(a, 19, c, periph) 320 321 /* pa19x_afec0_ad2 */ 322 #define PA19X_AFEC0_AD2 \ 323 SAM_PINMUX(a, 19, x, extra) 324 325 /* pa19x_supc_wkup9 */ 326 #define PA19X_SUPC_WKUP9 \ 327 SAM_PINMUX(a, 19, x, extra) 328 329 /* pa20_gpio */ 330 #define PA20_GPIO \ 331 SAM_PINMUX(a, 20, gpio, gpio) 332 333 /* pa20b_pwm_pwml1 */ 334 #define PA20B_PWM_PWML1 \ 335 SAM_PINMUX(a, 20, b, periph) 336 337 /* pa20c_ebi_a16 */ 338 #define PA20C_EBI_A16 \ 339 SAM_PINMUX(a, 20, c, periph) 340 341 /* pa20x_afec0_ad3 */ 342 #define PA20X_AFEC0_AD3 \ 343 SAM_PINMUX(a, 20, x, extra) 344 345 /* pa20x_supc_wkup10 */ 346 #define PA20X_SUPC_WKUP10 \ 347 SAM_PINMUX(a, 20, x, extra) 348 349 /* pa21_gpio */ 350 #define PA21_GPIO \ 351 SAM_PINMUX(a, 21, gpio, gpio) 352 353 /* pa21a_usart1_rxd */ 354 #define PA21A_USART1_RXD \ 355 SAM_PINMUX(a, 21, a, periph) 356 357 /* pa21b_pmc_pck1 */ 358 #define PA21B_PMC_PCK1 \ 359 SAM_PINMUX(a, 21, b, periph) 360 361 /* pa21x_afec1_ad2 */ 362 #define PA21X_AFEC1_AD2 \ 363 SAM_PINMUX(a, 21, x, extra) 364 365 /* pa22_gpio */ 366 #define PA22_GPIO \ 367 SAM_PINMUX(a, 22, gpio, gpio) 368 369 /* pa22a_usart1_txd */ 370 #define PA22A_USART1_TXD \ 371 SAM_PINMUX(a, 22, a, periph) 372 373 /* pa22b_spi_npcs3 */ 374 #define PA22B_SPI_NPCS3 \ 375 SAM_PINMUX(a, 22, b, periph) 376 377 /* pa22c_ebi_ncs2 */ 378 #define PA22C_EBI_NCS2 \ 379 SAM_PINMUX(a, 22, c, periph) 380 381 /* pa22x_afec1_ad3 */ 382 #define PA22X_AFEC1_AD3 \ 383 SAM_PINMUX(a, 22, x, extra) 384 385 /* pa23_gpio */ 386 #define PA23_GPIO \ 387 SAM_PINMUX(a, 23, gpio, gpio) 388 389 /* pa23a_usart1_sck */ 390 #define PA23A_USART1_SCK \ 391 SAM_PINMUX(a, 23, a, periph) 392 393 /* pa23b_pwm_pwmh0 */ 394 #define PA23B_PWM_PWMH0 \ 395 SAM_PINMUX(a, 23, b, periph) 396 397 /* pa23c_ebi_a19 */ 398 #define PA23C_EBI_A19 \ 399 SAM_PINMUX(a, 23, c, periph) 400 401 /* pa23x_pio_piodcclk */ 402 #define PA23X_PIO_PIODCCLK \ 403 SAM_PINMUX(a, 23, x, extra) 404 405 /* pa24_gpio */ 406 #define PA24_GPIO \ 407 SAM_PINMUX(a, 24, gpio, gpio) 408 409 /* pa24a_usart1_rts */ 410 #define PA24A_USART1_RTS \ 411 SAM_PINMUX(a, 24, a, periph) 412 413 /* pa24b_pwm_pwmh1 */ 414 #define PA24B_PWM_PWMH1 \ 415 SAM_PINMUX(a, 24, b, periph) 416 417 /* pa24c_ebi_a20 */ 418 #define PA24C_EBI_A20 \ 419 SAM_PINMUX(a, 24, c, periph) 420 421 /* pa24x_pio_piodc0 */ 422 #define PA24X_PIO_PIODC0 \ 423 SAM_PINMUX(a, 24, x, extra) 424 425 /* pa25_gpio */ 426 #define PA25_GPIO \ 427 SAM_PINMUX(a, 25, gpio, gpio) 428 429 /* pa25a_usart1_cts */ 430 #define PA25A_USART1_CTS \ 431 SAM_PINMUX(a, 25, a, periph) 432 433 /* pa25b_pwm_pwmh2 */ 434 #define PA25B_PWM_PWMH2 \ 435 SAM_PINMUX(a, 25, b, periph) 436 437 /* pa25c_ebi_a23 */ 438 #define PA25C_EBI_A23 \ 439 SAM_PINMUX(a, 25, c, periph) 440 441 /* pa25x_pio_piodc1 */ 442 #define PA25X_PIO_PIODC1 \ 443 SAM_PINMUX(a, 25, x, extra) 444 445 /* pa26_gpio */ 446 #define PA26_GPIO \ 447 SAM_PINMUX(a, 26, gpio, gpio) 448 449 /* pa26a_usart1_dcd */ 450 #define PA26A_USART1_DCD \ 451 SAM_PINMUX(a, 26, a, periph) 452 453 /* pa26b_tc0_tioa2 */ 454 #define PA26B_TC0_TIOA2 \ 455 SAM_PINMUX(a, 26, b, periph) 456 457 /* pa26c_hsmci_mcda2 */ 458 #define PA26C_HSMCI_MCDA2 \ 459 SAM_PINMUX(a, 26, c, periph) 460 461 /* pa26x_pio_piodc2 */ 462 #define PA26X_PIO_PIODC2 \ 463 SAM_PINMUX(a, 26, x, extra) 464 465 /* pa27_gpio */ 466 #define PA27_GPIO \ 467 SAM_PINMUX(a, 27, gpio, gpio) 468 469 /* pa27a_usart1_dtr */ 470 #define PA27A_USART1_DTR \ 471 SAM_PINMUX(a, 27, a, periph) 472 473 /* pa27b_tc0_tiob2 */ 474 #define PA27B_TC0_TIOB2 \ 475 SAM_PINMUX(a, 27, b, periph) 476 477 /* pa27c_hsmci_mcda3 */ 478 #define PA27C_HSMCI_MCDA3 \ 479 SAM_PINMUX(a, 27, c, periph) 480 481 /* pa27x_pio_piodc3 */ 482 #define PA27X_PIO_PIODC3 \ 483 SAM_PINMUX(a, 27, x, extra) 484 485 /* pa28_gpio */ 486 #define PA28_GPIO \ 487 SAM_PINMUX(a, 28, gpio, gpio) 488 489 /* pa28a_usart1_dsr */ 490 #define PA28A_USART1_DSR \ 491 SAM_PINMUX(a, 28, a, periph) 492 493 /* pa28b_tc0_tclk1 */ 494 #define PA28B_TC0_TCLK1 \ 495 SAM_PINMUX(a, 28, b, periph) 496 497 /* pa28c_hsmci_mccda */ 498 #define PA28C_HSMCI_MCCDA \ 499 SAM_PINMUX(a, 28, c, periph) 500 501 /* pa28x_pio_piodc4 */ 502 #define PA28X_PIO_PIODC4 \ 503 SAM_PINMUX(a, 28, x, extra) 504 505 /* pa29_gpio */ 506 #define PA29_GPIO \ 507 SAM_PINMUX(a, 29, gpio, gpio) 508 509 /* pa29a_usart1_ri */ 510 #define PA29A_USART1_RI \ 511 SAM_PINMUX(a, 29, a, periph) 512 513 /* pa29b_tc0_tclk2 */ 514 #define PA29B_TC0_TCLK2 \ 515 SAM_PINMUX(a, 29, b, periph) 516 517 /* pa29c_hsmci_mcck */ 518 #define PA29C_HSMCI_MCCK \ 519 SAM_PINMUX(a, 29, c, periph) 520 521 /* pa29x_pio_piodc5 */ 522 #define PA29X_PIO_PIODC5 \ 523 SAM_PINMUX(a, 29, x, extra) 524 525 /* pa30_gpio */ 526 #define PA30_GPIO \ 527 SAM_PINMUX(a, 30, gpio, gpio) 528 529 /* pa30a_pwm_pwml2 */ 530 #define PA30A_PWM_PWML2 \ 531 SAM_PINMUX(a, 30, a, periph) 532 533 /* pa30b_spi_npcs2 */ 534 #define PA30B_SPI_NPCS2 \ 535 SAM_PINMUX(a, 30, b, periph) 536 537 /* pa30c_hsmci_mcda0 */ 538 #define PA30C_HSMCI_MCDA0 \ 539 SAM_PINMUX(a, 30, c, periph) 540 541 /* pa30x_pio_piodc6 */ 542 #define PA30X_PIO_PIODC6 \ 543 SAM_PINMUX(a, 30, x, extra) 544 545 /* pa30x_supc_wkup11 */ 546 #define PA30X_SUPC_WKUP11 \ 547 SAM_PINMUX(a, 30, x, extra) 548 549 /* pa31_gpio */ 550 #define PA31_GPIO \ 551 SAM_PINMUX(a, 31, gpio, gpio) 552 553 /* pa31a_spi_npcs1 */ 554 #define PA31A_SPI_NPCS1 \ 555 SAM_PINMUX(a, 31, a, periph) 556 557 /* pa31b_pmc_pck2 */ 558 #define PA31B_PMC_PCK2 \ 559 SAM_PINMUX(a, 31, b, periph) 560 561 /* pa31c_hsmci_mcda1 */ 562 #define PA31C_HSMCI_MCDA1 \ 563 SAM_PINMUX(a, 31, c, periph) 564 565 /* pa31x_pio_piodc7 */ 566 #define PA31X_PIO_PIODC7 \ 567 SAM_PINMUX(a, 31, x, extra) 568 569 /* pb0_gpio */ 570 #define PB0_GPIO \ 571 SAM_PINMUX(b, 0, gpio, gpio) 572 573 /* pb0a_pwm_pwmh0 */ 574 #define PB0A_PWM_PWMH0 \ 575 SAM_PINMUX(b, 0, a, periph) 576 577 /* pb0c_usart0_rxd */ 578 #define PB0C_USART0_RXD \ 579 SAM_PINMUX(b, 0, c, periph) 580 581 /* pb0x_afec0_ad4 */ 582 #define PB0X_AFEC0_AD4 \ 583 SAM_PINMUX(b, 0, x, extra) 584 585 /* pb0x_rtc_out0 */ 586 #define PB0X_RTC_OUT0 \ 587 SAM_PINMUX(b, 0, x, extra) 588 589 /* pb1_gpio */ 590 #define PB1_GPIO \ 591 SAM_PINMUX(b, 1, gpio, gpio) 592 593 /* pb1a_pwm_pwmh1 */ 594 #define PB1A_PWM_PWMH1 \ 595 SAM_PINMUX(b, 1, a, periph) 596 597 /* pb1c_usart0_txd */ 598 #define PB1C_USART0_TXD \ 599 SAM_PINMUX(b, 1, c, periph) 600 601 /* pb1x_afec0_ad5 */ 602 #define PB1X_AFEC0_AD5 \ 603 SAM_PINMUX(b, 1, x, extra) 604 605 /* pb1x_rtc_out1 */ 606 #define PB1X_RTC_OUT1 \ 607 SAM_PINMUX(b, 1, x, extra) 608 609 /* pb2_gpio */ 610 #define PB2_GPIO \ 611 SAM_PINMUX(b, 2, gpio, gpio) 612 613 /* pb2a_can0_tx */ 614 #define PB2A_CAN0_TX \ 615 SAM_PINMUX(b, 2, a, periph) 616 617 /* pb2b_spi_npcs2 */ 618 #define PB2B_SPI_NPCS2 \ 619 SAM_PINMUX(b, 2, b, periph) 620 621 /* pb2c_usart0_cts */ 622 #define PB2C_USART0_CTS \ 623 SAM_PINMUX(b, 2, c, periph) 624 625 /* pb2x_afec1_ad0 */ 626 #define PB2X_AFEC1_AD0 \ 627 SAM_PINMUX(b, 2, x, extra) 628 629 /* pb2x_supc_wkup12 */ 630 #define PB2X_SUPC_WKUP12 \ 631 SAM_PINMUX(b, 2, x, extra) 632 633 /* pb3_gpio */ 634 #define PB3_GPIO \ 635 SAM_PINMUX(b, 3, gpio, gpio) 636 637 /* pb3a_can0_rx */ 638 #define PB3A_CAN0_RX \ 639 SAM_PINMUX(b, 3, a, periph) 640 641 /* pb3b_pmc_pck2 */ 642 #define PB3B_PMC_PCK2 \ 643 SAM_PINMUX(b, 3, b, periph) 644 645 /* pb3c_usart0_rts */ 646 #define PB3C_USART0_RTS \ 647 SAM_PINMUX(b, 3, c, periph) 648 649 /* pb3x_afec1_ad1 */ 650 #define PB3X_AFEC1_AD1 \ 651 SAM_PINMUX(b, 3, x, extra) 652 653 /* pb4_gpio */ 654 #define PB4_GPIO \ 655 SAM_PINMUX(b, 4, gpio, gpio) 656 657 /* pb4a_twi1_twd */ 658 #define PB4A_TWI1_TWD \ 659 SAM_PINMUX(b, 4, a, periph) 660 661 /* pb4b_pwm_pwmh2 */ 662 #define PB4B_PWM_PWMH2 \ 663 SAM_PINMUX(b, 4, b, periph) 664 665 /* pb4s_jtag_tdi */ 666 #define PB4S_JTAG_TDI \ 667 SAM_PINMUX(b, 4, s, system) 668 669 /* pb5_gpio */ 670 #define PB5_GPIO \ 671 SAM_PINMUX(b, 5, gpio, gpio) 672 673 /* pb5a_twi1_twck */ 674 #define PB5A_TWI1_TWCK \ 675 SAM_PINMUX(b, 5, a, periph) 676 677 /* pb5b_pwm_pwml0 */ 678 #define PB5B_PWM_PWML0 \ 679 SAM_PINMUX(b, 5, b, periph) 680 681 /* pb5x_supc_wkup13 */ 682 #define PB5X_SUPC_WKUP13 \ 683 SAM_PINMUX(b, 5, x, extra) 684 685 /* pb5s_jtag_tdo */ 686 #define PB5S_JTAG_TDO \ 687 SAM_PINMUX(b, 5, s, system) 688 689 /* pb5s_swd_traceswo */ 690 #define PB5S_SWD_TRACESWO \ 691 SAM_PINMUX(b, 5, s, system) 692 693 /* pb6_gpio */ 694 #define PB6_GPIO \ 695 SAM_PINMUX(b, 6, gpio, gpio) 696 697 /* pb6s_jtag_tms */ 698 #define PB6S_JTAG_TMS \ 699 SAM_PINMUX(b, 6, s, system) 700 701 /* pb6s_swd_swdio */ 702 #define PB6S_SWD_SWDIO \ 703 SAM_PINMUX(b, 6, s, system) 704 705 /* pb7_gpio */ 706 #define PB7_GPIO \ 707 SAM_PINMUX(b, 7, gpio, gpio) 708 709 /* pb7s_jtag_tck */ 710 #define PB7S_JTAG_TCK \ 711 SAM_PINMUX(b, 7, s, system) 712 713 /* pb7s_swd_swclk */ 714 #define PB7S_SWD_SWCLK \ 715 SAM_PINMUX(b, 7, s, system) 716 717 /* pb8_gpio */ 718 #define PB8_GPIO \ 719 SAM_PINMUX(b, 8, gpio, gpio) 720 721 /* pb8s_supc_xout */ 722 #define PB8S_SUPC_XOUT \ 723 SAM_PINMUX(b, 8, s, system) 724 725 /* pb9_gpio */ 726 #define PB9_GPIO \ 727 SAM_PINMUX(b, 9, gpio, gpio) 728 729 /* pb9s_supc_xin */ 730 #define PB9S_SUPC_XIN \ 731 SAM_PINMUX(b, 9, s, system) 732 733 /* pb10_gpio */ 734 #define PB10_GPIO \ 735 SAM_PINMUX(b, 10, gpio, gpio) 736 737 /* pb10s_udp_ddm */ 738 #define PB10S_UDP_DDM \ 739 SAM_PINMUX(b, 10, s, system) 740 741 /* pb11_gpio */ 742 #define PB11_GPIO \ 743 SAM_PINMUX(b, 11, gpio, gpio) 744 745 /* pb11s_udp_ddp */ 746 #define PB11S_UDP_DDP \ 747 SAM_PINMUX(b, 11, s, system) 748 749 /* pb12_gpio */ 750 #define PB12_GPIO \ 751 SAM_PINMUX(b, 12, gpio, gpio) 752 753 /* pb12a_pwm_pwml1 */ 754 #define PB12A_PWM_PWML1 \ 755 SAM_PINMUX(b, 12, a, periph) 756 757 /* pb12s_flash_erase */ 758 #define PB12S_FLASH_ERASE \ 759 SAM_PINMUX(b, 12, s, system) 760 761 /* pb13_gpio */ 762 #define PB13_GPIO \ 763 SAM_PINMUX(b, 13, gpio, gpio) 764 765 /* pb13a_pwm_pwml2 */ 766 #define PB13A_PWM_PWML2 \ 767 SAM_PINMUX(b, 13, a, periph) 768 769 /* pb13b_pcm_pck0 */ 770 #define PB13B_PCM_PCK0 \ 771 SAM_PINMUX(b, 13, b, periph) 772 773 /* pb13c_usart0_sck */ 774 #define PB13C_USART0_SCK \ 775 SAM_PINMUX(b, 13, c, periph) 776 777 /* pb13x_dacc_dac0 */ 778 #define PB13X_DACC_DAC0 \ 779 SAM_PINMUX(b, 13, x, extra) 780 781 /* pb14_gpio */ 782 #define PB14_GPIO \ 783 SAM_PINMUX(b, 14, gpio, gpio) 784 785 /* pb14a_spi_npcs1 */ 786 #define PB14A_SPI_NPCS1 \ 787 SAM_PINMUX(b, 14, a, periph) 788 789 /* pb14b_pwm_pwmh3 */ 790 #define PB14B_PWM_PWMH3 \ 791 SAM_PINMUX(b, 14, b, periph) 792 793 /* pb14x_dacc_dac1 */ 794 #define PB14X_DACC_DAC1 \ 795 SAM_PINMUX(b, 14, x, extra) 796 797 /* pc0_gpio */ 798 #define PC0_GPIO \ 799 SAM_PINMUX(c, 0, gpio, gpio) 800 801 /* pc0a_ebi_d0 */ 802 #define PC0A_EBI_D0 \ 803 SAM_PINMUX(c, 0, a, periph) 804 805 /* pc0b_pwm_pwml0 */ 806 #define PC0B_PWM_PWML0 \ 807 SAM_PINMUX(c, 0, b, periph) 808 809 /* pc0x_afec0_ad14 */ 810 #define PC0X_AFEC0_AD14 \ 811 SAM_PINMUX(c, 0, x, extra) 812 813 /* pc1_gpio */ 814 #define PC1_GPIO \ 815 SAM_PINMUX(c, 1, gpio, gpio) 816 817 /* pc1a_ebi_d1 */ 818 #define PC1A_EBI_D1 \ 819 SAM_PINMUX(c, 1, a, periph) 820 821 /* pc1b_pwm_pwml1 */ 822 #define PC1B_PWM_PWML1 \ 823 SAM_PINMUX(c, 1, b, periph) 824 825 /* pc1x_afec1_ad4 */ 826 #define PC1X_AFEC1_AD4 \ 827 SAM_PINMUX(c, 1, x, extra) 828 829 /* pc2_gpio */ 830 #define PC2_GPIO \ 831 SAM_PINMUX(c, 2, gpio, gpio) 832 833 /* pc2a_ebi_d2 */ 834 #define PC2A_EBI_D2 \ 835 SAM_PINMUX(c, 2, a, periph) 836 837 /* pc2b_pwm_pwml2 */ 838 #define PC2B_PWM_PWML2 \ 839 SAM_PINMUX(c, 2, b, periph) 840 841 /* pc2x_afec1_ad5 */ 842 #define PC2X_AFEC1_AD5 \ 843 SAM_PINMUX(c, 2, x, extra) 844 845 /* pc3_gpio */ 846 #define PC3_GPIO \ 847 SAM_PINMUX(c, 3, gpio, gpio) 848 849 /* pc3a_ebi_d3 */ 850 #define PC3A_EBI_D3 \ 851 SAM_PINMUX(c, 3, a, periph) 852 853 /* pc3b_pwm_pwml3 */ 854 #define PC3B_PWM_PWML3 \ 855 SAM_PINMUX(c, 3, b, periph) 856 857 /* pc3x_afec1_ad6 */ 858 #define PC3X_AFEC1_AD6 \ 859 SAM_PINMUX(c, 3, x, extra) 860 861 /* pc4_gpio */ 862 #define PC4_GPIO \ 863 SAM_PINMUX(c, 4, gpio, gpio) 864 865 /* pc4a_ebi_d4 */ 866 #define PC4A_EBI_D4 \ 867 SAM_PINMUX(c, 4, a, periph) 868 869 /* pc4b_spi_npcs1 */ 870 #define PC4B_SPI_NPCS1 \ 871 SAM_PINMUX(c, 4, b, periph) 872 873 /* pc4x_afec1_ad7 */ 874 #define PC4X_AFEC1_AD7 \ 875 SAM_PINMUX(c, 4, x, extra) 876 877 /* pc5_gpio */ 878 #define PC5_GPIO \ 879 SAM_PINMUX(c, 5, gpio, gpio) 880 881 /* pc5a_ebi_d5 */ 882 #define PC5A_EBI_D5 \ 883 SAM_PINMUX(c, 5, a, periph) 884 885 /* pc5b_tc2_tioa6 */ 886 #define PC5B_TC2_TIOA6 \ 887 SAM_PINMUX(c, 5, b, periph) 888 889 /* pc6_gpio */ 890 #define PC6_GPIO \ 891 SAM_PINMUX(c, 6, gpio, gpio) 892 893 /* pc6a_ebi_d6 */ 894 #define PC6A_EBI_D6 \ 895 SAM_PINMUX(c, 6, a, periph) 896 897 /* pc6b_tc2_tiob6 */ 898 #define PC6B_TC2_TIOB6 \ 899 SAM_PINMUX(c, 6, b, periph) 900 901 /* pc7_gpio */ 902 #define PC7_GPIO \ 903 SAM_PINMUX(c, 7, gpio, gpio) 904 905 /* pc7a_ebi_d7 */ 906 #define PC7A_EBI_D7 \ 907 SAM_PINMUX(c, 7, a, periph) 908 909 /* pc7b_tc2_tclk6 */ 910 #define PC7B_TC2_TCLK6 \ 911 SAM_PINMUX(c, 7, b, periph) 912 913 /* pc8_gpio */ 914 #define PC8_GPIO \ 915 SAM_PINMUX(c, 8, gpio, gpio) 916 917 /* pc8a_ebi_nwe */ 918 #define PC8A_EBI_NWE \ 919 SAM_PINMUX(c, 8, a, periph) 920 921 /* pc8b_tc2_tioa7 */ 922 #define PC8B_TC2_TIOA7 \ 923 SAM_PINMUX(c, 8, b, periph) 924 925 /* pc9_gpio */ 926 #define PC9_GPIO \ 927 SAM_PINMUX(c, 9, gpio, gpio) 928 929 /* pc9a_ebi_nandoe */ 930 #define PC9A_EBI_NANDOE \ 931 SAM_PINMUX(c, 9, a, periph) 932 933 /* pc9b_tc2_tiob7 */ 934 #define PC9B_TC2_TIOB7 \ 935 SAM_PINMUX(c, 9, b, periph) 936 937 /* pc10_gpio */ 938 #define PC10_GPIO \ 939 SAM_PINMUX(c, 10, gpio, gpio) 940 941 /* pc10a_ebi_nandwe */ 942 #define PC10A_EBI_NANDWE \ 943 SAM_PINMUX(c, 10, a, periph) 944 945 /* pc10b_tc2_tclk7 */ 946 #define PC10B_TC2_TCLK7 \ 947 SAM_PINMUX(c, 10, b, periph) 948 949 /* pc11_gpio */ 950 #define PC11_GPIO \ 951 SAM_PINMUX(c, 11, gpio, gpio) 952 953 /* pc11a_ebi_nrd */ 954 #define PC11A_EBI_NRD \ 955 SAM_PINMUX(c, 11, a, periph) 956 957 /* pc11b_tc2_tioa8 */ 958 #define PC11B_TC2_TIOA8 \ 959 SAM_PINMUX(c, 11, b, periph) 960 961 /* pc12_gpio */ 962 #define PC12_GPIO \ 963 SAM_PINMUX(c, 12, gpio, gpio) 964 965 /* pc12a_ebi_ncs3 */ 966 #define PC12A_EBI_NCS3 \ 967 SAM_PINMUX(c, 12, a, periph) 968 969 /* pc12b_tc2_tiob8 */ 970 #define PC12B_TC2_TIOB8 \ 971 SAM_PINMUX(c, 12, b, periph) 972 973 /* pc12c_can1_rx */ 974 #define PC12C_CAN1_RX \ 975 SAM_PINMUX(c, 12, c, periph) 976 977 /* pc12x_afec0_ad8 */ 978 #define PC12X_AFEC0_AD8 \ 979 SAM_PINMUX(c, 12, x, extra) 980 981 /* pc13_gpio */ 982 #define PC13_GPIO \ 983 SAM_PINMUX(c, 13, gpio, gpio) 984 985 /* pc13a_ebi_nwait */ 986 #define PC13A_EBI_NWAIT \ 987 SAM_PINMUX(c, 13, a, periph) 988 989 /* pc13b_pwm_pwml0 */ 990 #define PC13B_PWM_PWML0 \ 991 SAM_PINMUX(c, 13, b, periph) 992 993 /* pc13x_afec0_ad6 */ 994 #define PC13X_AFEC0_AD6 \ 995 SAM_PINMUX(c, 13, x, extra) 996 997 /* pc14_gpio */ 998 #define PC14_GPIO \ 999 SAM_PINMUX(c, 14, gpio, gpio) 1000 1001 /* pc14a_ebi_ncs0 */ 1002 #define PC14A_EBI_NCS0 \ 1003 SAM_PINMUX(c, 14, a, periph) 1004 1005 /* pc14b_tc2_tclk8 */ 1006 #define PC14B_TC2_TCLK8 \ 1007 SAM_PINMUX(c, 14, b, periph) 1008 1009 /* pc15_gpio */ 1010 #define PC15_GPIO \ 1011 SAM_PINMUX(c, 15, gpio, gpio) 1012 1013 /* pc15a_ebi_ncs1 */ 1014 #define PC15A_EBI_NCS1 \ 1015 SAM_PINMUX(c, 15, a, periph) 1016 1017 /* pc15b_pwm_pwml1 */ 1018 #define PC15B_PWM_PWML1 \ 1019 SAM_PINMUX(c, 15, b, periph) 1020 1021 /* pc15c_can1_tx */ 1022 #define PC15C_CAN1_TX \ 1023 SAM_PINMUX(c, 15, c, periph) 1024 1025 /* pc15x_afec0_ad7 */ 1026 #define PC15X_AFEC0_AD7 \ 1027 SAM_PINMUX(c, 15, x, extra) 1028 1029 /* pc16_gpio */ 1030 #define PC16_GPIO \ 1031 SAM_PINMUX(c, 16, gpio, gpio) 1032 1033 /* pc16a_ebi_a21_nandale */ 1034 #define PC16A_EBI_A21_NANDALE \ 1035 SAM_PINMUX(c, 16, a, periph) 1036 1037 /* pc17_gpio */ 1038 #define PC17_GPIO \ 1039 SAM_PINMUX(c, 17, gpio, gpio) 1040 1041 /* pc17a_ebi_a22_nandcle */ 1042 #define PC17A_EBI_A22_NANDCLE \ 1043 SAM_PINMUX(c, 17, a, periph) 1044 1045 /* pc18_gpio */ 1046 #define PC18_GPIO \ 1047 SAM_PINMUX(c, 18, gpio, gpio) 1048 1049 /* pc18a_ebi_a0 */ 1050 #define PC18A_EBI_A0 \ 1051 SAM_PINMUX(c, 18, a, periph) 1052 1053 /* pc18b_pwm_pwmh0 */ 1054 #define PC18B_PWM_PWMH0 \ 1055 SAM_PINMUX(c, 18, b, periph) 1056 1057 /* pc19_gpio */ 1058 #define PC19_GPIO \ 1059 SAM_PINMUX(c, 19, gpio, gpio) 1060 1061 /* pc19a_ebi_a1 */ 1062 #define PC19A_EBI_A1 \ 1063 SAM_PINMUX(c, 19, a, periph) 1064 1065 /* pc19b_pwm_pwmh1 */ 1066 #define PC19B_PWM_PWMH1 \ 1067 SAM_PINMUX(c, 19, b, periph) 1068 1069 /* pc20_gpio */ 1070 #define PC20_GPIO \ 1071 SAM_PINMUX(c, 20, gpio, gpio) 1072 1073 /* pc20a_ebi_a2 */ 1074 #define PC20A_EBI_A2 \ 1075 SAM_PINMUX(c, 20, a, periph) 1076 1077 /* pc20b_pwm_pwmh2 */ 1078 #define PC20B_PWM_PWMH2 \ 1079 SAM_PINMUX(c, 20, b, periph) 1080 1081 /* pc21_gpio */ 1082 #define PC21_GPIO \ 1083 SAM_PINMUX(c, 21, gpio, gpio) 1084 1085 /* pc21a_ebi_a3 */ 1086 #define PC21A_EBI_A3 \ 1087 SAM_PINMUX(c, 21, a, periph) 1088 1089 /* pc21b_pwm_pwmh3 */ 1090 #define PC21B_PWM_PWMH3 \ 1091 SAM_PINMUX(c, 21, b, periph) 1092 1093 /* pc22_gpio */ 1094 #define PC22_GPIO \ 1095 SAM_PINMUX(c, 22, gpio, gpio) 1096 1097 /* pc22a_ebi_a4 */ 1098 #define PC22A_EBI_A4 \ 1099 SAM_PINMUX(c, 22, a, periph) 1100 1101 /* pc22b_pwm_pwml3 */ 1102 #define PC22B_PWM_PWML3 \ 1103 SAM_PINMUX(c, 22, b, periph) 1104 1105 /* pc23_gpio */ 1106 #define PC23_GPIO \ 1107 SAM_PINMUX(c, 23, gpio, gpio) 1108 1109 /* pc23a_ebi_a5 */ 1110 #define PC23A_EBI_A5 \ 1111 SAM_PINMUX(c, 23, a, periph) 1112 1113 /* pc23b_tc1_tioa3 */ 1114 #define PC23B_TC1_TIOA3 \ 1115 SAM_PINMUX(c, 23, b, periph) 1116 1117 /* pc24_gpio */ 1118 #define PC24_GPIO \ 1119 SAM_PINMUX(c, 24, gpio, gpio) 1120 1121 /* pc24a_ebi_a6 */ 1122 #define PC24A_EBI_A6 \ 1123 SAM_PINMUX(c, 24, a, periph) 1124 1125 /* pc24b_tc1_tiob3 */ 1126 #define PC24B_TC1_TIOB3 \ 1127 SAM_PINMUX(c, 24, b, periph) 1128 1129 /* pc25_gpio */ 1130 #define PC25_GPIO \ 1131 SAM_PINMUX(c, 25, gpio, gpio) 1132 1133 /* pc25a_ebi_a7 */ 1134 #define PC25A_EBI_A7 \ 1135 SAM_PINMUX(c, 25, a, periph) 1136 1137 /* pc25b_tc1_tclk3 */ 1138 #define PC25B_TC1_TCLK3 \ 1139 SAM_PINMUX(c, 25, b, periph) 1140 1141 /* pc26_gpio */ 1142 #define PC26_GPIO \ 1143 SAM_PINMUX(c, 26, gpio, gpio) 1144 1145 /* pc26a_ebi_a8 */ 1146 #define PC26A_EBI_A8 \ 1147 SAM_PINMUX(c, 26, a, periph) 1148 1149 /* pc26b_tc1_tioa4 */ 1150 #define PC26B_TC1_TIOA4 \ 1151 SAM_PINMUX(c, 26, b, periph) 1152 1153 /* pc26x_afec0_ad12 */ 1154 #define PC26X_AFEC0_AD12 \ 1155 SAM_PINMUX(c, 26, x, extra) 1156 1157 /* pc27_gpio */ 1158 #define PC27_GPIO \ 1159 SAM_PINMUX(c, 27, gpio, gpio) 1160 1161 /* pc27a_ebi_a9 */ 1162 #define PC27A_EBI_A9 \ 1163 SAM_PINMUX(c, 27, a, periph) 1164 1165 /* pc27b_tc1_tiob4 */ 1166 #define PC27B_TC1_TIOB4 \ 1167 SAM_PINMUX(c, 27, b, periph) 1168 1169 /* pc27x_afec0_ad13 */ 1170 #define PC27X_AFEC0_AD13 \ 1171 SAM_PINMUX(c, 27, x, extra) 1172 1173 /* pc28_gpio */ 1174 #define PC28_GPIO \ 1175 SAM_PINMUX(c, 28, gpio, gpio) 1176 1177 /* pc28a_ebi_a10 */ 1178 #define PC28A_EBI_A10 \ 1179 SAM_PINMUX(c, 28, a, periph) 1180 1181 /* pc28b_tc1_tclk4 */ 1182 #define PC28B_TC1_TCLK4 \ 1183 SAM_PINMUX(c, 28, b, periph) 1184 1185 /* pc29_gpio */ 1186 #define PC29_GPIO \ 1187 SAM_PINMUX(c, 29, gpio, gpio) 1188 1189 /* pc29a_ebi_a11 */ 1190 #define PC29A_EBI_A11 \ 1191 SAM_PINMUX(c, 29, a, periph) 1192 1193 /* pc29b_tc1_tioa5 */ 1194 #define PC29B_TC1_TIOA5 \ 1195 SAM_PINMUX(c, 29, b, periph) 1196 1197 /* pc29x_afec0_ad9 */ 1198 #define PC29X_AFEC0_AD9 \ 1199 SAM_PINMUX(c, 29, x, extra) 1200 1201 /* pc30_gpio */ 1202 #define PC30_GPIO \ 1203 SAM_PINMUX(c, 30, gpio, gpio) 1204 1205 /* pc30a_ebi_a12 */ 1206 #define PC30A_EBI_A12 \ 1207 SAM_PINMUX(c, 30, a, periph) 1208 1209 /* pc30b_tc1_tiob5 */ 1210 #define PC30B_TC1_TIOB5 \ 1211 SAM_PINMUX(c, 30, b, periph) 1212 1213 /* pc30x_afec0_ad10 */ 1214 #define PC30X_AFEC0_AD10 \ 1215 SAM_PINMUX(c, 30, x, extra) 1216 1217 /* pc31_gpio */ 1218 #define PC31_GPIO \ 1219 SAM_PINMUX(c, 31, gpio, gpio) 1220 1221 /* pc31a_ebi_a13 */ 1222 #define PC31A_EBI_A13 \ 1223 SAM_PINMUX(c, 31, a, periph) 1224 1225 /* pc31b_tc1_tclk5 */ 1226 #define PC31B_TC1_TCLK5 \ 1227 SAM_PINMUX(c, 31, b, periph) 1228 1229 /* pc31x_afec0_ad11 */ 1230 #define PC31X_AFEC0_AD11 \ 1231 SAM_PINMUX(c, 31, x, extra) 1232 1233 /* pd0_gpio */ 1234 #define PD0_GPIO \ 1235 SAM_PINMUX(d, 0, gpio, gpio) 1236 1237 /* pd0a_gmac_gtxck */ 1238 #define PD0A_GMAC_GTXCK \ 1239 SAM_PINMUX(d, 0, a, periph) 1240 1241 /* pd1_gpio */ 1242 #define PD1_GPIO \ 1243 SAM_PINMUX(d, 1, gpio, gpio) 1244 1245 /* pd1a_gmac_gtxen */ 1246 #define PD1A_GMAC_GTXEN \ 1247 SAM_PINMUX(d, 1, a, periph) 1248 1249 /* pd2_gpio */ 1250 #define PD2_GPIO \ 1251 SAM_PINMUX(d, 2, gpio, gpio) 1252 1253 /* pd2a_gmac_gtx0 */ 1254 #define PD2A_GMAC_GTX0 \ 1255 SAM_PINMUX(d, 2, a, periph) 1256 1257 /* pd3_gpio */ 1258 #define PD3_GPIO \ 1259 SAM_PINMUX(d, 3, gpio, gpio) 1260 1261 /* pd3a_gmac_gtx1 */ 1262 #define PD3A_GMAC_GTX1 \ 1263 SAM_PINMUX(d, 3, a, periph) 1264 1265 /* pd4_gpio */ 1266 #define PD4_GPIO \ 1267 SAM_PINMUX(d, 4, gpio, gpio) 1268 1269 /* pd4a_gmac_grxdv */ 1270 #define PD4A_GMAC_GRXDV \ 1271 SAM_PINMUX(d, 4, a, periph) 1272 1273 /* pd5_gpio */ 1274 #define PD5_GPIO \ 1275 SAM_PINMUX(d, 5, gpio, gpio) 1276 1277 /* pd5a_gmac_grx0 */ 1278 #define PD5A_GMAC_GRX0 \ 1279 SAM_PINMUX(d, 5, a, periph) 1280 1281 /* pd6_gpio */ 1282 #define PD6_GPIO \ 1283 SAM_PINMUX(d, 6, gpio, gpio) 1284 1285 /* pd6a_gmac_grx1 */ 1286 #define PD6A_GMAC_GRX1 \ 1287 SAM_PINMUX(d, 6, a, periph) 1288 1289 /* pd7_gpio */ 1290 #define PD7_GPIO \ 1291 SAM_PINMUX(d, 7, gpio, gpio) 1292 1293 /* pd7a_gmac_grxer */ 1294 #define PD7A_GMAC_GRXER \ 1295 SAM_PINMUX(d, 7, a, periph) 1296 1297 /* pd8_gpio */ 1298 #define PD8_GPIO \ 1299 SAM_PINMUX(d, 8, gpio, gpio) 1300 1301 /* pd8a_gmac_gmdc */ 1302 #define PD8A_GMAC_GMDC \ 1303 SAM_PINMUX(d, 8, a, periph) 1304 1305 /* pd9_gpio */ 1306 #define PD9_GPIO \ 1307 SAM_PINMUX(d, 9, gpio, gpio) 1308 1309 /* pd9a_gmac_gmdio */ 1310 #define PD9A_GMAC_GMDIO \ 1311 SAM_PINMUX(d, 9, a, periph) 1312 1313 /* pd10_gpio */ 1314 #define PD10_GPIO \ 1315 SAM_PINMUX(d, 10, gpio, gpio) 1316 1317 /* pd10a_gmac_gcrs */ 1318 #define PD10A_GMAC_GCRS \ 1319 SAM_PINMUX(d, 10, a, periph) 1320 1321 /* pd11_gpio */ 1322 #define PD11_GPIO \ 1323 SAM_PINMUX(d, 11, gpio, gpio) 1324 1325 /* pd11a_gmac_grx2 */ 1326 #define PD11A_GMAC_GRX2 \ 1327 SAM_PINMUX(d, 11, a, periph) 1328 1329 /* pd12_gpio */ 1330 #define PD12_GPIO \ 1331 SAM_PINMUX(d, 12, gpio, gpio) 1332 1333 /* pd12a_gmac_grx3 */ 1334 #define PD12A_GMAC_GRX3 \ 1335 SAM_PINMUX(d, 12, a, periph) 1336 1337 /* pd13_gpio */ 1338 #define PD13_GPIO \ 1339 SAM_PINMUX(d, 13, gpio, gpio) 1340 1341 /* pd13a_gmac_gcol */ 1342 #define PD13A_GMAC_GCOL \ 1343 SAM_PINMUX(d, 13, a, periph) 1344 1345 /* pd14_gpio */ 1346 #define PD14_GPIO \ 1347 SAM_PINMUX(d, 14, gpio, gpio) 1348 1349 /* pd14a_gmac_grxck */ 1350 #define PD14A_GMAC_GRXCK \ 1351 SAM_PINMUX(d, 14, a, periph) 1352 1353 /* pd15_gpio */ 1354 #define PD15_GPIO \ 1355 SAM_PINMUX(d, 15, gpio, gpio) 1356 1357 /* pd15a_gmac_gtx2 */ 1358 #define PD15A_GMAC_GTX2 \ 1359 SAM_PINMUX(d, 15, a, periph) 1360 1361 /* pd16_gpio */ 1362 #define PD16_GPIO \ 1363 SAM_PINMUX(d, 16, gpio, gpio) 1364 1365 /* pd16a_gmac_gtx3 */ 1366 #define PD16A_GMAC_GTX3 \ 1367 SAM_PINMUX(d, 16, a, periph) 1368 1369 /* pd17_gpio */ 1370 #define PD17_GPIO \ 1371 SAM_PINMUX(d, 17, gpio, gpio) 1372 1373 /* pd17a_gmac_gtxer */ 1374 #define PD17A_GMAC_GTXER \ 1375 SAM_PINMUX(d, 17, a, periph) 1376 1377 /* pd18_gpio */ 1378 #define PD18_GPIO \ 1379 SAM_PINMUX(d, 18, gpio, gpio) 1380 1381 /* pd18a_ebi_ncs1 */ 1382 #define PD18A_EBI_NCS1 \ 1383 SAM_PINMUX(d, 18, a, periph) 1384 1385 /* pd19_gpio */ 1386 #define PD19_GPIO \ 1387 SAM_PINMUX(d, 19, gpio, gpio) 1388 1389 /* pd19a_ebi_ncs3 */ 1390 #define PD19A_EBI_NCS3 \ 1391 SAM_PINMUX(d, 19, a, periph) 1392 1393 /* pd20_gpio */ 1394 #define PD20_GPIO \ 1395 SAM_PINMUX(d, 20, gpio, gpio) 1396 1397 /* pd20a_pwm_pwmh0 */ 1398 #define PD20A_PWM_PWMH0 \ 1399 SAM_PINMUX(d, 20, a, periph) 1400 1401 /* pd21_gpio */ 1402 #define PD21_GPIO \ 1403 SAM_PINMUX(d, 21, gpio, gpio) 1404 1405 /* pd21a_pwm_pwmh1 */ 1406 #define PD21A_PWM_PWMH1 \ 1407 SAM_PINMUX(d, 21, a, periph) 1408 1409 /* pd22_gpio */ 1410 #define PD22_GPIO \ 1411 SAM_PINMUX(d, 22, gpio, gpio) 1412 1413 /* pd22a_pwm_pwmh2 */ 1414 #define PD22A_PWM_PWMH2 \ 1415 SAM_PINMUX(d, 22, a, periph) 1416 1417 /* pd23_gpio */ 1418 #define PD23_GPIO \ 1419 SAM_PINMUX(d, 23, gpio, gpio) 1420 1421 /* pd23a_pwm_pwmh3 */ 1422 #define PD23A_PWM_PWMH3 \ 1423 SAM_PINMUX(d, 23, a, periph) 1424 1425 /* pd24_gpio */ 1426 #define PD24_GPIO \ 1427 SAM_PINMUX(d, 24, gpio, gpio) 1428 1429 /* pd24a_pwm_pwml0 */ 1430 #define PD24A_PWM_PWML0 \ 1431 SAM_PINMUX(d, 24, a, periph) 1432 1433 /* pd25_gpio */ 1434 #define PD25_GPIO \ 1435 SAM_PINMUX(d, 25, gpio, gpio) 1436 1437 /* pd25a_pwm_pwml1 */ 1438 #define PD25A_PWM_PWML1 \ 1439 SAM_PINMUX(d, 25, a, periph) 1440 1441 /* pd26_gpio */ 1442 #define PD26_GPIO \ 1443 SAM_PINMUX(d, 26, gpio, gpio) 1444 1445 /* pd26a_pwm_pwml2 */ 1446 #define PD26A_PWM_PWML2 \ 1447 SAM_PINMUX(d, 26, a, periph) 1448 1449 /* pd27_gpio */ 1450 #define PD27_GPIO \ 1451 SAM_PINMUX(d, 27, gpio, gpio) 1452 1453 /* pd27a_pwm_pwml3 */ 1454 #define PD27A_PWM_PWML3 \ 1455 SAM_PINMUX(d, 27, a, periph) 1456 1457 /* pd28_gpio */ 1458 #define PD28_GPIO \ 1459 SAM_PINMUX(d, 28, gpio, gpio) 1460 1461 /* pd29_gpio */ 1462 #define PD29_GPIO \ 1463 SAM_PINMUX(d, 29, gpio, gpio) 1464 1465 /* pd30_gpio */ 1466 #define PD30_GPIO \ 1467 SAM_PINMUX(d, 30, gpio, gpio) 1468 1469 /* pd31_gpio */ 1470 #define PD31_GPIO \ 1471 SAM_PINMUX(d, 31, gpio, gpio) 1472 1473 /* pe0_gpio */ 1474 #define PE0_GPIO \ 1475 SAM_PINMUX(e, 0, gpio, gpio) 1476 1477 /* pe1_gpio */ 1478 #define PE1_GPIO \ 1479 SAM_PINMUX(e, 1, gpio, gpio) 1480 1481 /* pe2_gpio */ 1482 #define PE2_GPIO \ 1483 SAM_PINMUX(e, 2, gpio, gpio) 1484 1485 /* pe3_gpio */ 1486 #define PE3_GPIO \ 1487 SAM_PINMUX(e, 3, gpio, gpio) 1488 1489 /* pe4_gpio */ 1490 #define PE4_GPIO \ 1491 SAM_PINMUX(e, 4, gpio, gpio) 1492 1493 /* pe5_gpio */ 1494 #define PE5_GPIO \ 1495 SAM_PINMUX(e, 5, gpio, gpio) 1496
