1 /* 2 * Autogenerated file 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h> 8 9 /* pa0_gpio */ 10 #define PA0_GPIO \ 11 SAM_PINMUX(a, 0, gpio, gpio) 12 13 /* pa0a_can0_tx */ 14 #define PA0A_CAN0_TX \ 15 SAM_PINMUX(a, 0, a, periph) 16 17 /* pa0b_pwm_pwml3 */ 18 #define PA0B_PWM_PWML3 \ 19 SAM_PINMUX(a, 0, b, periph) 20 21 /* pa1_gpio */ 22 #define PA1_GPIO \ 23 SAM_PINMUX(a, 1, gpio, gpio) 24 25 /* pa1a_can0_rx */ 26 #define PA1A_CAN0_RX \ 27 SAM_PINMUX(a, 1, a, periph) 28 29 /* pa1b_pmc_pck0 */ 30 #define PA1B_PMC_PCK0 \ 31 SAM_PINMUX(a, 1, b, periph) 32 33 /* pa1x_supc_wkup0 */ 34 #define PA1X_SUPC_WKUP0 \ 35 SAM_PINMUX(a, 1, x, extra) 36 37 /* pa2_gpio */ 38 #define PA2_GPIO \ 39 SAM_PINMUX(a, 2, gpio, gpio) 40 41 /* pa2a_tc0_tioa1 */ 42 #define PA2A_TC0_TIOA1 \ 43 SAM_PINMUX(a, 2, a, periph) 44 45 /* pa2x_adc_ad0 */ 46 #define PA2X_ADC_AD0 \ 47 SAM_PINMUX(a, 2, x, extra) 48 49 /* pa3_gpio */ 50 #define PA3_GPIO \ 51 SAM_PINMUX(a, 3, gpio, gpio) 52 53 /* pa3a_tc0_tiob1 */ 54 #define PA3A_TC0_TIOB1 \ 55 SAM_PINMUX(a, 3, a, periph) 56 57 /* pa3b_pwm_pwmfi1 */ 58 #define PA3B_PWM_PWMFI1 \ 59 SAM_PINMUX(a, 3, b, periph) 60 61 /* pa3x_adc_ad1 */ 62 #define PA3X_ADC_AD1 \ 63 SAM_PINMUX(a, 3, x, extra) 64 65 /* pa3x_supc_wkup1 */ 66 #define PA3X_SUPC_WKUP1 \ 67 SAM_PINMUX(a, 3, x, extra) 68 69 /* pa4_gpio */ 70 #define PA4_GPIO \ 71 SAM_PINMUX(a, 4, gpio, gpio) 72 73 /* pa4a_tc0_tclk1 */ 74 #define PA4A_TC0_TCLK1 \ 75 SAM_PINMUX(a, 4, a, periph) 76 77 /* pa4x_adc_ad2 */ 78 #define PA4X_ADC_AD2 \ 79 SAM_PINMUX(a, 4, x, extra) 80 81 /* pa5_gpio */ 82 #define PA5_GPIO \ 83 SAM_PINMUX(a, 5, gpio, gpio) 84 85 /* pa5a_tc0_tioa2 */ 86 #define PA5A_TC0_TIOA2 \ 87 SAM_PINMUX(a, 5, a, periph) 88 89 /* pa5b_pwm_pwmfi0 */ 90 #define PA5B_PWM_PWMFI0 \ 91 SAM_PINMUX(a, 5, b, periph) 92 93 /* pa5x_supc_wkup2 */ 94 #define PA5X_SUPC_WKUP2 \ 95 SAM_PINMUX(a, 5, x, extra) 96 97 /* pa6_gpio */ 98 #define PA6_GPIO \ 99 SAM_PINMUX(a, 6, gpio, gpio) 100 101 /* pa6a_tc0_tiob2 */ 102 #define PA6A_TC0_TIOB2 \ 103 SAM_PINMUX(a, 6, a, periph) 104 105 /* pa6x_adc_ad3 */ 106 #define PA6X_ADC_AD3 \ 107 SAM_PINMUX(a, 6, x, extra) 108 109 /* pa7_gpio */ 110 #define PA7_GPIO \ 111 SAM_PINMUX(a, 7, gpio, gpio) 112 113 /* pa7a_tc0_tclk2 */ 114 #define PA7A_TC0_TCLK2 \ 115 SAM_PINMUX(a, 7, a, periph) 116 117 /* pa7x_supc_wkup3 */ 118 #define PA7X_SUPC_WKUP3 \ 119 SAM_PINMUX(a, 7, x, extra) 120 121 /* pa8_gpio */ 122 #define PA8_GPIO \ 123 SAM_PINMUX(a, 8, gpio, gpio) 124 125 /* pa8a_uart_rxd */ 126 #define PA8A_UART_RXD \ 127 SAM_PINMUX(a, 8, a, periph) 128 129 /* pa8b_pwm_pwmh0 */ 130 #define PA8B_PWM_PWMH0 \ 131 SAM_PINMUX(a, 8, b, periph) 132 133 /* pa8x_supc_wkup4 */ 134 #define PA8X_SUPC_WKUP4 \ 135 SAM_PINMUX(a, 8, x, extra) 136 137 /* pa9_gpio */ 138 #define PA9_GPIO \ 139 SAM_PINMUX(a, 9, gpio, gpio) 140 141 /* pa9a_uart_txd */ 142 #define PA9A_UART_TXD \ 143 SAM_PINMUX(a, 9, a, periph) 144 145 /* pa9b_pwm_pwmh3 */ 146 #define PA9B_PWM_PWMH3 \ 147 SAM_PINMUX(a, 9, b, periph) 148 149 /* pa10_gpio */ 150 #define PA10_GPIO \ 151 SAM_PINMUX(a, 10, gpio, gpio) 152 153 /* pa10a_usart0_rxd */ 154 #define PA10A_USART0_RXD \ 155 SAM_PINMUX(a, 10, a, periph) 156 157 /* pa10b_dacc_datrg */ 158 #define PA10B_DACC_DATRG \ 159 SAM_PINMUX(a, 10, b, periph) 160 161 /* pa10x_supc_wkup5 */ 162 #define PA10X_SUPC_WKUP5 \ 163 SAM_PINMUX(a, 10, x, extra) 164 165 /* pa11_gpio */ 166 #define PA11_GPIO \ 167 SAM_PINMUX(a, 11, gpio, gpio) 168 169 /* pa11a_usart0_txd */ 170 #define PA11A_USART0_TXD \ 171 SAM_PINMUX(a, 11, a, periph) 172 173 /* pa11b_adc_adtrg */ 174 #define PA11B_ADC_ADTRG \ 175 SAM_PINMUX(a, 11, b, periph) 176 177 /* pa11x_supc_wkup6 */ 178 #define PA11X_SUPC_WKUP6 \ 179 SAM_PINMUX(a, 11, x, extra) 180 181 /* pa12_gpio */ 182 #define PA12_GPIO \ 183 SAM_PINMUX(a, 12, gpio, gpio) 184 185 /* pa12a_usart1_rxd */ 186 #define PA12A_USART1_RXD \ 187 SAM_PINMUX(a, 12, a, periph) 188 189 /* pa12b_pwm_pwml1 */ 190 #define PA12B_PWM_PWML1 \ 191 SAM_PINMUX(a, 12, b, periph) 192 193 /* pa12x_supc_wkup7 */ 194 #define PA12X_SUPC_WKUP7 \ 195 SAM_PINMUX(a, 12, x, extra) 196 197 /* pa13_gpio */ 198 #define PA13_GPIO \ 199 SAM_PINMUX(a, 13, gpio, gpio) 200 201 /* pa13a_usart1_txd */ 202 #define PA13A_USART1_TXD \ 203 SAM_PINMUX(a, 13, a, periph) 204 205 /* pa13b_pwm_pwmh2 */ 206 #define PA13B_PWM_PWMH2 \ 207 SAM_PINMUX(a, 13, b, periph) 208 209 /* pa14_gpio */ 210 #define PA14_GPIO \ 211 SAM_PINMUX(a, 14, gpio, gpio) 212 213 /* pa14a_usart1_rts */ 214 #define PA14A_USART1_RTS \ 215 SAM_PINMUX(a, 14, a, periph) 216 217 /* pa14b_ssc_tk */ 218 #define PA14B_SSC_TK \ 219 SAM_PINMUX(a, 14, b, periph) 220 221 /* pa15_gpio */ 222 #define PA15_GPIO \ 223 SAM_PINMUX(a, 15, gpio, gpio) 224 225 /* pa15a_usart1_cts */ 226 #define PA15A_USART1_CTS \ 227 SAM_PINMUX(a, 15, a, periph) 228 229 /* pa15b_ssc_tf */ 230 #define PA15B_SSC_TF \ 231 SAM_PINMUX(a, 15, b, periph) 232 233 /* pa15x_supc_wkup8 */ 234 #define PA15X_SUPC_WKUP8 \ 235 SAM_PINMUX(a, 15, x, extra) 236 237 /* pa16_gpio */ 238 #define PA16_GPIO \ 239 SAM_PINMUX(a, 16, gpio, gpio) 240 241 /* pa16a_spi1_spck1 */ 242 #define PA16A_SPI1_SPCK1 \ 243 SAM_PINMUX(a, 16, a, periph) 244 245 /* pa16b_ssc_td */ 246 #define PA16B_SSC_TD \ 247 SAM_PINMUX(a, 16, b, periph) 248 249 /* pa16x_adc_ad7 */ 250 #define PA16X_ADC_AD7 \ 251 SAM_PINMUX(a, 16, x, extra) 252 253 /* pa17_gpio */ 254 #define PA17_GPIO \ 255 SAM_PINMUX(a, 17, gpio, gpio) 256 257 /* pa17a_twi0_twd */ 258 #define PA17A_TWI0_TWD \ 259 SAM_PINMUX(a, 17, a, periph) 260 261 /* pa17b_spi0_spck0 */ 262 #define PA17B_SPI0_SPCK0 \ 263 SAM_PINMUX(a, 17, b, periph) 264 265 /* pa18_gpio */ 266 #define PA18_GPIO \ 267 SAM_PINMUX(a, 18, gpio, gpio) 268 269 /* pa18a_twi0_twck */ 270 #define PA18A_TWI0_TWCK \ 271 SAM_PINMUX(a, 18, a, periph) 272 273 /* pa18x_supc_wkup9 */ 274 #define PA18X_SUPC_WKUP9 \ 275 SAM_PINMUX(a, 18, x, extra) 276 277 /* pa19_gpio */ 278 #define PA19_GPIO \ 279 SAM_PINMUX(a, 19, gpio, gpio) 280 281 /* pa19a_hsmci_mcck */ 282 #define PA19A_HSMCI_MCCK \ 283 SAM_PINMUX(a, 19, a, periph) 284 285 /* pa19b_pwm_pwmh1 */ 286 #define PA19B_PWM_PWMH1 \ 287 SAM_PINMUX(a, 19, b, periph) 288 289 /* pa20_gpio */ 290 #define PA20_GPIO \ 291 SAM_PINMUX(a, 20, gpio, gpio) 292 293 /* pa20a_hsmci_mccda */ 294 #define PA20A_HSMCI_MCCDA \ 295 SAM_PINMUX(a, 20, a, periph) 296 297 /* pa20b_pwm_pwml2 */ 298 #define PA20B_PWM_PWML2 \ 299 SAM_PINMUX(a, 20, b, periph) 300 301 /* pa21_gpio */ 302 #define PA21_GPIO \ 303 SAM_PINMUX(a, 21, gpio, gpio) 304 305 /* pa21a_hsmci_mcda0 */ 306 #define PA21A_HSMCI_MCDA0 \ 307 SAM_PINMUX(a, 21, a, periph) 308 309 /* pa21b_pwm_pwml0 */ 310 #define PA21B_PWM_PWML0 \ 311 SAM_PINMUX(a, 21, b, periph) 312 313 /* pa22_gpio */ 314 #define PA22_GPIO \ 315 SAM_PINMUX(a, 22, gpio, gpio) 316 317 /* pa22a_hsmci_mcda1 */ 318 #define PA22A_HSMCI_MCDA1 \ 319 SAM_PINMUX(a, 22, a, periph) 320 321 /* pa22b_tc1_tclk3 */ 322 #define PA22B_TC1_TCLK3 \ 323 SAM_PINMUX(a, 22, b, periph) 324 325 /* pa22x_adc_ad4 */ 326 #define PA22X_ADC_AD4 \ 327 SAM_PINMUX(a, 22, x, extra) 328 329 /* pa23_gpio */ 330 #define PA23_GPIO \ 331 SAM_PINMUX(a, 23, gpio, gpio) 332 333 /* pa23a_hsmci_mcda2 */ 334 #define PA23A_HSMCI_MCDA2 \ 335 SAM_PINMUX(a, 23, a, periph) 336 337 /* pa23b_tc1_tclk4 */ 338 #define PA23B_TC1_TCLK4 \ 339 SAM_PINMUX(a, 23, b, periph) 340 341 /* pa23x_adc_ad5 */ 342 #define PA23X_ADC_AD5 \ 343 SAM_PINMUX(a, 23, x, extra) 344 345 /* pa24_gpio */ 346 #define PA24_GPIO \ 347 SAM_PINMUX(a, 24, gpio, gpio) 348 349 /* pa24a_hsmci_mcda3 */ 350 #define PA24A_HSMCI_MCDA3 \ 351 SAM_PINMUX(a, 24, a, periph) 352 353 /* pa24b_pmc_pck1 */ 354 #define PA24B_PMC_PCK1 \ 355 SAM_PINMUX(a, 24, b, periph) 356 357 /* pa24x_adc_ad6 */ 358 #define PA24X_ADC_AD6 \ 359 SAM_PINMUX(a, 24, x, extra) 360 361 /* pa25_gpio */ 362 #define PA25_GPIO \ 363 SAM_PINMUX(a, 25, gpio, gpio) 364 365 /* pa25a_spi0_miso */ 366 #define PA25A_SPI0_MISO \ 367 SAM_PINMUX(a, 25, a, periph) 368 369 /* pa26_gpio */ 370 #define PA26_GPIO \ 371 SAM_PINMUX(a, 26, gpio, gpio) 372 373 /* pa26a_spi0_mosi */ 374 #define PA26A_SPI0_MOSI \ 375 SAM_PINMUX(a, 26, a, periph) 376 377 /* pa27_gpio */ 378 #define PA27_GPIO \ 379 SAM_PINMUX(a, 27, gpio, gpio) 380 381 /* pa27a_spi0_spck */ 382 #define PA27A_SPI0_SPCK \ 383 SAM_PINMUX(a, 27, a, periph) 384 385 /* pa27x_supc_wkup10 */ 386 #define PA27X_SUPC_WKUP10 \ 387 SAM_PINMUX(a, 27, x, extra) 388 389 /* pa28_gpio */ 390 #define PA28_GPIO \ 391 SAM_PINMUX(a, 28, gpio, gpio) 392 393 /* pa28a_spi0_npcs0 */ 394 #define PA28A_SPI0_NPCS0 \ 395 SAM_PINMUX(a, 28, a, periph) 396 397 /* pa28b_pmc_pck2 */ 398 #define PA28B_PMC_PCK2 \ 399 SAM_PINMUX(a, 28, b, periph) 400 401 /* pa28x_supc_wkup11 */ 402 #define PA28X_SUPC_WKUP11 \ 403 SAM_PINMUX(a, 28, x, extra) 404 405 /* pa29_gpio */ 406 #define PA29_GPIO \ 407 SAM_PINMUX(a, 29, gpio, gpio) 408 409 /* pa29a_spi0_npcs1 */ 410 #define PA29A_SPI0_NPCS1 \ 411 SAM_PINMUX(a, 29, a, periph) 412 413 /* pb0_gpio */ 414 #define PB0_GPIO \ 415 SAM_PINMUX(b, 0, gpio, gpio) 416 417 /* pb0a_emac_etxck_erefck */ 418 #define PB0A_EMAC_ETXCK_EREFCK \ 419 SAM_PINMUX(b, 0, a, periph) 420 421 /* pb0b_tc1_tioa3 */ 422 #define PB0B_TC1_TIOA3 \ 423 SAM_PINMUX(b, 0, b, periph) 424 425 /* pb1_gpio */ 426 #define PB1_GPIO \ 427 SAM_PINMUX(b, 1, gpio, gpio) 428 429 /* pb1a_emac_etxen */ 430 #define PB1A_EMAC_ETXEN \ 431 SAM_PINMUX(b, 1, a, periph) 432 433 /* pb1b_tc1_tiob3 */ 434 #define PB1B_TC1_TIOB3 \ 435 SAM_PINMUX(b, 1, b, periph) 436 437 /* pb2_gpio */ 438 #define PB2_GPIO \ 439 SAM_PINMUX(b, 2, gpio, gpio) 440 441 /* pb2a_emac_etx0 */ 442 #define PB2A_EMAC_ETX0 \ 443 SAM_PINMUX(b, 2, a, periph) 444 445 /* pb2b_tc1_tioa4 */ 446 #define PB2B_TC1_TIOA4 \ 447 SAM_PINMUX(b, 2, b, periph) 448 449 /* pb3_gpio */ 450 #define PB3_GPIO \ 451 SAM_PINMUX(b, 3, gpio, gpio) 452 453 /* pb3a_emac_etx1 */ 454 #define PB3A_EMAC_ETX1 \ 455 SAM_PINMUX(b, 3, a, periph) 456 457 /* pb3b_tc1_tiob4 */ 458 #define PB3B_TC1_TIOB4 \ 459 SAM_PINMUX(b, 3, b, periph) 460 461 /* pb4_gpio */ 462 #define PB4_GPIO \ 463 SAM_PINMUX(b, 4, gpio, gpio) 464 465 /* pb4a_emac_ecrsdv_erxdv */ 466 #define PB4A_EMAC_ECRSDV_ERXDV \ 467 SAM_PINMUX(b, 4, a, periph) 468 469 /* pb4b_tc1_tioa5 */ 470 #define PB4B_TC1_TIOA5 \ 471 SAM_PINMUX(b, 4, b, periph) 472 473 /* pb5_gpio */ 474 #define PB5_GPIO \ 475 SAM_PINMUX(b, 5, gpio, gpio) 476 477 /* pb5a_emac_erx0 */ 478 #define PB5A_EMAC_ERX0 \ 479 SAM_PINMUX(b, 5, a, periph) 480 481 /* pb5b_tc1_tiob5 */ 482 #define PB5B_TC1_TIOB5 \ 483 SAM_PINMUX(b, 5, b, periph) 484 485 /* pb6_gpio */ 486 #define PB6_GPIO \ 487 SAM_PINMUX(b, 6, gpio, gpio) 488 489 /* pb6a_emac_erx1 */ 490 #define PB6A_EMAC_ERX1 \ 491 SAM_PINMUX(b, 6, a, periph) 492 493 /* pb6b_pwm_pwml4 */ 494 #define PB6B_PWM_PWML4 \ 495 SAM_PINMUX(b, 6, b, periph) 496 497 /* pb7_gpio */ 498 #define PB7_GPIO \ 499 SAM_PINMUX(b, 7, gpio, gpio) 500 501 /* pb7a_emac_erxer */ 502 #define PB7A_EMAC_ERXER \ 503 SAM_PINMUX(b, 7, a, periph) 504 505 /* pb7b_pwm_pwml5 */ 506 #define PB7B_PWM_PWML5 \ 507 SAM_PINMUX(b, 7, b, periph) 508 509 /* pb8_gpio */ 510 #define PB8_GPIO \ 511 SAM_PINMUX(b, 8, gpio, gpio) 512 513 /* pb8a_emac_emdc */ 514 #define PB8A_EMAC_EMDC \ 515 SAM_PINMUX(b, 8, a, periph) 516 517 /* pb8b_pwm_pwml6 */ 518 #define PB8B_PWM_PWML6 \ 519 SAM_PINMUX(b, 8, b, periph) 520 521 /* pb9_gpio */ 522 #define PB9_GPIO \ 523 SAM_PINMUX(b, 9, gpio, gpio) 524 525 /* pb9a_emac_emdio */ 526 #define PB9A_EMAC_EMDIO \ 527 SAM_PINMUX(b, 9, a, periph) 528 529 /* pb9b_pwm_pwml7 */ 530 #define PB9B_PWM_PWML7 \ 531 SAM_PINMUX(b, 9, b, periph) 532 533 /* pb10_gpio */ 534 #define PB10_GPIO \ 535 SAM_PINMUX(b, 10, gpio, gpio) 536 537 /* pb10a_uotg_vbof */ 538 #define PB10A_UOTG_VBOF \ 539 SAM_PINMUX(b, 10, a, periph) 540 541 /* pb11_gpio */ 542 #define PB11_GPIO \ 543 SAM_PINMUX(b, 11, gpio, gpio) 544 545 /* pb11a_uotg_id */ 546 #define PB11A_UOTG_ID \ 547 SAM_PINMUX(b, 11, a, periph) 548 549 /* pb12_gpio */ 550 #define PB12_GPIO \ 551 SAM_PINMUX(b, 12, gpio, gpio) 552 553 /* pb12a_twi1_twd */ 554 #define PB12A_TWI1_TWD \ 555 SAM_PINMUX(b, 12, a, periph) 556 557 /* pb12b_pwm_pwmh0 */ 558 #define PB12B_PWM_PWMH0 \ 559 SAM_PINMUX(b, 12, b, periph) 560 561 /* pb12x_adc_ad8 */ 562 #define PB12X_ADC_AD8 \ 563 SAM_PINMUX(b, 12, x, extra) 564 565 /* pb13_gpio */ 566 #define PB13_GPIO \ 567 SAM_PINMUX(b, 13, gpio, gpio) 568 569 /* pb13a_twi1_twck */ 570 #define PB13A_TWI1_TWCK \ 571 SAM_PINMUX(b, 13, a, periph) 572 573 /* pb13b_pwm_pwmh1 */ 574 #define PB13B_PWM_PWMH1 \ 575 SAM_PINMUX(b, 13, b, periph) 576 577 /* pb13x_adc_ad9 */ 578 #define PB13X_ADC_AD9 \ 579 SAM_PINMUX(b, 13, x, extra) 580 581 /* pb14_gpio */ 582 #define PB14_GPIO \ 583 SAM_PINMUX(b, 14, gpio, gpio) 584 585 /* pb14a_can1_tx */ 586 #define PB14A_CAN1_TX \ 587 SAM_PINMUX(b, 14, a, periph) 588 589 /* pb14b_pwm_pwmh2 */ 590 #define PB14B_PWM_PWMH2 \ 591 SAM_PINMUX(b, 14, b, periph) 592 593 /* pb15_gpio */ 594 #define PB15_GPIO \ 595 SAM_PINMUX(b, 15, gpio, gpio) 596 597 /* pb15a_can1_rx */ 598 #define PB15A_CAN1_RX \ 599 SAM_PINMUX(b, 15, a, periph) 600 601 /* pb15b_pwm_pwmh3 */ 602 #define PB15B_PWM_PWMH3 \ 603 SAM_PINMUX(b, 15, b, periph) 604 605 /* pb15x_dacc_dac0 */ 606 #define PB15X_DACC_DAC0 \ 607 SAM_PINMUX(b, 15, x, extra) 608 609 /* pb15x_supc_wkup10 */ 610 #define PB15X_SUPC_WKUP10 \ 611 SAM_PINMUX(b, 15, x, extra) 612 613 /* pb16_gpio */ 614 #define PB16_GPIO \ 615 SAM_PINMUX(b, 16, gpio, gpio) 616 617 /* pb16a_tc1_tclk5 */ 618 #define PB16A_TC1_TCLK5 \ 619 SAM_PINMUX(b, 16, a, periph) 620 621 /* pb16b_pwm_pwml0 */ 622 #define PB16B_PWM_PWML0 \ 623 SAM_PINMUX(b, 16, b, periph) 624 625 /* pb16x_dacc_dac1 */ 626 #define PB16X_DACC_DAC1 \ 627 SAM_PINMUX(b, 16, x, extra) 628 629 /* pb17_gpio */ 630 #define PB17_GPIO \ 631 SAM_PINMUX(b, 17, gpio, gpio) 632 633 /* pb17a_ssc_rf */ 634 #define PB17A_SSC_RF \ 635 SAM_PINMUX(b, 17, a, periph) 636 637 /* pb17b_pwm_pwml1 */ 638 #define PB17B_PWM_PWML1 \ 639 SAM_PINMUX(b, 17, b, periph) 640 641 /* pb17x_adc_ad10 */ 642 #define PB17X_ADC_AD10 \ 643 SAM_PINMUX(b, 17, x, extra) 644 645 /* pb18_gpio */ 646 #define PB18_GPIO \ 647 SAM_PINMUX(b, 18, gpio, gpio) 648 649 /* pb18a_ssc_rd */ 650 #define PB18A_SSC_RD \ 651 SAM_PINMUX(b, 18, a, periph) 652 653 /* pb18b_pwm_pwml2 */ 654 #define PB18B_PWM_PWML2 \ 655 SAM_PINMUX(b, 18, b, periph) 656 657 /* pb18x_adc_ad11 */ 658 #define PB18X_ADC_AD11 \ 659 SAM_PINMUX(b, 18, x, extra) 660 661 /* pb19_gpio */ 662 #define PB19_GPIO \ 663 SAM_PINMUX(b, 19, gpio, gpio) 664 665 /* pb19a_ssc_rk */ 666 #define PB19A_SSC_RK \ 667 SAM_PINMUX(b, 19, a, periph) 668 669 /* pb19b_pwm_pwml3 */ 670 #define PB19B_PWM_PWML3 \ 671 SAM_PINMUX(b, 19, b, periph) 672 673 /* pb19x_adc_ad12 */ 674 #define PB19X_ADC_AD12 \ 675 SAM_PINMUX(b, 19, x, extra) 676 677 /* pb20_gpio */ 678 #define PB20_GPIO \ 679 SAM_PINMUX(b, 20, gpio, gpio) 680 681 /* pb20a_usart2_txd */ 682 #define PB20A_USART2_TXD \ 683 SAM_PINMUX(b, 20, a, periph) 684 685 /* pb20b_spi0_npcs1 */ 686 #define PB20B_SPI0_NPCS1 \ 687 SAM_PINMUX(b, 20, b, periph) 688 689 /* pb20x_adc_ad13 */ 690 #define PB20X_ADC_AD13 \ 691 SAM_PINMUX(b, 20, x, extra) 692 693 /* pb21_gpio */ 694 #define PB21_GPIO \ 695 SAM_PINMUX(b, 21, gpio, gpio) 696 697 /* pb21a_usart2_rxd */ 698 #define PB21A_USART2_RXD \ 699 SAM_PINMUX(b, 21, a, periph) 700 701 /* pb21b_spi0_npcs2 */ 702 #define PB21B_SPI0_NPCS2 \ 703 SAM_PINMUX(b, 21, b, periph) 704 705 /* pb21x_adc_ad14 */ 706 #define PB21X_ADC_AD14 \ 707 SAM_PINMUX(b, 21, x, extra) 708 709 /* pb21x_supc_wkup13 */ 710 #define PB21X_SUPC_WKUP13 \ 711 SAM_PINMUX(b, 21, x, extra) 712 713 /* pb22_gpio */ 714 #define PB22_GPIO \ 715 SAM_PINMUX(b, 22, gpio, gpio) 716 717 /* pb22a_usart2_rts */ 718 #define PB22A_USART2_RTS \ 719 SAM_PINMUX(b, 22, a, periph) 720 721 /* pb22b_pmc_pck0 */ 722 #define PB22B_PMC_PCK0 \ 723 SAM_PINMUX(b, 22, b, periph) 724 725 /* pb23_gpio */ 726 #define PB23_GPIO \ 727 SAM_PINMUX(b, 23, gpio, gpio) 728 729 /* pb23a_usart2_cts */ 730 #define PB23A_USART2_CTS \ 731 SAM_PINMUX(b, 23, a, periph) 732 733 /* pb23b_spi0_npcs3 */ 734 #define PB23B_SPI0_NPCS3 \ 735 SAM_PINMUX(b, 23, b, periph) 736 737 /* pb23x_supc_wkup14 */ 738 #define PB23X_SUPC_WKUP14 \ 739 SAM_PINMUX(b, 23, x, extra) 740 741 /* pb24_gpio */ 742 #define PB24_GPIO \ 743 SAM_PINMUX(b, 24, gpio, gpio) 744 745 /* pb24a_usart2_sck */ 746 #define PB24A_USART2_SCK \ 747 SAM_PINMUX(b, 24, a, periph) 748 749 /* pb25_gpio */ 750 #define PB25_GPIO \ 751 SAM_PINMUX(b, 25, gpio, gpio) 752 753 /* pb25a_usart0_rts */ 754 #define PB25A_USART0_RTS \ 755 SAM_PINMUX(b, 25, a, periph) 756 757 /* pb25b_tc0_tioa0 */ 758 #define PB25B_TC0_TIOA0 \ 759 SAM_PINMUX(b, 25, b, periph) 760 761 /* pb26_gpio */ 762 #define PB26_GPIO \ 763 SAM_PINMUX(b, 26, gpio, gpio) 764 765 /* pb26a_usart0_cts */ 766 #define PB26A_USART0_CTS \ 767 SAM_PINMUX(b, 26, a, periph) 768 769 /* pb26b_tc0_tclk0 */ 770 #define PB26B_TC0_TCLK0 \ 771 SAM_PINMUX(b, 26, b, periph) 772 773 /* pb26x_supc_wkup15 */ 774 #define PB26X_SUPC_WKUP15 \ 775 SAM_PINMUX(b, 26, x, extra) 776 777 /* pb27_gpio */ 778 #define PB27_GPIO \ 779 SAM_PINMUX(b, 27, gpio, gpio) 780 781 /* pb27b_tc0_tiob0 */ 782 #define PB27B_TC0_TIOB0 \ 783 SAM_PINMUX(b, 27, b, periph) 784 785 /* pb28_gpio */ 786 #define PB28_GPIO \ 787 SAM_PINMUX(b, 28, gpio, gpio) 788 789 /* pb29_gpio */ 790 #define PB29_GPIO \ 791 SAM_PINMUX(b, 29, gpio, gpio) 792 793 /* pb30_gpio */ 794 #define PB30_GPIO \ 795 SAM_PINMUX(b, 30, gpio, gpio) 796 797 /* pb31_gpio */ 798 #define PB31_GPIO \ 799 SAM_PINMUX(b, 31, gpio, gpio) 800
