1 /** 2 * \file 3 * 4 * \brief Component description for TRNG 5 * 6 * Copyright (c) 2019 Microchip Technology Inc. 7 * 8 * \license_start 9 * 10 * \page License 11 * 12 * SPDX-License-Identifier: Apache-2.0 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 * \license_stop 27 * 28 */ 29 30 /* file generated from device description version 2019-01-18T21:19:59Z */ 31 #ifndef _SAME70_TRNG_COMPONENT_H_ 32 #define _SAME70_TRNG_COMPONENT_H_ 33 #define _SAME70_TRNG_COMPONENT_ /**< \deprecated Backward compatibility for ASF */ 34 35 /** \addtogroup SAME_SAME70 True Random Number Generator 36 * @{ 37 */ 38 /* ========================================================================== */ 39 /** SOFTWARE API DEFINITION FOR TRNG */ 40 /* ========================================================================== */ 41 #ifndef COMPONENT_TYPEDEF_STYLE 42 #define COMPONENT_TYPEDEF_STYLE 'R' /**< Defines default style of typedefs for the component header files ('R' = RFO, 'N' = NTO)*/ 43 #endif 44 45 #define TRNG_6334 /**< (TRNG) Module ID */ 46 #define REV_TRNG G /**< (TRNG) Module revision */ 47 48 /* -------- TRNG_CR : (TRNG Offset: 0x00) (/W 32) Control Register -------- */ 49 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 50 #if COMPONENT_TYPEDEF_STYLE == 'N' 51 typedef union { 52 struct { 53 uint32_t ENABLE:1; /**< bit: 0 Enables the TRNG to Provide Random Values */ 54 uint32_t :7; /**< bit: 1..7 Reserved */ 55 uint32_t KEY:24; /**< bit: 8..31 Security Key */ 56 } bit; /**< Structure used for bit access */ 57 uint32_t reg; /**< Type used for register access */ 58 } TRNG_CR_Type; 59 #endif 60 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 61 62 #define TRNG_CR_OFFSET (0x00) /**< (TRNG_CR) Control Register Offset */ 63 64 #define TRNG_CR_ENABLE_Pos 0 /**< (TRNG_CR) Enables the TRNG to Provide Random Values Position */ 65 #define TRNG_CR_ENABLE_Msk (_U_(0x1) << TRNG_CR_ENABLE_Pos) /**< (TRNG_CR) Enables the TRNG to Provide Random Values Mask */ 66 #define TRNG_CR_ENABLE TRNG_CR_ENABLE_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use TRNG_CR_ENABLE_Msk instead */ 67 #define TRNG_CR_KEY_Pos 8 /**< (TRNG_CR) Security Key Position */ 68 #define TRNG_CR_KEY_Msk (_U_(0xFFFFFF) << TRNG_CR_KEY_Pos) /**< (TRNG_CR) Security Key Mask */ 69 #define TRNG_CR_KEY(value) (TRNG_CR_KEY_Msk & ((value) << TRNG_CR_KEY_Pos)) 70 #define TRNG_CR_KEY_PASSWD_Val _U_(0x524E47) /**< (TRNG_CR) Writing any other value in this field aborts the write operation. */ 71 #define TRNG_CR_KEY_PASSWD (TRNG_CR_KEY_PASSWD_Val << TRNG_CR_KEY_Pos) /**< (TRNG_CR) Writing any other value in this field aborts the write operation. Position */ 72 #define TRNG_CR_MASK _U_(0xFFFFFF01) /**< \deprecated (TRNG_CR) Register MASK (Use TRNG_CR_Msk instead) */ 73 #define TRNG_CR_Msk _U_(0xFFFFFF01) /**< (TRNG_CR) Register Mask */ 74 75 76 /* -------- TRNG_IER : (TRNG Offset: 0x10) (/W 32) Interrupt Enable Register -------- */ 77 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 78 #if COMPONENT_TYPEDEF_STYLE == 'N' 79 typedef union { 80 struct { 81 uint32_t DATRDY:1; /**< bit: 0 Data Ready Interrupt Enable */ 82 uint32_t :31; /**< bit: 1..31 Reserved */ 83 } bit; /**< Structure used for bit access */ 84 uint32_t reg; /**< Type used for register access */ 85 } TRNG_IER_Type; 86 #endif 87 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 88 89 #define TRNG_IER_OFFSET (0x10) /**< (TRNG_IER) Interrupt Enable Register Offset */ 90 91 #define TRNG_IER_DATRDY_Pos 0 /**< (TRNG_IER) Data Ready Interrupt Enable Position */ 92 #define TRNG_IER_DATRDY_Msk (_U_(0x1) << TRNG_IER_DATRDY_Pos) /**< (TRNG_IER) Data Ready Interrupt Enable Mask */ 93 #define TRNG_IER_DATRDY TRNG_IER_DATRDY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use TRNG_IER_DATRDY_Msk instead */ 94 #define TRNG_IER_MASK _U_(0x01) /**< \deprecated (TRNG_IER) Register MASK (Use TRNG_IER_Msk instead) */ 95 #define TRNG_IER_Msk _U_(0x01) /**< (TRNG_IER) Register Mask */ 96 97 98 /* -------- TRNG_IDR : (TRNG Offset: 0x14) (/W 32) Interrupt Disable Register -------- */ 99 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 100 #if COMPONENT_TYPEDEF_STYLE == 'N' 101 typedef union { 102 struct { 103 uint32_t DATRDY:1; /**< bit: 0 Data Ready Interrupt Disable */ 104 uint32_t :31; /**< bit: 1..31 Reserved */ 105 } bit; /**< Structure used for bit access */ 106 uint32_t reg; /**< Type used for register access */ 107 } TRNG_IDR_Type; 108 #endif 109 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 110 111 #define TRNG_IDR_OFFSET (0x14) /**< (TRNG_IDR) Interrupt Disable Register Offset */ 112 113 #define TRNG_IDR_DATRDY_Pos 0 /**< (TRNG_IDR) Data Ready Interrupt Disable Position */ 114 #define TRNG_IDR_DATRDY_Msk (_U_(0x1) << TRNG_IDR_DATRDY_Pos) /**< (TRNG_IDR) Data Ready Interrupt Disable Mask */ 115 #define TRNG_IDR_DATRDY TRNG_IDR_DATRDY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use TRNG_IDR_DATRDY_Msk instead */ 116 #define TRNG_IDR_MASK _U_(0x01) /**< \deprecated (TRNG_IDR) Register MASK (Use TRNG_IDR_Msk instead) */ 117 #define TRNG_IDR_Msk _U_(0x01) /**< (TRNG_IDR) Register Mask */ 118 119 120 /* -------- TRNG_IMR : (TRNG Offset: 0x18) (R/ 32) Interrupt Mask Register -------- */ 121 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 122 #if COMPONENT_TYPEDEF_STYLE == 'N' 123 typedef union { 124 struct { 125 uint32_t DATRDY:1; /**< bit: 0 Data Ready Interrupt Mask */ 126 uint32_t :31; /**< bit: 1..31 Reserved */ 127 } bit; /**< Structure used for bit access */ 128 uint32_t reg; /**< Type used for register access */ 129 } TRNG_IMR_Type; 130 #endif 131 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 132 133 #define TRNG_IMR_OFFSET (0x18) /**< (TRNG_IMR) Interrupt Mask Register Offset */ 134 135 #define TRNG_IMR_DATRDY_Pos 0 /**< (TRNG_IMR) Data Ready Interrupt Mask Position */ 136 #define TRNG_IMR_DATRDY_Msk (_U_(0x1) << TRNG_IMR_DATRDY_Pos) /**< (TRNG_IMR) Data Ready Interrupt Mask Mask */ 137 #define TRNG_IMR_DATRDY TRNG_IMR_DATRDY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use TRNG_IMR_DATRDY_Msk instead */ 138 #define TRNG_IMR_MASK _U_(0x01) /**< \deprecated (TRNG_IMR) Register MASK (Use TRNG_IMR_Msk instead) */ 139 #define TRNG_IMR_Msk _U_(0x01) /**< (TRNG_IMR) Register Mask */ 140 141 142 /* -------- TRNG_ISR : (TRNG Offset: 0x1c) (R/ 32) Interrupt Status Register -------- */ 143 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 144 #if COMPONENT_TYPEDEF_STYLE == 'N' 145 typedef union { 146 struct { 147 uint32_t DATRDY:1; /**< bit: 0 Data Ready */ 148 uint32_t :31; /**< bit: 1..31 Reserved */ 149 } bit; /**< Structure used for bit access */ 150 uint32_t reg; /**< Type used for register access */ 151 } TRNG_ISR_Type; 152 #endif 153 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 154 155 #define TRNG_ISR_OFFSET (0x1C) /**< (TRNG_ISR) Interrupt Status Register Offset */ 156 157 #define TRNG_ISR_DATRDY_Pos 0 /**< (TRNG_ISR) Data Ready Position */ 158 #define TRNG_ISR_DATRDY_Msk (_U_(0x1) << TRNG_ISR_DATRDY_Pos) /**< (TRNG_ISR) Data Ready Mask */ 159 #define TRNG_ISR_DATRDY TRNG_ISR_DATRDY_Msk /**< \deprecated Old style mask definition for 1 bit bitfield. Use TRNG_ISR_DATRDY_Msk instead */ 160 #define TRNG_ISR_MASK _U_(0x01) /**< \deprecated (TRNG_ISR) Register MASK (Use TRNG_ISR_Msk instead) */ 161 #define TRNG_ISR_Msk _U_(0x01) /**< (TRNG_ISR) Register Mask */ 162 163 164 /* -------- TRNG_ODATA : (TRNG Offset: 0x50) (R/ 32) Output Data Register -------- */ 165 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 166 #if COMPONENT_TYPEDEF_STYLE == 'N' 167 typedef union { 168 struct { 169 uint32_t ODATA:32; /**< bit: 0..31 Output Data */ 170 } bit; /**< Structure used for bit access */ 171 uint32_t reg; /**< Type used for register access */ 172 } TRNG_ODATA_Type; 173 #endif 174 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 175 176 #define TRNG_ODATA_OFFSET (0x50) /**< (TRNG_ODATA) Output Data Register Offset */ 177 178 #define TRNG_ODATA_ODATA_Pos 0 /**< (TRNG_ODATA) Output Data Position */ 179 #define TRNG_ODATA_ODATA_Msk (_U_(0xFFFFFFFF) << TRNG_ODATA_ODATA_Pos) /**< (TRNG_ODATA) Output Data Mask */ 180 #define TRNG_ODATA_ODATA(value) (TRNG_ODATA_ODATA_Msk & ((value) << TRNG_ODATA_ODATA_Pos)) 181 #define TRNG_ODATA_MASK _U_(0xFFFFFFFF) /**< \deprecated (TRNG_ODATA) Register MASK (Use TRNG_ODATA_Msk instead) */ 182 #define TRNG_ODATA_Msk _U_(0xFFFFFFFF) /**< (TRNG_ODATA) Register Mask */ 183 184 185 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 186 #if COMPONENT_TYPEDEF_STYLE == 'R' 187 /** \brief TRNG hardware registers */ 188 typedef struct { 189 __O uint32_t TRNG_CR; /**< (TRNG Offset: 0x00) Control Register */ 190 __I uint8_t Reserved1[12]; 191 __O uint32_t TRNG_IER; /**< (TRNG Offset: 0x10) Interrupt Enable Register */ 192 __O uint32_t TRNG_IDR; /**< (TRNG Offset: 0x14) Interrupt Disable Register */ 193 __I uint32_t TRNG_IMR; /**< (TRNG Offset: 0x18) Interrupt Mask Register */ 194 __I uint32_t TRNG_ISR; /**< (TRNG Offset: 0x1C) Interrupt Status Register */ 195 __I uint8_t Reserved2[48]; 196 __I uint32_t TRNG_ODATA; /**< (TRNG Offset: 0x50) Output Data Register */ 197 } Trng; 198 199 #elif COMPONENT_TYPEDEF_STYLE == 'N' 200 /** \brief TRNG hardware registers */ 201 typedef struct { 202 __O TRNG_CR_Type TRNG_CR; /**< Offset: 0x00 ( /W 32) Control Register */ 203 __I uint8_t Reserved1[12]; 204 __O TRNG_IER_Type TRNG_IER; /**< Offset: 0x10 ( /W 32) Interrupt Enable Register */ 205 __O TRNG_IDR_Type TRNG_IDR; /**< Offset: 0x14 ( /W 32) Interrupt Disable Register */ 206 __I TRNG_IMR_Type TRNG_IMR; /**< Offset: 0x18 (R/ 32) Interrupt Mask Register */ 207 __I TRNG_ISR_Type TRNG_ISR; /**< Offset: 0x1C (R/ 32) Interrupt Status Register */ 208 __I uint8_t Reserved2[48]; 209 __I TRNG_ODATA_Type TRNG_ODATA; /**< Offset: 0x50 (R/ 32) Output Data Register */ 210 } Trng; 211 212 #else /* COMPONENT_TYPEDEF_STYLE */ 213 #error Unknown component typedef style 214 #endif /* COMPONENT_TYPEDEF_STYLE */ 215 216 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 217 /** @} end of True Random Number Generator */ 218 219 #endif /* _SAME70_TRNG_COMPONENT_H_ */ 220
