1 /** 2 * \file 3 * 4 * \brief Peripheral I/O description for SAM4LS2B 5 * 6 * Copyright (c) 2016 Atmel Corporation, 7 * a wholly owned subsidiary of Microchip Technology Inc. 8 * 9 * \asf_license_start 10 * 11 * \page License 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the Licence at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 * \asf_license_stop 26 * 27 */ 28 29 #ifndef _SAM4LS2B_PIO_ 30 #define _SAM4LS2B_PIO_ 31 32 #define PIN_PA00 0 /**< \brief Pin Number for PA00 */ 33 #define GPIO_PA00 _UL_(1 << 0) /**< \brief GPIO Mask for PA00 */ 34 #define PIN_PA01 1 /**< \brief Pin Number for PA01 */ 35 #define GPIO_PA01 _UL_(1 << 1) /**< \brief GPIO Mask for PA01 */ 36 #define PIN_PA02 2 /**< \brief Pin Number for PA02 */ 37 #define GPIO_PA02 _UL_(1 << 2) /**< \brief GPIO Mask for PA02 */ 38 #define PIN_PA03 3 /**< \brief Pin Number for PA03 */ 39 #define GPIO_PA03 _UL_(1 << 3) /**< \brief GPIO Mask for PA03 */ 40 #define PIN_PA04 4 /**< \brief Pin Number for PA04 */ 41 #define GPIO_PA04 _UL_(1 << 4) /**< \brief GPIO Mask for PA04 */ 42 #define PIN_PA05 5 /**< \brief Pin Number for PA05 */ 43 #define GPIO_PA05 _UL_(1 << 5) /**< \brief GPIO Mask for PA05 */ 44 #define PIN_PA06 6 /**< \brief Pin Number for PA06 */ 45 #define GPIO_PA06 _UL_(1 << 6) /**< \brief GPIO Mask for PA06 */ 46 #define PIN_PA07 7 /**< \brief Pin Number for PA07 */ 47 #define GPIO_PA07 _UL_(1 << 7) /**< \brief GPIO Mask for PA07 */ 48 #define PIN_PA08 8 /**< \brief Pin Number for PA08 */ 49 #define GPIO_PA08 _UL_(1 << 8) /**< \brief GPIO Mask for PA08 */ 50 #define PIN_PA09 9 /**< \brief Pin Number for PA09 */ 51 #define GPIO_PA09 _UL_(1 << 9) /**< \brief GPIO Mask for PA09 */ 52 #define PIN_PA10 10 /**< \brief Pin Number for PA10 */ 53 #define GPIO_PA10 _UL_(1 << 10) /**< \brief GPIO Mask for PA10 */ 54 #define PIN_PA11 11 /**< \brief Pin Number for PA11 */ 55 #define GPIO_PA11 _UL_(1 << 11) /**< \brief GPIO Mask for PA11 */ 56 #define PIN_PA12 12 /**< \brief Pin Number for PA12 */ 57 #define GPIO_PA12 _UL_(1 << 12) /**< \brief GPIO Mask for PA12 */ 58 #define PIN_PA13 13 /**< \brief Pin Number for PA13 */ 59 #define GPIO_PA13 _UL_(1 << 13) /**< \brief GPIO Mask for PA13 */ 60 #define PIN_PA14 14 /**< \brief Pin Number for PA14 */ 61 #define GPIO_PA14 _UL_(1 << 14) /**< \brief GPIO Mask for PA14 */ 62 #define PIN_PA15 15 /**< \brief Pin Number for PA15 */ 63 #define GPIO_PA15 _UL_(1 << 15) /**< \brief GPIO Mask for PA15 */ 64 #define PIN_PA16 16 /**< \brief Pin Number for PA16 */ 65 #define GPIO_PA16 _UL_(1 << 16) /**< \brief GPIO Mask for PA16 */ 66 #define PIN_PA17 17 /**< \brief Pin Number for PA17 */ 67 #define GPIO_PA17 _UL_(1 << 17) /**< \brief GPIO Mask for PA17 */ 68 #define PIN_PA18 18 /**< \brief Pin Number for PA18 */ 69 #define GPIO_PA18 _UL_(1 << 18) /**< \brief GPIO Mask for PA18 */ 70 #define PIN_PA19 19 /**< \brief Pin Number for PA19 */ 71 #define GPIO_PA19 _UL_(1 << 19) /**< \brief GPIO Mask for PA19 */ 72 #define PIN_PA20 20 /**< \brief Pin Number for PA20 */ 73 #define GPIO_PA20 _UL_(1 << 20) /**< \brief GPIO Mask for PA20 */ 74 #define PIN_PA21 21 /**< \brief Pin Number for PA21 */ 75 #define GPIO_PA21 _UL_(1 << 21) /**< \brief GPIO Mask for PA21 */ 76 #define PIN_PA22 22 /**< \brief Pin Number for PA22 */ 77 #define GPIO_PA22 _UL_(1 << 22) /**< \brief GPIO Mask for PA22 */ 78 #define PIN_PA23 23 /**< \brief Pin Number for PA23 */ 79 #define GPIO_PA23 _UL_(1 << 23) /**< \brief GPIO Mask for PA23 */ 80 #define PIN_PA24 24 /**< \brief Pin Number for PA24 */ 81 #define GPIO_PA24 _UL_(1 << 24) /**< \brief GPIO Mask for PA24 */ 82 #define PIN_PA25 25 /**< \brief Pin Number for PA25 */ 83 #define GPIO_PA25 _UL_(1 << 25) /**< \brief GPIO Mask for PA25 */ 84 #define PIN_PA26 26 /**< \brief Pin Number for PA26 */ 85 #define GPIO_PA26 _UL_(1 << 26) /**< \brief GPIO Mask for PA26 */ 86 #define PIN_PA27 27 /**< \brief Pin Number for PA27 */ 87 #define GPIO_PA27 _UL_(1 << 27) /**< \brief GPIO Mask for PA27 */ 88 #define PIN_PA28 28 /**< \brief Pin Number for PA28 */ 89 #define GPIO_PA28 _UL_(1 << 28) /**< \brief GPIO Mask for PA28 */ 90 #define PIN_PA29 29 /**< \brief Pin Number for PA29 */ 91 #define GPIO_PA29 _UL_(1 << 29) /**< \brief GPIO Mask for PA29 */ 92 #define PIN_PA30 30 /**< \brief Pin Number for PA30 */ 93 #define GPIO_PA30 _UL_(1 << 30) /**< \brief GPIO Mask for PA30 */ 94 #define PIN_PA31 31 /**< \brief Pin Number for PA31 */ 95 #define GPIO_PA31 _UL_(1 << 31) /**< \brief GPIO Mask for PA31 */ 96 #define PIN_PB00 32 /**< \brief Pin Number for PB00 */ 97 #define GPIO_PB00 _UL_(1 << 0) /**< \brief GPIO Mask for PB00 */ 98 #define PIN_PB01 33 /**< \brief Pin Number for PB01 */ 99 #define GPIO_PB01 _UL_(1 << 1) /**< \brief GPIO Mask for PB01 */ 100 #define PIN_PB02 34 /**< \brief Pin Number for PB02 */ 101 #define GPIO_PB02 _UL_(1 << 2) /**< \brief GPIO Mask for PB02 */ 102 #define PIN_PB03 35 /**< \brief Pin Number for PB03 */ 103 #define GPIO_PB03 _UL_(1 << 3) /**< \brief GPIO Mask for PB03 */ 104 #define PIN_PB04 36 /**< \brief Pin Number for PB04 */ 105 #define GPIO_PB04 _UL_(1 << 4) /**< \brief GPIO Mask for PB04 */ 106 #define PIN_PB05 37 /**< \brief Pin Number for PB05 */ 107 #define GPIO_PB05 _UL_(1 << 5) /**< \brief GPIO Mask for PB05 */ 108 #define PIN_PB06 38 /**< \brief Pin Number for PB06 */ 109 #define GPIO_PB06 _UL_(1 << 6) /**< \brief GPIO Mask for PB06 */ 110 #define PIN_PB07 39 /**< \brief Pin Number for PB07 */ 111 #define GPIO_PB07 _UL_(1 << 7) /**< \brief GPIO Mask for PB07 */ 112 #define PIN_PB08 40 /**< \brief Pin Number for PB08 */ 113 #define GPIO_PB08 _UL_(1 << 8) /**< \brief GPIO Mask for PB08 */ 114 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */ 115 #define GPIO_PB09 _UL_(1 << 9) /**< \brief GPIO Mask for PB09 */ 116 #define PIN_PB10 42 /**< \brief Pin Number for PB10 */ 117 #define GPIO_PB10 _UL_(1 << 10) /**< \brief GPIO Mask for PB10 */ 118 #define PIN_PB11 43 /**< \brief Pin Number for PB11 */ 119 #define GPIO_PB11 _UL_(1 << 11) /**< \brief GPIO Mask for PB11 */ 120 #define PIN_PB12 44 /**< \brief Pin Number for PB12 */ 121 #define GPIO_PB12 _UL_(1 << 12) /**< \brief GPIO Mask for PB12 */ 122 #define PIN_PB13 45 /**< \brief Pin Number for PB13 */ 123 #define GPIO_PB13 _UL_(1 << 13) /**< \brief GPIO Mask for PB13 */ 124 #define PIN_PB14 46 /**< \brief Pin Number for PB14 */ 125 #define GPIO_PB14 _UL_(1 << 14) /**< \brief GPIO Mask for PB14 */ 126 #define PIN_PB15 47 /**< \brief Pin Number for PB15 */ 127 #define GPIO_PB15 _UL_(1 << 15) /**< \brief GPIO Mask for PB15 */ 128 /* ========== GPIO definition for TWIMS0 peripheral ========== */ 129 #define PIN_PA24B_TWIMS0_TWCK _L_(24) /**< \brief TWIMS0 signal: TWCK on PA24 mux B */ 130 #define MUX_PA24B_TWIMS0_TWCK _L_(1) 131 #define PINMUX_PA24B_TWIMS0_TWCK ((PIN_PA24B_TWIMS0_TWCK << 16) | MUX_PA24B_TWIMS0_TWCK) 132 #define GPIO_PA24B_TWIMS0_TWCK _UL_(1 << 24) 133 #define PIN_PA23B_TWIMS0_TWD _L_(23) /**< \brief TWIMS0 signal: TWD on PA23 mux B */ 134 #define MUX_PA23B_TWIMS0_TWD _L_(1) 135 #define PINMUX_PA23B_TWIMS0_TWD ((PIN_PA23B_TWIMS0_TWD << 16) | MUX_PA23B_TWIMS0_TWD) 136 #define GPIO_PA23B_TWIMS0_TWD _UL_(1 << 23) 137 /* ========== GPIO definition for TWIMS1 peripheral ========== */ 138 #define PIN_PB01A_TWIMS1_TWCK _L_(33) /**< \brief TWIMS1 signal: TWCK on PB01 mux A */ 139 #define MUX_PB01A_TWIMS1_TWCK _L_(0) 140 #define PINMUX_PB01A_TWIMS1_TWCK ((PIN_PB01A_TWIMS1_TWCK << 16) | MUX_PB01A_TWIMS1_TWCK) 141 #define GPIO_PB01A_TWIMS1_TWCK _UL_(1 << 1) 142 #define PIN_PB00A_TWIMS1_TWD _L_(32) /**< \brief TWIMS1 signal: TWD on PB00 mux A */ 143 #define MUX_PB00A_TWIMS1_TWD _L_(0) 144 #define PINMUX_PB00A_TWIMS1_TWD ((PIN_PB00A_TWIMS1_TWD << 16) | MUX_PB00A_TWIMS1_TWD) 145 #define GPIO_PB00A_TWIMS1_TWD _UL_(1 << 0) 146 /* ========== GPIO definition for TWIMS2 peripheral ========== */ 147 #define PIN_PA22E_TWIMS2_TWCK _L_(22) /**< \brief TWIMS2 signal: TWCK on PA22 mux E */ 148 #define MUX_PA22E_TWIMS2_TWCK _L_(4) 149 #define PINMUX_PA22E_TWIMS2_TWCK ((PIN_PA22E_TWIMS2_TWCK << 16) | MUX_PA22E_TWIMS2_TWCK) 150 #define GPIO_PA22E_TWIMS2_TWCK _UL_(1 << 22) 151 #define PIN_PA21E_TWIMS2_TWD _L_(21) /**< \brief TWIMS2 signal: TWD on PA21 mux E */ 152 #define MUX_PA21E_TWIMS2_TWD _L_(4) 153 #define PINMUX_PA21E_TWIMS2_TWD ((PIN_PA21E_TWIMS2_TWD << 16) | MUX_PA21E_TWIMS2_TWD) 154 #define GPIO_PA21E_TWIMS2_TWD _UL_(1 << 21) 155 /* ========== GPIO definition for TWIMS3 peripheral ========== */ 156 #define PIN_PB15C_TWIMS3_TWCK _L_(47) /**< \brief TWIMS3 signal: TWCK on PB15 mux C */ 157 #define MUX_PB15C_TWIMS3_TWCK _L_(2) 158 #define PINMUX_PB15C_TWIMS3_TWCK ((PIN_PB15C_TWIMS3_TWCK << 16) | MUX_PB15C_TWIMS3_TWCK) 159 #define GPIO_PB15C_TWIMS3_TWCK _UL_(1 << 15) 160 #define PIN_PB14C_TWIMS3_TWD _L_(46) /**< \brief TWIMS3 signal: TWD on PB14 mux C */ 161 #define MUX_PB14C_TWIMS3_TWD _L_(2) 162 #define PINMUX_PB14C_TWIMS3_TWD ((PIN_PB14C_TWIMS3_TWD << 16) | MUX_PB14C_TWIMS3_TWD) 163 #define GPIO_PB14C_TWIMS3_TWD _UL_(1 << 14) 164 /* ========== GPIO definition for IISC peripheral ========== */ 165 #define PIN_PB05D_IISC_IMCK _L_(37) /**< \brief IISC signal: IMCK on PB05 mux D */ 166 #define MUX_PB05D_IISC_IMCK _L_(3) 167 #define PINMUX_PB05D_IISC_IMCK ((PIN_PB05D_IISC_IMCK << 16) | MUX_PB05D_IISC_IMCK) 168 #define GPIO_PB05D_IISC_IMCK _UL_(1 << 5) 169 #define PIN_PA31B_IISC_IMCK _L_(31) /**< \brief IISC signal: IMCK on PA31 mux B */ 170 #define MUX_PA31B_IISC_IMCK _L_(1) 171 #define PINMUX_PA31B_IISC_IMCK ((PIN_PA31B_IISC_IMCK << 16) | MUX_PA31B_IISC_IMCK) 172 #define GPIO_PA31B_IISC_IMCK _UL_(1 << 31) 173 #define PIN_PB02D_IISC_ISCK _L_(34) /**< \brief IISC signal: ISCK on PB02 mux D */ 174 #define MUX_PB02D_IISC_ISCK _L_(3) 175 #define PINMUX_PB02D_IISC_ISCK ((PIN_PB02D_IISC_ISCK << 16) | MUX_PB02D_IISC_ISCK) 176 #define GPIO_PB02D_IISC_ISCK _UL_(1 << 2) 177 #define PIN_PA27B_IISC_ISCK _L_(27) /**< \brief IISC signal: ISCK on PA27 mux B */ 178 #define MUX_PA27B_IISC_ISCK _L_(1) 179 #define PINMUX_PA27B_IISC_ISCK ((PIN_PA27B_IISC_ISCK << 16) | MUX_PA27B_IISC_ISCK) 180 #define GPIO_PA27B_IISC_ISCK _UL_(1 << 27) 181 #define PIN_PB03D_IISC_ISDI _L_(35) /**< \brief IISC signal: ISDI on PB03 mux D */ 182 #define MUX_PB03D_IISC_ISDI _L_(3) 183 #define PINMUX_PB03D_IISC_ISDI ((PIN_PB03D_IISC_ISDI << 16) | MUX_PB03D_IISC_ISDI) 184 #define GPIO_PB03D_IISC_ISDI _UL_(1 << 3) 185 #define PIN_PA28B_IISC_ISDI _L_(28) /**< \brief IISC signal: ISDI on PA28 mux B */ 186 #define MUX_PA28B_IISC_ISDI _L_(1) 187 #define PINMUX_PA28B_IISC_ISDI ((PIN_PA28B_IISC_ISDI << 16) | MUX_PA28B_IISC_ISDI) 188 #define GPIO_PA28B_IISC_ISDI _UL_(1 << 28) 189 #define PIN_PB04D_IISC_ISDO _L_(36) /**< \brief IISC signal: ISDO on PB04 mux D */ 190 #define MUX_PB04D_IISC_ISDO _L_(3) 191 #define PINMUX_PB04D_IISC_ISDO ((PIN_PB04D_IISC_ISDO << 16) | MUX_PB04D_IISC_ISDO) 192 #define GPIO_PB04D_IISC_ISDO _UL_(1 << 4) 193 #define PIN_PA30B_IISC_ISDO _L_(30) /**< \brief IISC signal: ISDO on PA30 mux B */ 194 #define MUX_PA30B_IISC_ISDO _L_(1) 195 #define PINMUX_PA30B_IISC_ISDO ((PIN_PA30B_IISC_ISDO << 16) | MUX_PA30B_IISC_ISDO) 196 #define GPIO_PA30B_IISC_ISDO _UL_(1 << 30) 197 #define PIN_PB06D_IISC_IWS _L_(38) /**< \brief IISC signal: IWS on PB06 mux D */ 198 #define MUX_PB06D_IISC_IWS _L_(3) 199 #define PINMUX_PB06D_IISC_IWS ((PIN_PB06D_IISC_IWS << 16) | MUX_PB06D_IISC_IWS) 200 #define GPIO_PB06D_IISC_IWS _UL_(1 << 6) 201 #define PIN_PA29B_IISC_IWS _L_(29) /**< \brief IISC signal: IWS on PA29 mux B */ 202 #define MUX_PA29B_IISC_IWS _L_(1) 203 #define PINMUX_PA29B_IISC_IWS ((PIN_PA29B_IISC_IWS << 16) | MUX_PA29B_IISC_IWS) 204 #define GPIO_PA29B_IISC_IWS _UL_(1 << 29) 205 /* ========== GPIO definition for SPI peripheral ========== */ 206 #define PIN_PA03B_SPI_MISO _L_(3) /**< \brief SPI signal: MISO on PA03 mux B */ 207 #define MUX_PA03B_SPI_MISO _L_(1) 208 #define PINMUX_PA03B_SPI_MISO ((PIN_PA03B_SPI_MISO << 16) | MUX_PA03B_SPI_MISO) 209 #define GPIO_PA03B_SPI_MISO _UL_(1 << 3) 210 #define PIN_PB14B_SPI_MISO _L_(46) /**< \brief SPI signal: MISO on PB14 mux B */ 211 #define MUX_PB14B_SPI_MISO _L_(1) 212 #define PINMUX_PB14B_SPI_MISO ((PIN_PB14B_SPI_MISO << 16) | MUX_PB14B_SPI_MISO) 213 #define GPIO_PB14B_SPI_MISO _UL_(1 << 14) 214 #define PIN_PA21A_SPI_MISO _L_(21) /**< \brief SPI signal: MISO on PA21 mux A */ 215 #define MUX_PA21A_SPI_MISO _L_(0) 216 #define PINMUX_PA21A_SPI_MISO ((PIN_PA21A_SPI_MISO << 16) | MUX_PA21A_SPI_MISO) 217 #define GPIO_PA21A_SPI_MISO _UL_(1 << 21) 218 #define PIN_PA27A_SPI_MISO _L_(27) /**< \brief SPI signal: MISO on PA27 mux A */ 219 #define MUX_PA27A_SPI_MISO _L_(0) 220 #define PINMUX_PA27A_SPI_MISO ((PIN_PA27A_SPI_MISO << 16) | MUX_PA27A_SPI_MISO) 221 #define GPIO_PA27A_SPI_MISO _UL_(1 << 27) 222 #define PIN_PB15B_SPI_MOSI _L_(47) /**< \brief SPI signal: MOSI on PB15 mux B */ 223 #define MUX_PB15B_SPI_MOSI _L_(1) 224 #define PINMUX_PB15B_SPI_MOSI ((PIN_PB15B_SPI_MOSI << 16) | MUX_PB15B_SPI_MOSI) 225 #define GPIO_PB15B_SPI_MOSI _UL_(1 << 15) 226 #define PIN_PA22A_SPI_MOSI _L_(22) /**< \brief SPI signal: MOSI on PA22 mux A */ 227 #define MUX_PA22A_SPI_MOSI _L_(0) 228 #define PINMUX_PA22A_SPI_MOSI ((PIN_PA22A_SPI_MOSI << 16) | MUX_PA22A_SPI_MOSI) 229 #define GPIO_PA22A_SPI_MOSI _UL_(1 << 22) 230 #define PIN_PA28A_SPI_MOSI _L_(28) /**< \brief SPI signal: MOSI on PA28 mux A */ 231 #define MUX_PA28A_SPI_MOSI _L_(0) 232 #define PINMUX_PA28A_SPI_MOSI ((PIN_PA28A_SPI_MOSI << 16) | MUX_PA28A_SPI_MOSI) 233 #define GPIO_PA28A_SPI_MOSI _UL_(1 << 28) 234 #define PIN_PA02B_SPI_NPCS0 _L_(2) /**< \brief SPI signal: NPCS0 on PA02 mux B */ 235 #define MUX_PA02B_SPI_NPCS0 _L_(1) 236 #define PINMUX_PA02B_SPI_NPCS0 ((PIN_PA02B_SPI_NPCS0 << 16) | MUX_PA02B_SPI_NPCS0) 237 #define GPIO_PA02B_SPI_NPCS0 _UL_(1 << 2) 238 #define PIN_PA24A_SPI_NPCS0 _L_(24) /**< \brief SPI signal: NPCS0 on PA24 mux A */ 239 #define MUX_PA24A_SPI_NPCS0 _L_(0) 240 #define PINMUX_PA24A_SPI_NPCS0 ((PIN_PA24A_SPI_NPCS0 << 16) | MUX_PA24A_SPI_NPCS0) 241 #define GPIO_PA24A_SPI_NPCS0 _UL_(1 << 24) 242 #define PIN_PA30A_SPI_NPCS0 _L_(30) /**< \brief SPI signal: NPCS0 on PA30 mux A */ 243 #define MUX_PA30A_SPI_NPCS0 _L_(0) 244 #define PINMUX_PA30A_SPI_NPCS0 ((PIN_PA30A_SPI_NPCS0 << 16) | MUX_PA30A_SPI_NPCS0) 245 #define GPIO_PA30A_SPI_NPCS0 _UL_(1 << 30) 246 #define PIN_PA13C_SPI_NPCS1 _L_(13) /**< \brief SPI signal: NPCS1 on PA13 mux C */ 247 #define MUX_PA13C_SPI_NPCS1 _L_(2) 248 #define PINMUX_PA13C_SPI_NPCS1 ((PIN_PA13C_SPI_NPCS1 << 16) | MUX_PA13C_SPI_NPCS1) 249 #define GPIO_PA13C_SPI_NPCS1 _UL_(1 << 13) 250 #define PIN_PB13B_SPI_NPCS1 _L_(45) /**< \brief SPI signal: NPCS1 on PB13 mux B */ 251 #define MUX_PB13B_SPI_NPCS1 _L_(1) 252 #define PINMUX_PB13B_SPI_NPCS1 ((PIN_PB13B_SPI_NPCS1 << 16) | MUX_PB13B_SPI_NPCS1) 253 #define GPIO_PB13B_SPI_NPCS1 _UL_(1 << 13) 254 #define PIN_PA31A_SPI_NPCS1 _L_(31) /**< \brief SPI signal: NPCS1 on PA31 mux A */ 255 #define MUX_PA31A_SPI_NPCS1 _L_(0) 256 #define PINMUX_PA31A_SPI_NPCS1 ((PIN_PA31A_SPI_NPCS1 << 16) | MUX_PA31A_SPI_NPCS1) 257 #define GPIO_PA31A_SPI_NPCS1 _UL_(1 << 31) 258 #define PIN_PA14C_SPI_NPCS2 _L_(14) /**< \brief SPI signal: NPCS2 on PA14 mux C */ 259 #define MUX_PA14C_SPI_NPCS2 _L_(2) 260 #define PINMUX_PA14C_SPI_NPCS2 ((PIN_PA14C_SPI_NPCS2 << 16) | MUX_PA14C_SPI_NPCS2) 261 #define GPIO_PA14C_SPI_NPCS2 _UL_(1 << 14) 262 #define PIN_PB11B_SPI_NPCS2 _L_(43) /**< \brief SPI signal: NPCS2 on PB11 mux B */ 263 #define MUX_PB11B_SPI_NPCS2 _L_(1) 264 #define PINMUX_PB11B_SPI_NPCS2 ((PIN_PB11B_SPI_NPCS2 << 16) | MUX_PB11B_SPI_NPCS2) 265 #define GPIO_PB11B_SPI_NPCS2 _UL_(1 << 11) 266 #define PIN_PA15C_SPI_NPCS3 _L_(15) /**< \brief SPI signal: NPCS3 on PA15 mux C */ 267 #define MUX_PA15C_SPI_NPCS3 _L_(2) 268 #define PINMUX_PA15C_SPI_NPCS3 ((PIN_PA15C_SPI_NPCS3 << 16) | MUX_PA15C_SPI_NPCS3) 269 #define GPIO_PA15C_SPI_NPCS3 _UL_(1 << 15) 270 #define PIN_PB12B_SPI_NPCS3 _L_(44) /**< \brief SPI signal: NPCS3 on PB12 mux B */ 271 #define MUX_PB12B_SPI_NPCS3 _L_(1) 272 #define PINMUX_PB12B_SPI_NPCS3 ((PIN_PB12B_SPI_NPCS3 << 16) | MUX_PB12B_SPI_NPCS3) 273 #define GPIO_PB12B_SPI_NPCS3 _UL_(1 << 12) 274 #define PIN_PA23A_SPI_SCK _L_(23) /**< \brief SPI signal: SCK on PA23 mux A */ 275 #define MUX_PA23A_SPI_SCK _L_(0) 276 #define PINMUX_PA23A_SPI_SCK ((PIN_PA23A_SPI_SCK << 16) | MUX_PA23A_SPI_SCK) 277 #define GPIO_PA23A_SPI_SCK _UL_(1 << 23) 278 #define PIN_PA29A_SPI_SCK _L_(29) /**< \brief SPI signal: SCK on PA29 mux A */ 279 #define MUX_PA29A_SPI_SCK _L_(0) 280 #define PINMUX_PA29A_SPI_SCK ((PIN_PA29A_SPI_SCK << 16) | MUX_PA29A_SPI_SCK) 281 #define GPIO_PA29A_SPI_SCK _UL_(1 << 29) 282 /* ========== GPIO definition for TC0 peripheral ========== */ 283 #define PIN_PB07D_TC0_A0 _L_(39) /**< \brief TC0 signal: A0 on PB07 mux D */ 284 #define MUX_PB07D_TC0_A0 _L_(3) 285 #define PINMUX_PB07D_TC0_A0 ((PIN_PB07D_TC0_A0 << 16) | MUX_PB07D_TC0_A0) 286 #define GPIO_PB07D_TC0_A0 _UL_(1 << 7) 287 #define PIN_PA08B_TC0_A0 _L_(8) /**< \brief TC0 signal: A0 on PA08 mux B */ 288 #define MUX_PA08B_TC0_A0 _L_(1) 289 #define PINMUX_PA08B_TC0_A0 ((PIN_PA08B_TC0_A0 << 16) | MUX_PA08B_TC0_A0) 290 #define GPIO_PA08B_TC0_A0 _UL_(1 << 8) 291 #define PIN_PB09D_TC0_A1 _L_(41) /**< \brief TC0 signal: A1 on PB09 mux D */ 292 #define MUX_PB09D_TC0_A1 _L_(3) 293 #define PINMUX_PB09D_TC0_A1 ((PIN_PB09D_TC0_A1 << 16) | MUX_PB09D_TC0_A1) 294 #define GPIO_PB09D_TC0_A1 _UL_(1 << 9) 295 #define PIN_PA10B_TC0_A1 _L_(10) /**< \brief TC0 signal: A1 on PA10 mux B */ 296 #define MUX_PA10B_TC0_A1 _L_(1) 297 #define PINMUX_PA10B_TC0_A1 ((PIN_PA10B_TC0_A1 << 16) | MUX_PA10B_TC0_A1) 298 #define GPIO_PA10B_TC0_A1 _UL_(1 << 10) 299 #define PIN_PB11D_TC0_A2 _L_(43) /**< \brief TC0 signal: A2 on PB11 mux D */ 300 #define MUX_PB11D_TC0_A2 _L_(3) 301 #define PINMUX_PB11D_TC0_A2 ((PIN_PB11D_TC0_A2 << 16) | MUX_PB11D_TC0_A2) 302 #define GPIO_PB11D_TC0_A2 _UL_(1 << 11) 303 #define PIN_PA12B_TC0_A2 _L_(12) /**< \brief TC0 signal: A2 on PA12 mux B */ 304 #define MUX_PA12B_TC0_A2 _L_(1) 305 #define PINMUX_PA12B_TC0_A2 ((PIN_PA12B_TC0_A2 << 16) | MUX_PA12B_TC0_A2) 306 #define GPIO_PA12B_TC0_A2 _UL_(1 << 12) 307 #define PIN_PB08D_TC0_B0 _L_(40) /**< \brief TC0 signal: B0 on PB08 mux D */ 308 #define MUX_PB08D_TC0_B0 _L_(3) 309 #define PINMUX_PB08D_TC0_B0 ((PIN_PB08D_TC0_B0 << 16) | MUX_PB08D_TC0_B0) 310 #define GPIO_PB08D_TC0_B0 _UL_(1 << 8) 311 #define PIN_PA09B_TC0_B0 _L_(9) /**< \brief TC0 signal: B0 on PA09 mux B */ 312 #define MUX_PA09B_TC0_B0 _L_(1) 313 #define PINMUX_PA09B_TC0_B0 ((PIN_PA09B_TC0_B0 << 16) | MUX_PA09B_TC0_B0) 314 #define GPIO_PA09B_TC0_B0 _UL_(1 << 9) 315 #define PIN_PB10D_TC0_B1 _L_(42) /**< \brief TC0 signal: B1 on PB10 mux D */ 316 #define MUX_PB10D_TC0_B1 _L_(3) 317 #define PINMUX_PB10D_TC0_B1 ((PIN_PB10D_TC0_B1 << 16) | MUX_PB10D_TC0_B1) 318 #define GPIO_PB10D_TC0_B1 _UL_(1 << 10) 319 #define PIN_PA11B_TC0_B1 _L_(11) /**< \brief TC0 signal: B1 on PA11 mux B */ 320 #define MUX_PA11B_TC0_B1 _L_(1) 321 #define PINMUX_PA11B_TC0_B1 ((PIN_PA11B_TC0_B1 << 16) | MUX_PA11B_TC0_B1) 322 #define GPIO_PA11B_TC0_B1 _UL_(1 << 11) 323 #define PIN_PB12D_TC0_B2 _L_(44) /**< \brief TC0 signal: B2 on PB12 mux D */ 324 #define MUX_PB12D_TC0_B2 _L_(3) 325 #define PINMUX_PB12D_TC0_B2 ((PIN_PB12D_TC0_B2 << 16) | MUX_PB12D_TC0_B2) 326 #define GPIO_PB12D_TC0_B2 _UL_(1 << 12) 327 #define PIN_PA13B_TC0_B2 _L_(13) /**< \brief TC0 signal: B2 on PA13 mux B */ 328 #define MUX_PA13B_TC0_B2 _L_(1) 329 #define PINMUX_PA13B_TC0_B2 ((PIN_PA13B_TC0_B2 << 16) | MUX_PA13B_TC0_B2) 330 #define GPIO_PA13B_TC0_B2 _UL_(1 << 13) 331 #define PIN_PB13D_TC0_CLK0 _L_(45) /**< \brief TC0 signal: CLK0 on PB13 mux D */ 332 #define MUX_PB13D_TC0_CLK0 _L_(3) 333 #define PINMUX_PB13D_TC0_CLK0 ((PIN_PB13D_TC0_CLK0 << 16) | MUX_PB13D_TC0_CLK0) 334 #define GPIO_PB13D_TC0_CLK0 _UL_(1 << 13) 335 #define PIN_PA14B_TC0_CLK0 _L_(14) /**< \brief TC0 signal: CLK0 on PA14 mux B */ 336 #define MUX_PA14B_TC0_CLK0 _L_(1) 337 #define PINMUX_PA14B_TC0_CLK0 ((PIN_PA14B_TC0_CLK0 << 16) | MUX_PA14B_TC0_CLK0) 338 #define GPIO_PA14B_TC0_CLK0 _UL_(1 << 14) 339 #define PIN_PB14D_TC0_CLK1 _L_(46) /**< \brief TC0 signal: CLK1 on PB14 mux D */ 340 #define MUX_PB14D_TC0_CLK1 _L_(3) 341 #define PINMUX_PB14D_TC0_CLK1 ((PIN_PB14D_TC0_CLK1 << 16) | MUX_PB14D_TC0_CLK1) 342 #define GPIO_PB14D_TC0_CLK1 _UL_(1 << 14) 343 #define PIN_PA15B_TC0_CLK1 _L_(15) /**< \brief TC0 signal: CLK1 on PA15 mux B */ 344 #define MUX_PA15B_TC0_CLK1 _L_(1) 345 #define PINMUX_PA15B_TC0_CLK1 ((PIN_PA15B_TC0_CLK1 << 16) | MUX_PA15B_TC0_CLK1) 346 #define GPIO_PA15B_TC0_CLK1 _UL_(1 << 15) 347 #define PIN_PB15D_TC0_CLK2 _L_(47) /**< \brief TC0 signal: CLK2 on PB15 mux D */ 348 #define MUX_PB15D_TC0_CLK2 _L_(3) 349 #define PINMUX_PB15D_TC0_CLK2 ((PIN_PB15D_TC0_CLK2 << 16) | MUX_PB15D_TC0_CLK2) 350 #define GPIO_PB15D_TC0_CLK2 _UL_(1 << 15) 351 #define PIN_PA16B_TC0_CLK2 _L_(16) /**< \brief TC0 signal: CLK2 on PA16 mux B */ 352 #define MUX_PA16B_TC0_CLK2 _L_(1) 353 #define PINMUX_PA16B_TC0_CLK2 ((PIN_PA16B_TC0_CLK2 << 16) | MUX_PA16B_TC0_CLK2) 354 #define GPIO_PA16B_TC0_CLK2 _UL_(1 << 16) 355 /* ========== GPIO definition for USART0 peripheral ========== */ 356 #define PIN_PA04B_USART0_CLK _L_(4) /**< \brief USART0 signal: CLK on PA04 mux B */ 357 #define MUX_PA04B_USART0_CLK _L_(1) 358 #define PINMUX_PA04B_USART0_CLK ((PIN_PA04B_USART0_CLK << 16) | MUX_PA04B_USART0_CLK) 359 #define GPIO_PA04B_USART0_CLK _UL_(1 << 4) 360 #define PIN_PA10A_USART0_CLK _L_(10) /**< \brief USART0 signal: CLK on PA10 mux A */ 361 #define MUX_PA10A_USART0_CLK _L_(0) 362 #define PINMUX_PA10A_USART0_CLK ((PIN_PA10A_USART0_CLK << 16) | MUX_PA10A_USART0_CLK) 363 #define GPIO_PA10A_USART0_CLK _UL_(1 << 10) 364 #define PIN_PB13A_USART0_CLK _L_(45) /**< \brief USART0 signal: CLK on PB13 mux A */ 365 #define MUX_PB13A_USART0_CLK _L_(0) 366 #define PINMUX_PB13A_USART0_CLK ((PIN_PB13A_USART0_CLK << 16) | MUX_PB13A_USART0_CLK) 367 #define GPIO_PB13A_USART0_CLK _UL_(1 << 13) 368 #define PIN_PA09A_USART0_CTS _L_(9) /**< \brief USART0 signal: CTS on PA09 mux A */ 369 #define MUX_PA09A_USART0_CTS _L_(0) 370 #define PINMUX_PA09A_USART0_CTS ((PIN_PA09A_USART0_CTS << 16) | MUX_PA09A_USART0_CTS) 371 #define GPIO_PA09A_USART0_CTS _UL_(1 << 9) 372 #define PIN_PB11A_USART0_CTS _L_(43) /**< \brief USART0 signal: CTS on PB11 mux A */ 373 #define MUX_PB11A_USART0_CTS _L_(0) 374 #define PINMUX_PB11A_USART0_CTS ((PIN_PB11A_USART0_CTS << 16) | MUX_PB11A_USART0_CTS) 375 #define GPIO_PB11A_USART0_CTS _UL_(1 << 11) 376 #define PIN_PA06B_USART0_RTS _L_(6) /**< \brief USART0 signal: RTS on PA06 mux B */ 377 #define MUX_PA06B_USART0_RTS _L_(1) 378 #define PINMUX_PA06B_USART0_RTS ((PIN_PA06B_USART0_RTS << 16) | MUX_PA06B_USART0_RTS) 379 #define GPIO_PA06B_USART0_RTS _UL_(1 << 6) 380 #define PIN_PA08A_USART0_RTS _L_(8) /**< \brief USART0 signal: RTS on PA08 mux A */ 381 #define MUX_PA08A_USART0_RTS _L_(0) 382 #define PINMUX_PA08A_USART0_RTS ((PIN_PA08A_USART0_RTS << 16) | MUX_PA08A_USART0_RTS) 383 #define GPIO_PA08A_USART0_RTS _UL_(1 << 8) 384 #define PIN_PB12A_USART0_RTS _L_(44) /**< \brief USART0 signal: RTS on PB12 mux A */ 385 #define MUX_PB12A_USART0_RTS _L_(0) 386 #define PINMUX_PB12A_USART0_RTS ((PIN_PB12A_USART0_RTS << 16) | MUX_PB12A_USART0_RTS) 387 #define GPIO_PB12A_USART0_RTS _UL_(1 << 12) 388 #define PIN_PA05B_USART0_RXD _L_(5) /**< \brief USART0 signal: RXD on PA05 mux B */ 389 #define MUX_PA05B_USART0_RXD _L_(1) 390 #define PINMUX_PA05B_USART0_RXD ((PIN_PA05B_USART0_RXD << 16) | MUX_PA05B_USART0_RXD) 391 #define GPIO_PA05B_USART0_RXD _UL_(1 << 5) 392 #define PIN_PB00B_USART0_RXD _L_(32) /**< \brief USART0 signal: RXD on PB00 mux B */ 393 #define MUX_PB00B_USART0_RXD _L_(1) 394 #define PINMUX_PB00B_USART0_RXD ((PIN_PB00B_USART0_RXD << 16) | MUX_PB00B_USART0_RXD) 395 #define GPIO_PB00B_USART0_RXD _UL_(1 << 0) 396 #define PIN_PA11A_USART0_RXD _L_(11) /**< \brief USART0 signal: RXD on PA11 mux A */ 397 #define MUX_PA11A_USART0_RXD _L_(0) 398 #define PINMUX_PA11A_USART0_RXD ((PIN_PA11A_USART0_RXD << 16) | MUX_PA11A_USART0_RXD) 399 #define GPIO_PA11A_USART0_RXD _UL_(1 << 11) 400 #define PIN_PB14A_USART0_RXD _L_(46) /**< \brief USART0 signal: RXD on PB14 mux A */ 401 #define MUX_PB14A_USART0_RXD _L_(0) 402 #define PINMUX_PB14A_USART0_RXD ((PIN_PB14A_USART0_RXD << 16) | MUX_PB14A_USART0_RXD) 403 #define GPIO_PB14A_USART0_RXD _UL_(1 << 14) 404 #define PIN_PA07B_USART0_TXD _L_(7) /**< \brief USART0 signal: TXD on PA07 mux B */ 405 #define MUX_PA07B_USART0_TXD _L_(1) 406 #define PINMUX_PA07B_USART0_TXD ((PIN_PA07B_USART0_TXD << 16) | MUX_PA07B_USART0_TXD) 407 #define GPIO_PA07B_USART0_TXD _UL_(1 << 7) 408 #define PIN_PB01B_USART0_TXD _L_(33) /**< \brief USART0 signal: TXD on PB01 mux B */ 409 #define MUX_PB01B_USART0_TXD _L_(1) 410 #define PINMUX_PB01B_USART0_TXD ((PIN_PB01B_USART0_TXD << 16) | MUX_PB01B_USART0_TXD) 411 #define GPIO_PB01B_USART0_TXD _UL_(1 << 1) 412 #define PIN_PA12A_USART0_TXD _L_(12) /**< \brief USART0 signal: TXD on PA12 mux A */ 413 #define MUX_PA12A_USART0_TXD _L_(0) 414 #define PINMUX_PA12A_USART0_TXD ((PIN_PA12A_USART0_TXD << 16) | MUX_PA12A_USART0_TXD) 415 #define GPIO_PA12A_USART0_TXD _UL_(1 << 12) 416 #define PIN_PB15A_USART0_TXD _L_(47) /**< \brief USART0 signal: TXD on PB15 mux A */ 417 #define MUX_PB15A_USART0_TXD _L_(0) 418 #define PINMUX_PB15A_USART0_TXD ((PIN_PB15A_USART0_TXD << 16) | MUX_PB15A_USART0_TXD) 419 #define GPIO_PB15A_USART0_TXD _UL_(1 << 15) 420 /* ========== GPIO definition for USART1 peripheral ========== */ 421 #define PIN_PB03B_USART1_CLK _L_(35) /**< \brief USART1 signal: CLK on PB03 mux B */ 422 #define MUX_PB03B_USART1_CLK _L_(1) 423 #define PINMUX_PB03B_USART1_CLK ((PIN_PB03B_USART1_CLK << 16) | MUX_PB03B_USART1_CLK) 424 #define GPIO_PB03B_USART1_CLK _UL_(1 << 3) 425 #define PIN_PA14A_USART1_CLK _L_(14) /**< \brief USART1 signal: CLK on PA14 mux A */ 426 #define MUX_PA14A_USART1_CLK _L_(0) 427 #define PINMUX_PA14A_USART1_CLK ((PIN_PA14A_USART1_CLK << 16) | MUX_PA14A_USART1_CLK) 428 #define GPIO_PA14A_USART1_CLK _UL_(1 << 14) 429 #define PIN_PA21B_USART1_CTS _L_(21) /**< \brief USART1 signal: CTS on PA21 mux B */ 430 #define MUX_PA21B_USART1_CTS _L_(1) 431 #define PINMUX_PA21B_USART1_CTS ((PIN_PA21B_USART1_CTS << 16) | MUX_PA21B_USART1_CTS) 432 #define GPIO_PA21B_USART1_CTS _UL_(1 << 21) 433 #define PIN_PB02B_USART1_RTS _L_(34) /**< \brief USART1 signal: RTS on PB02 mux B */ 434 #define MUX_PB02B_USART1_RTS _L_(1) 435 #define PINMUX_PB02B_USART1_RTS ((PIN_PB02B_USART1_RTS << 16) | MUX_PB02B_USART1_RTS) 436 #define GPIO_PB02B_USART1_RTS _UL_(1 << 2) 437 #define PIN_PA13A_USART1_RTS _L_(13) /**< \brief USART1 signal: RTS on PA13 mux A */ 438 #define MUX_PA13A_USART1_RTS _L_(0) 439 #define PINMUX_PA13A_USART1_RTS ((PIN_PA13A_USART1_RTS << 16) | MUX_PA13A_USART1_RTS) 440 #define GPIO_PA13A_USART1_RTS _UL_(1 << 13) 441 #define PIN_PB04B_USART1_RXD _L_(36) /**< \brief USART1 signal: RXD on PB04 mux B */ 442 #define MUX_PB04B_USART1_RXD _L_(1) 443 #define PINMUX_PB04B_USART1_RXD ((PIN_PB04B_USART1_RXD << 16) | MUX_PB04B_USART1_RXD) 444 #define GPIO_PB04B_USART1_RXD _UL_(1 << 4) 445 #define PIN_PA15A_USART1_RXD _L_(15) /**< \brief USART1 signal: RXD on PA15 mux A */ 446 #define MUX_PA15A_USART1_RXD _L_(0) 447 #define PINMUX_PA15A_USART1_RXD ((PIN_PA15A_USART1_RXD << 16) | MUX_PA15A_USART1_RXD) 448 #define GPIO_PA15A_USART1_RXD _UL_(1 << 15) 449 #define PIN_PB05B_USART1_TXD _L_(37) /**< \brief USART1 signal: TXD on PB05 mux B */ 450 #define MUX_PB05B_USART1_TXD _L_(1) 451 #define PINMUX_PB05B_USART1_TXD ((PIN_PB05B_USART1_TXD << 16) | MUX_PB05B_USART1_TXD) 452 #define GPIO_PB05B_USART1_TXD _UL_(1 << 5) 453 #define PIN_PA16A_USART1_TXD _L_(16) /**< \brief USART1 signal: TXD on PA16 mux A */ 454 #define MUX_PA16A_USART1_TXD _L_(0) 455 #define PINMUX_PA16A_USART1_TXD ((PIN_PA16A_USART1_TXD << 16) | MUX_PA16A_USART1_TXD) 456 #define GPIO_PA16A_USART1_TXD _UL_(1 << 16) 457 /* ========== GPIO definition for USART2 peripheral ========== */ 458 #define PIN_PA18A_USART2_CLK _L_(18) /**< \brief USART2 signal: CLK on PA18 mux A */ 459 #define MUX_PA18A_USART2_CLK _L_(0) 460 #define PINMUX_PA18A_USART2_CLK ((PIN_PA18A_USART2_CLK << 16) | MUX_PA18A_USART2_CLK) 461 #define GPIO_PA18A_USART2_CLK _UL_(1 << 18) 462 #define PIN_PA22B_USART2_CTS _L_(22) /**< \brief USART2 signal: CTS on PA22 mux B */ 463 #define MUX_PA22B_USART2_CTS _L_(1) 464 #define PINMUX_PA22B_USART2_CTS ((PIN_PA22B_USART2_CTS << 16) | MUX_PA22B_USART2_CTS) 465 #define GPIO_PA22B_USART2_CTS _UL_(1 << 22) 466 #define PIN_PA17A_USART2_RTS _L_(17) /**< \brief USART2 signal: RTS on PA17 mux A */ 467 #define MUX_PA17A_USART2_RTS _L_(0) 468 #define PINMUX_PA17A_USART2_RTS ((PIN_PA17A_USART2_RTS << 16) | MUX_PA17A_USART2_RTS) 469 #define GPIO_PA17A_USART2_RTS _UL_(1 << 17) 470 #define PIN_PA25B_USART2_RXD _L_(25) /**< \brief USART2 signal: RXD on PA25 mux B */ 471 #define MUX_PA25B_USART2_RXD _L_(1) 472 #define PINMUX_PA25B_USART2_RXD ((PIN_PA25B_USART2_RXD << 16) | MUX_PA25B_USART2_RXD) 473 #define GPIO_PA25B_USART2_RXD _UL_(1 << 25) 474 #define PIN_PA19A_USART2_RXD _L_(19) /**< \brief USART2 signal: RXD on PA19 mux A */ 475 #define MUX_PA19A_USART2_RXD _L_(0) 476 #define PINMUX_PA19A_USART2_RXD ((PIN_PA19A_USART2_RXD << 16) | MUX_PA19A_USART2_RXD) 477 #define GPIO_PA19A_USART2_RXD _UL_(1 << 19) 478 #define PIN_PA26B_USART2_TXD _L_(26) /**< \brief USART2 signal: TXD on PA26 mux B */ 479 #define MUX_PA26B_USART2_TXD _L_(1) 480 #define PINMUX_PA26B_USART2_TXD ((PIN_PA26B_USART2_TXD << 16) | MUX_PA26B_USART2_TXD) 481 #define GPIO_PA26B_USART2_TXD _UL_(1 << 26) 482 #define PIN_PA20A_USART2_TXD _L_(20) /**< \brief USART2 signal: TXD on PA20 mux A */ 483 #define MUX_PA20A_USART2_TXD _L_(0) 484 #define PINMUX_PA20A_USART2_TXD ((PIN_PA20A_USART2_TXD << 16) | MUX_PA20A_USART2_TXD) 485 #define GPIO_PA20A_USART2_TXD _UL_(1 << 20) 486 /* ========== GPIO definition for USART3 peripheral ========== */ 487 #define PIN_PA29E_USART3_CLK _L_(29) /**< \brief USART3 signal: CLK on PA29 mux E */ 488 #define MUX_PA29E_USART3_CLK _L_(4) 489 #define PINMUX_PA29E_USART3_CLK ((PIN_PA29E_USART3_CLK << 16) | MUX_PA29E_USART3_CLK) 490 #define GPIO_PA29E_USART3_CLK _UL_(1 << 29) 491 #define PIN_PB08A_USART3_CLK _L_(40) /**< \brief USART3 signal: CLK on PB08 mux A */ 492 #define MUX_PB08A_USART3_CLK _L_(0) 493 #define PINMUX_PB08A_USART3_CLK ((PIN_PB08A_USART3_CLK << 16) | MUX_PB08A_USART3_CLK) 494 #define GPIO_PB08A_USART3_CLK _UL_(1 << 8) 495 #define PIN_PA28E_USART3_CTS _L_(28) /**< \brief USART3 signal: CTS on PA28 mux E */ 496 #define MUX_PA28E_USART3_CTS _L_(4) 497 #define PINMUX_PA28E_USART3_CTS ((PIN_PA28E_USART3_CTS << 16) | MUX_PA28E_USART3_CTS) 498 #define GPIO_PA28E_USART3_CTS _UL_(1 << 28) 499 #define PIN_PB07A_USART3_CTS _L_(39) /**< \brief USART3 signal: CTS on PB07 mux A */ 500 #define MUX_PB07A_USART3_CTS _L_(0) 501 #define PINMUX_PB07A_USART3_CTS ((PIN_PB07A_USART3_CTS << 16) | MUX_PB07A_USART3_CTS) 502 #define GPIO_PB07A_USART3_CTS _UL_(1 << 7) 503 #define PIN_PA27E_USART3_RTS _L_(27) /**< \brief USART3 signal: RTS on PA27 mux E */ 504 #define MUX_PA27E_USART3_RTS _L_(4) 505 #define PINMUX_PA27E_USART3_RTS ((PIN_PA27E_USART3_RTS << 16) | MUX_PA27E_USART3_RTS) 506 #define GPIO_PA27E_USART3_RTS _UL_(1 << 27) 507 #define PIN_PB06A_USART3_RTS _L_(38) /**< \brief USART3 signal: RTS on PB06 mux A */ 508 #define MUX_PB06A_USART3_RTS _L_(0) 509 #define PINMUX_PB06A_USART3_RTS ((PIN_PB06A_USART3_RTS << 16) | MUX_PB06A_USART3_RTS) 510 #define GPIO_PB06A_USART3_RTS _UL_(1 << 6) 511 #define PIN_PA30E_USART3_RXD _L_(30) /**< \brief USART3 signal: RXD on PA30 mux E */ 512 #define MUX_PA30E_USART3_RXD _L_(4) 513 #define PINMUX_PA30E_USART3_RXD ((PIN_PA30E_USART3_RXD << 16) | MUX_PA30E_USART3_RXD) 514 #define GPIO_PA30E_USART3_RXD _UL_(1 << 30) 515 #define PIN_PB09A_USART3_RXD _L_(41) /**< \brief USART3 signal: RXD on PB09 mux A */ 516 #define MUX_PB09A_USART3_RXD _L_(0) 517 #define PINMUX_PB09A_USART3_RXD ((PIN_PB09A_USART3_RXD << 16) | MUX_PB09A_USART3_RXD) 518 #define GPIO_PB09A_USART3_RXD _UL_(1 << 9) 519 #define PIN_PA31E_USART3_TXD _L_(31) /**< \brief USART3 signal: TXD on PA31 mux E */ 520 #define MUX_PA31E_USART3_TXD _L_(4) 521 #define PINMUX_PA31E_USART3_TXD ((PIN_PA31E_USART3_TXD << 16) | MUX_PA31E_USART3_TXD) 522 #define GPIO_PA31E_USART3_TXD _UL_(1 << 31) 523 #define PIN_PB10A_USART3_TXD _L_(42) /**< \brief USART3 signal: TXD on PB10 mux A */ 524 #define MUX_PB10A_USART3_TXD _L_(0) 525 #define PINMUX_PB10A_USART3_TXD ((PIN_PB10A_USART3_TXD << 16) | MUX_PB10A_USART3_TXD) 526 #define GPIO_PB10A_USART3_TXD _UL_(1 << 10) 527 /* ========== GPIO definition for ADCIFE peripheral ========== */ 528 #define PIN_PA04A_ADCIFE_AD0 _L_(4) /**< \brief ADCIFE signal: AD0 on PA04 mux A */ 529 #define MUX_PA04A_ADCIFE_AD0 _L_(0) 530 #define PINMUX_PA04A_ADCIFE_AD0 ((PIN_PA04A_ADCIFE_AD0 << 16) | MUX_PA04A_ADCIFE_AD0) 531 #define GPIO_PA04A_ADCIFE_AD0 _UL_(1 << 4) 532 #define PIN_PA05A_ADCIFE_AD1 _L_(5) /**< \brief ADCIFE signal: AD1 on PA05 mux A */ 533 #define MUX_PA05A_ADCIFE_AD1 _L_(0) 534 #define PINMUX_PA05A_ADCIFE_AD1 ((PIN_PA05A_ADCIFE_AD1 << 16) | MUX_PA05A_ADCIFE_AD1) 535 #define GPIO_PA05A_ADCIFE_AD1 _UL_(1 << 5) 536 #define PIN_PA07A_ADCIFE_AD2 _L_(7) /**< \brief ADCIFE signal: AD2 on PA07 mux A */ 537 #define MUX_PA07A_ADCIFE_AD2 _L_(0) 538 #define PINMUX_PA07A_ADCIFE_AD2 ((PIN_PA07A_ADCIFE_AD2 << 16) | MUX_PA07A_ADCIFE_AD2) 539 #define GPIO_PA07A_ADCIFE_AD2 _UL_(1 << 7) 540 #define PIN_PB02A_ADCIFE_AD3 _L_(34) /**< \brief ADCIFE signal: AD3 on PB02 mux A */ 541 #define MUX_PB02A_ADCIFE_AD3 _L_(0) 542 #define PINMUX_PB02A_ADCIFE_AD3 ((PIN_PB02A_ADCIFE_AD3 << 16) | MUX_PB02A_ADCIFE_AD3) 543 #define GPIO_PB02A_ADCIFE_AD3 _UL_(1 << 2) 544 #define PIN_PB03A_ADCIFE_AD4 _L_(35) /**< \brief ADCIFE signal: AD4 on PB03 mux A */ 545 #define MUX_PB03A_ADCIFE_AD4 _L_(0) 546 #define PINMUX_PB03A_ADCIFE_AD4 ((PIN_PB03A_ADCIFE_AD4 << 16) | MUX_PB03A_ADCIFE_AD4) 547 #define GPIO_PB03A_ADCIFE_AD4 _UL_(1 << 3) 548 #define PIN_PB04A_ADCIFE_AD5 _L_(36) /**< \brief ADCIFE signal: AD5 on PB04 mux A */ 549 #define MUX_PB04A_ADCIFE_AD5 _L_(0) 550 #define PINMUX_PB04A_ADCIFE_AD5 ((PIN_PB04A_ADCIFE_AD5 << 16) | MUX_PB04A_ADCIFE_AD5) 551 #define GPIO_PB04A_ADCIFE_AD5 _UL_(1 << 4) 552 #define PIN_PB05A_ADCIFE_AD6 _L_(37) /**< \brief ADCIFE signal: AD6 on PB05 mux A */ 553 #define MUX_PB05A_ADCIFE_AD6 _L_(0) 554 #define PINMUX_PB05A_ADCIFE_AD6 ((PIN_PB05A_ADCIFE_AD6 << 16) | MUX_PB05A_ADCIFE_AD6) 555 #define GPIO_PB05A_ADCIFE_AD6 _UL_(1 << 5) 556 #define PIN_PA05E_ADCIFE_TRIGGER _L_(5) /**< \brief ADCIFE signal: TRIGGER on PA05 mux E */ 557 #define MUX_PA05E_ADCIFE_TRIGGER _L_(4) 558 #define PINMUX_PA05E_ADCIFE_TRIGGER ((PIN_PA05E_ADCIFE_TRIGGER << 16) | MUX_PA05E_ADCIFE_TRIGGER) 559 #define GPIO_PA05E_ADCIFE_TRIGGER _UL_(1 << 5) 560 /* ========== GPIO definition for DACC peripheral ========== */ 561 #define PIN_PB04E_DACC_EXT_TRIG0 _L_(36) /**< \brief DACC signal: EXT_TRIG0 on PB04 mux E */ 562 #define MUX_PB04E_DACC_EXT_TRIG0 _L_(4) 563 #define PINMUX_PB04E_DACC_EXT_TRIG0 ((PIN_PB04E_DACC_EXT_TRIG0 << 16) | MUX_PB04E_DACC_EXT_TRIG0) 564 #define GPIO_PB04E_DACC_EXT_TRIG0 _UL_(1 << 4) 565 #define PIN_PA06A_DACC_VOUT _L_(6) /**< \brief DACC signal: VOUT on PA06 mux A */ 566 #define MUX_PA06A_DACC_VOUT _L_(0) 567 #define PINMUX_PA06A_DACC_VOUT ((PIN_PA06A_DACC_VOUT << 16) | MUX_PA06A_DACC_VOUT) 568 #define GPIO_PA06A_DACC_VOUT _UL_(1 << 6) 569 /* ========== GPIO definition for ACIFC peripheral ========== */ 570 #define PIN_PA06E_ACIFC_ACAN0 _L_(6) /**< \brief ACIFC signal: ACAN0 on PA06 mux E */ 571 #define MUX_PA06E_ACIFC_ACAN0 _L_(4) 572 #define PINMUX_PA06E_ACIFC_ACAN0 ((PIN_PA06E_ACIFC_ACAN0 << 16) | MUX_PA06E_ACIFC_ACAN0) 573 #define GPIO_PA06E_ACIFC_ACAN0 _UL_(1 << 6) 574 #define PIN_PA07E_ACIFC_ACAP0 _L_(7) /**< \brief ACIFC signal: ACAP0 on PA07 mux E */ 575 #define MUX_PA07E_ACIFC_ACAP0 _L_(4) 576 #define PINMUX_PA07E_ACIFC_ACAP0 ((PIN_PA07E_ACIFC_ACAP0 << 16) | MUX_PA07E_ACIFC_ACAP0) 577 #define GPIO_PA07E_ACIFC_ACAP0 _UL_(1 << 7) 578 #define PIN_PB02E_ACIFC_ACBN0 _L_(34) /**< \brief ACIFC signal: ACBN0 on PB02 mux E */ 579 #define MUX_PB02E_ACIFC_ACBN0 _L_(4) 580 #define PINMUX_PB02E_ACIFC_ACBN0 ((PIN_PB02E_ACIFC_ACBN0 << 16) | MUX_PB02E_ACIFC_ACBN0) 581 #define GPIO_PB02E_ACIFC_ACBN0 _UL_(1 << 2) 582 #define PIN_PB03E_ACIFC_ACBP0 _L_(35) /**< \brief ACIFC signal: ACBP0 on PB03 mux E */ 583 #define MUX_PB03E_ACIFC_ACBP0 _L_(4) 584 #define PINMUX_PB03E_ACIFC_ACBP0 ((PIN_PB03E_ACIFC_ACBP0 << 16) | MUX_PB03E_ACIFC_ACBP0) 585 #define GPIO_PB03E_ACIFC_ACBP0 _UL_(1 << 3) 586 /* ========== GPIO definition for GLOC peripheral ========== */ 587 #define PIN_PA06D_GLOC_IN0 _L_(6) /**< \brief GLOC signal: IN0 on PA06 mux D */ 588 #define MUX_PA06D_GLOC_IN0 _L_(3) 589 #define PINMUX_PA06D_GLOC_IN0 ((PIN_PA06D_GLOC_IN0 << 16) | MUX_PA06D_GLOC_IN0) 590 #define GPIO_PA06D_GLOC_IN0 _UL_(1 << 6) 591 #define PIN_PA20D_GLOC_IN0 _L_(20) /**< \brief GLOC signal: IN0 on PA20 mux D */ 592 #define MUX_PA20D_GLOC_IN0 _L_(3) 593 #define PINMUX_PA20D_GLOC_IN0 ((PIN_PA20D_GLOC_IN0 << 16) | MUX_PA20D_GLOC_IN0) 594 #define GPIO_PA20D_GLOC_IN0 _UL_(1 << 20) 595 #define PIN_PA04D_GLOC_IN1 _L_(4) /**< \brief GLOC signal: IN1 on PA04 mux D */ 596 #define MUX_PA04D_GLOC_IN1 _L_(3) 597 #define PINMUX_PA04D_GLOC_IN1 ((PIN_PA04D_GLOC_IN1 << 16) | MUX_PA04D_GLOC_IN1) 598 #define GPIO_PA04D_GLOC_IN1 _UL_(1 << 4) 599 #define PIN_PA21D_GLOC_IN1 _L_(21) /**< \brief GLOC signal: IN1 on PA21 mux D */ 600 #define MUX_PA21D_GLOC_IN1 _L_(3) 601 #define PINMUX_PA21D_GLOC_IN1 ((PIN_PA21D_GLOC_IN1 << 16) | MUX_PA21D_GLOC_IN1) 602 #define GPIO_PA21D_GLOC_IN1 _UL_(1 << 21) 603 #define PIN_PA05D_GLOC_IN2 _L_(5) /**< \brief GLOC signal: IN2 on PA05 mux D */ 604 #define MUX_PA05D_GLOC_IN2 _L_(3) 605 #define PINMUX_PA05D_GLOC_IN2 ((PIN_PA05D_GLOC_IN2 << 16) | MUX_PA05D_GLOC_IN2) 606 #define GPIO_PA05D_GLOC_IN2 _UL_(1 << 5) 607 #define PIN_PA22D_GLOC_IN2 _L_(22) /**< \brief GLOC signal: IN2 on PA22 mux D */ 608 #define MUX_PA22D_GLOC_IN2 _L_(3) 609 #define PINMUX_PA22D_GLOC_IN2 ((PIN_PA22D_GLOC_IN2 << 16) | MUX_PA22D_GLOC_IN2) 610 #define GPIO_PA22D_GLOC_IN2 _UL_(1 << 22) 611 #define PIN_PA07D_GLOC_IN3 _L_(7) /**< \brief GLOC signal: IN3 on PA07 mux D */ 612 #define MUX_PA07D_GLOC_IN3 _L_(3) 613 #define PINMUX_PA07D_GLOC_IN3 ((PIN_PA07D_GLOC_IN3 << 16) | MUX_PA07D_GLOC_IN3) 614 #define GPIO_PA07D_GLOC_IN3 _UL_(1 << 7) 615 #define PIN_PA23D_GLOC_IN3 _L_(23) /**< \brief GLOC signal: IN3 on PA23 mux D */ 616 #define MUX_PA23D_GLOC_IN3 _L_(3) 617 #define PINMUX_PA23D_GLOC_IN3 ((PIN_PA23D_GLOC_IN3 << 16) | MUX_PA23D_GLOC_IN3) 618 #define GPIO_PA23D_GLOC_IN3 _UL_(1 << 23) 619 #define PIN_PA27D_GLOC_IN4 _L_(27) /**< \brief GLOC signal: IN4 on PA27 mux D */ 620 #define MUX_PA27D_GLOC_IN4 _L_(3) 621 #define PINMUX_PA27D_GLOC_IN4 ((PIN_PA27D_GLOC_IN4 << 16) | MUX_PA27D_GLOC_IN4) 622 #define GPIO_PA27D_GLOC_IN4 _UL_(1 << 27) 623 #define PIN_PB06C_GLOC_IN4 _L_(38) /**< \brief GLOC signal: IN4 on PB06 mux C */ 624 #define MUX_PB06C_GLOC_IN4 _L_(2) 625 #define PINMUX_PB06C_GLOC_IN4 ((PIN_PB06C_GLOC_IN4 << 16) | MUX_PB06C_GLOC_IN4) 626 #define GPIO_PB06C_GLOC_IN4 _UL_(1 << 6) 627 #define PIN_PA28D_GLOC_IN5 _L_(28) /**< \brief GLOC signal: IN5 on PA28 mux D */ 628 #define MUX_PA28D_GLOC_IN5 _L_(3) 629 #define PINMUX_PA28D_GLOC_IN5 ((PIN_PA28D_GLOC_IN5 << 16) | MUX_PA28D_GLOC_IN5) 630 #define GPIO_PA28D_GLOC_IN5 _UL_(1 << 28) 631 #define PIN_PB07C_GLOC_IN5 _L_(39) /**< \brief GLOC signal: IN5 on PB07 mux C */ 632 #define MUX_PB07C_GLOC_IN5 _L_(2) 633 #define PINMUX_PB07C_GLOC_IN5 ((PIN_PB07C_GLOC_IN5 << 16) | MUX_PB07C_GLOC_IN5) 634 #define GPIO_PB07C_GLOC_IN5 _UL_(1 << 7) 635 #define PIN_PA29D_GLOC_IN6 _L_(29) /**< \brief GLOC signal: IN6 on PA29 mux D */ 636 #define MUX_PA29D_GLOC_IN6 _L_(3) 637 #define PINMUX_PA29D_GLOC_IN6 ((PIN_PA29D_GLOC_IN6 << 16) | MUX_PA29D_GLOC_IN6) 638 #define GPIO_PA29D_GLOC_IN6 _UL_(1 << 29) 639 #define PIN_PB08C_GLOC_IN6 _L_(40) /**< \brief GLOC signal: IN6 on PB08 mux C */ 640 #define MUX_PB08C_GLOC_IN6 _L_(2) 641 #define PINMUX_PB08C_GLOC_IN6 ((PIN_PB08C_GLOC_IN6 << 16) | MUX_PB08C_GLOC_IN6) 642 #define GPIO_PB08C_GLOC_IN6 _UL_(1 << 8) 643 #define PIN_PA30D_GLOC_IN7 _L_(30) /**< \brief GLOC signal: IN7 on PA30 mux D */ 644 #define MUX_PA30D_GLOC_IN7 _L_(3) 645 #define PINMUX_PA30D_GLOC_IN7 ((PIN_PA30D_GLOC_IN7 << 16) | MUX_PA30D_GLOC_IN7) 646 #define GPIO_PA30D_GLOC_IN7 _UL_(1 << 30) 647 #define PIN_PB09C_GLOC_IN7 _L_(41) /**< \brief GLOC signal: IN7 on PB09 mux C */ 648 #define MUX_PB09C_GLOC_IN7 _L_(2) 649 #define PINMUX_PB09C_GLOC_IN7 ((PIN_PB09C_GLOC_IN7 << 16) | MUX_PB09C_GLOC_IN7) 650 #define GPIO_PB09C_GLOC_IN7 _UL_(1 << 9) 651 #define PIN_PA08D_GLOC_OUT0 _L_(8) /**< \brief GLOC signal: OUT0 on PA08 mux D */ 652 #define MUX_PA08D_GLOC_OUT0 _L_(3) 653 #define PINMUX_PA08D_GLOC_OUT0 ((PIN_PA08D_GLOC_OUT0 << 16) | MUX_PA08D_GLOC_OUT0) 654 #define GPIO_PA08D_GLOC_OUT0 _UL_(1 << 8) 655 #define PIN_PA24D_GLOC_OUT0 _L_(24) /**< \brief GLOC signal: OUT0 on PA24 mux D */ 656 #define MUX_PA24D_GLOC_OUT0 _L_(3) 657 #define PINMUX_PA24D_GLOC_OUT0 ((PIN_PA24D_GLOC_OUT0 << 16) | MUX_PA24D_GLOC_OUT0) 658 #define GPIO_PA24D_GLOC_OUT0 _UL_(1 << 24) 659 #define PIN_PA31D_GLOC_OUT1 _L_(31) /**< \brief GLOC signal: OUT1 on PA31 mux D */ 660 #define MUX_PA31D_GLOC_OUT1 _L_(3) 661 #define PINMUX_PA31D_GLOC_OUT1 ((PIN_PA31D_GLOC_OUT1 << 16) | MUX_PA31D_GLOC_OUT1) 662 #define GPIO_PA31D_GLOC_OUT1 _UL_(1 << 31) 663 #define PIN_PB10C_GLOC_OUT1 _L_(42) /**< \brief GLOC signal: OUT1 on PB10 mux C */ 664 #define MUX_PB10C_GLOC_OUT1 _L_(2) 665 #define PINMUX_PB10C_GLOC_OUT1 ((PIN_PB10C_GLOC_OUT1 << 16) | MUX_PB10C_GLOC_OUT1) 666 #define GPIO_PB10C_GLOC_OUT1 _UL_(1 << 10) 667 /* ========== GPIO definition for ABDACB peripheral ========== */ 668 #define PIN_PA31C_ABDACB_CLK _L_(31) /**< \brief ABDACB signal: CLK on PA31 mux C */ 669 #define MUX_PA31C_ABDACB_CLK _L_(2) 670 #define PINMUX_PA31C_ABDACB_CLK ((PIN_PA31C_ABDACB_CLK << 16) | MUX_PA31C_ABDACB_CLK) 671 #define GPIO_PA31C_ABDACB_CLK _UL_(1 << 31) 672 #define PIN_PA27C_ABDACB_DAC0 _L_(27) /**< \brief ABDACB signal: DAC0 on PA27 mux C */ 673 #define MUX_PA27C_ABDACB_DAC0 _L_(2) 674 #define PINMUX_PA27C_ABDACB_DAC0 ((PIN_PA27C_ABDACB_DAC0 << 16) | MUX_PA27C_ABDACB_DAC0) 675 #define GPIO_PA27C_ABDACB_DAC0 _UL_(1 << 27) 676 #define PIN_PB02C_ABDACB_DAC0 _L_(34) /**< \brief ABDACB signal: DAC0 on PB02 mux C */ 677 #define MUX_PB02C_ABDACB_DAC0 _L_(2) 678 #define PINMUX_PB02C_ABDACB_DAC0 ((PIN_PB02C_ABDACB_DAC0 << 16) | MUX_PB02C_ABDACB_DAC0) 679 #define GPIO_PB02C_ABDACB_DAC0 _UL_(1 << 2) 680 #define PIN_PA17B_ABDACB_DAC0 _L_(17) /**< \brief ABDACB signal: DAC0 on PA17 mux B */ 681 #define MUX_PA17B_ABDACB_DAC0 _L_(1) 682 #define PINMUX_PA17B_ABDACB_DAC0 ((PIN_PA17B_ABDACB_DAC0 << 16) | MUX_PA17B_ABDACB_DAC0) 683 #define GPIO_PA17B_ABDACB_DAC0 _UL_(1 << 17) 684 #define PIN_PA29C_ABDACB_DAC1 _L_(29) /**< \brief ABDACB signal: DAC1 on PA29 mux C */ 685 #define MUX_PA29C_ABDACB_DAC1 _L_(2) 686 #define PINMUX_PA29C_ABDACB_DAC1 ((PIN_PA29C_ABDACB_DAC1 << 16) | MUX_PA29C_ABDACB_DAC1) 687 #define GPIO_PA29C_ABDACB_DAC1 _UL_(1 << 29) 688 #define PIN_PB04C_ABDACB_DAC1 _L_(36) /**< \brief ABDACB signal: DAC1 on PB04 mux C */ 689 #define MUX_PB04C_ABDACB_DAC1 _L_(2) 690 #define PINMUX_PB04C_ABDACB_DAC1 ((PIN_PB04C_ABDACB_DAC1 << 16) | MUX_PB04C_ABDACB_DAC1) 691 #define GPIO_PB04C_ABDACB_DAC1 _UL_(1 << 4) 692 #define PIN_PA19B_ABDACB_DAC1 _L_(19) /**< \brief ABDACB signal: DAC1 on PA19 mux B */ 693 #define MUX_PA19B_ABDACB_DAC1 _L_(1) 694 #define PINMUX_PA19B_ABDACB_DAC1 ((PIN_PA19B_ABDACB_DAC1 << 16) | MUX_PA19B_ABDACB_DAC1) 695 #define GPIO_PA19B_ABDACB_DAC1 _UL_(1 << 19) 696 #define PIN_PA28C_ABDACB_DACN0 _L_(28) /**< \brief ABDACB signal: DACN0 on PA28 mux C */ 697 #define MUX_PA28C_ABDACB_DACN0 _L_(2) 698 #define PINMUX_PA28C_ABDACB_DACN0 ((PIN_PA28C_ABDACB_DACN0 << 16) | MUX_PA28C_ABDACB_DACN0) 699 #define GPIO_PA28C_ABDACB_DACN0 _UL_(1 << 28) 700 #define PIN_PB03C_ABDACB_DACN0 _L_(35) /**< \brief ABDACB signal: DACN0 on PB03 mux C */ 701 #define MUX_PB03C_ABDACB_DACN0 _L_(2) 702 #define PINMUX_PB03C_ABDACB_DACN0 ((PIN_PB03C_ABDACB_DACN0 << 16) | MUX_PB03C_ABDACB_DACN0) 703 #define GPIO_PB03C_ABDACB_DACN0 _UL_(1 << 3) 704 #define PIN_PA18B_ABDACB_DACN0 _L_(18) /**< \brief ABDACB signal: DACN0 on PA18 mux B */ 705 #define MUX_PA18B_ABDACB_DACN0 _L_(1) 706 #define PINMUX_PA18B_ABDACB_DACN0 ((PIN_PA18B_ABDACB_DACN0 << 16) | MUX_PA18B_ABDACB_DACN0) 707 #define GPIO_PA18B_ABDACB_DACN0 _UL_(1 << 18) 708 #define PIN_PA30C_ABDACB_DACN1 _L_(30) /**< \brief ABDACB signal: DACN1 on PA30 mux C */ 709 #define MUX_PA30C_ABDACB_DACN1 _L_(2) 710 #define PINMUX_PA30C_ABDACB_DACN1 ((PIN_PA30C_ABDACB_DACN1 << 16) | MUX_PA30C_ABDACB_DACN1) 711 #define GPIO_PA30C_ABDACB_DACN1 _UL_(1 << 30) 712 #define PIN_PB05C_ABDACB_DACN1 _L_(37) /**< \brief ABDACB signal: DACN1 on PB05 mux C */ 713 #define MUX_PB05C_ABDACB_DACN1 _L_(2) 714 #define PINMUX_PB05C_ABDACB_DACN1 ((PIN_PB05C_ABDACB_DACN1 << 16) | MUX_PB05C_ABDACB_DACN1) 715 #define GPIO_PB05C_ABDACB_DACN1 _UL_(1 << 5) 716 #define PIN_PA20B_ABDACB_DACN1 _L_(20) /**< \brief ABDACB signal: DACN1 on PA20 mux B */ 717 #define MUX_PA20B_ABDACB_DACN1 _L_(1) 718 #define PINMUX_PA20B_ABDACB_DACN1 ((PIN_PA20B_ABDACB_DACN1 << 16) | MUX_PA20B_ABDACB_DACN1) 719 #define GPIO_PA20B_ABDACB_DACN1 _UL_(1 << 20) 720 /* ========== GPIO definition for PARC peripheral ========== */ 721 #define PIN_PA17D_PARC_PCCK _L_(17) /**< \brief PARC signal: PCCK on PA17 mux D */ 722 #define MUX_PA17D_PARC_PCCK _L_(3) 723 #define PINMUX_PA17D_PARC_PCCK ((PIN_PA17D_PARC_PCCK << 16) | MUX_PA17D_PARC_PCCK) 724 #define GPIO_PA17D_PARC_PCCK _UL_(1 << 17) 725 #define PIN_PA09D_PARC_PCDATA0 _L_(9) /**< \brief PARC signal: PCDATA0 on PA09 mux D */ 726 #define MUX_PA09D_PARC_PCDATA0 _L_(3) 727 #define PINMUX_PA09D_PARC_PCDATA0 ((PIN_PA09D_PARC_PCDATA0 << 16) | MUX_PA09D_PARC_PCDATA0) 728 #define GPIO_PA09D_PARC_PCDATA0 _UL_(1 << 9) 729 #define PIN_PA10D_PARC_PCDATA1 _L_(10) /**< \brief PARC signal: PCDATA1 on PA10 mux D */ 730 #define MUX_PA10D_PARC_PCDATA1 _L_(3) 731 #define PINMUX_PA10D_PARC_PCDATA1 ((PIN_PA10D_PARC_PCDATA1 << 16) | MUX_PA10D_PARC_PCDATA1) 732 #define GPIO_PA10D_PARC_PCDATA1 _UL_(1 << 10) 733 #define PIN_PA11D_PARC_PCDATA2 _L_(11) /**< \brief PARC signal: PCDATA2 on PA11 mux D */ 734 #define MUX_PA11D_PARC_PCDATA2 _L_(3) 735 #define PINMUX_PA11D_PARC_PCDATA2 ((PIN_PA11D_PARC_PCDATA2 << 16) | MUX_PA11D_PARC_PCDATA2) 736 #define GPIO_PA11D_PARC_PCDATA2 _UL_(1 << 11) 737 #define PIN_PA12D_PARC_PCDATA3 _L_(12) /**< \brief PARC signal: PCDATA3 on PA12 mux D */ 738 #define MUX_PA12D_PARC_PCDATA3 _L_(3) 739 #define PINMUX_PA12D_PARC_PCDATA3 ((PIN_PA12D_PARC_PCDATA3 << 16) | MUX_PA12D_PARC_PCDATA3) 740 #define GPIO_PA12D_PARC_PCDATA3 _UL_(1 << 12) 741 #define PIN_PA13D_PARC_PCDATA4 _L_(13) /**< \brief PARC signal: PCDATA4 on PA13 mux D */ 742 #define MUX_PA13D_PARC_PCDATA4 _L_(3) 743 #define PINMUX_PA13D_PARC_PCDATA4 ((PIN_PA13D_PARC_PCDATA4 << 16) | MUX_PA13D_PARC_PCDATA4) 744 #define GPIO_PA13D_PARC_PCDATA4 _UL_(1 << 13) 745 #define PIN_PA14D_PARC_PCDATA5 _L_(14) /**< \brief PARC signal: PCDATA5 on PA14 mux D */ 746 #define MUX_PA14D_PARC_PCDATA5 _L_(3) 747 #define PINMUX_PA14D_PARC_PCDATA5 ((PIN_PA14D_PARC_PCDATA5 << 16) | MUX_PA14D_PARC_PCDATA5) 748 #define GPIO_PA14D_PARC_PCDATA5 _UL_(1 << 14) 749 #define PIN_PA15D_PARC_PCDATA6 _L_(15) /**< \brief PARC signal: PCDATA6 on PA15 mux D */ 750 #define MUX_PA15D_PARC_PCDATA6 _L_(3) 751 #define PINMUX_PA15D_PARC_PCDATA6 ((PIN_PA15D_PARC_PCDATA6 << 16) | MUX_PA15D_PARC_PCDATA6) 752 #define GPIO_PA15D_PARC_PCDATA6 _UL_(1 << 15) 753 #define PIN_PA16D_PARC_PCDATA7 _L_(16) /**< \brief PARC signal: PCDATA7 on PA16 mux D */ 754 #define MUX_PA16D_PARC_PCDATA7 _L_(3) 755 #define PINMUX_PA16D_PARC_PCDATA7 ((PIN_PA16D_PARC_PCDATA7 << 16) | MUX_PA16D_PARC_PCDATA7) 756 #define GPIO_PA16D_PARC_PCDATA7 _UL_(1 << 16) 757 #define PIN_PA18D_PARC_PCEN1 _L_(18) /**< \brief PARC signal: PCEN1 on PA18 mux D */ 758 #define MUX_PA18D_PARC_PCEN1 _L_(3) 759 #define PINMUX_PA18D_PARC_PCEN1 ((PIN_PA18D_PARC_PCEN1 << 16) | MUX_PA18D_PARC_PCEN1) 760 #define GPIO_PA18D_PARC_PCEN1 _UL_(1 << 18) 761 #define PIN_PA19D_PARC_PCEN2 _L_(19) /**< \brief PARC signal: PCEN2 on PA19 mux D */ 762 #define MUX_PA19D_PARC_PCEN2 _L_(3) 763 #define PINMUX_PA19D_PARC_PCEN2 ((PIN_PA19D_PARC_PCEN2 << 16) | MUX_PA19D_PARC_PCEN2) 764 #define GPIO_PA19D_PARC_PCEN2 _UL_(1 << 19) 765 /* ========== GPIO definition for CATB peripheral ========== */ 766 #define PIN_PA02G_CATB_DIS _L_(2) /**< \brief CATB signal: DIS on PA02 mux G */ 767 #define MUX_PA02G_CATB_DIS _L_(6) 768 #define PINMUX_PA02G_CATB_DIS ((PIN_PA02G_CATB_DIS << 16) | MUX_PA02G_CATB_DIS) 769 #define GPIO_PA02G_CATB_DIS _UL_(1 << 2) 770 #define PIN_PA12G_CATB_DIS _L_(12) /**< \brief CATB signal: DIS on PA12 mux G */ 771 #define MUX_PA12G_CATB_DIS _L_(6) 772 #define PINMUX_PA12G_CATB_DIS ((PIN_PA12G_CATB_DIS << 16) | MUX_PA12G_CATB_DIS) 773 #define GPIO_PA12G_CATB_DIS _UL_(1 << 12) 774 #define PIN_PA23G_CATB_DIS _L_(23) /**< \brief CATB signal: DIS on PA23 mux G */ 775 #define MUX_PA23G_CATB_DIS _L_(6) 776 #define PINMUX_PA23G_CATB_DIS ((PIN_PA23G_CATB_DIS << 16) | MUX_PA23G_CATB_DIS) 777 #define GPIO_PA23G_CATB_DIS _UL_(1 << 23) 778 #define PIN_PA31G_CATB_DIS _L_(31) /**< \brief CATB signal: DIS on PA31 mux G */ 779 #define MUX_PA31G_CATB_DIS _L_(6) 780 #define PINMUX_PA31G_CATB_DIS ((PIN_PA31G_CATB_DIS << 16) | MUX_PA31G_CATB_DIS) 781 #define GPIO_PA31G_CATB_DIS _UL_(1 << 31) 782 #define PIN_PB03G_CATB_DIS _L_(35) /**< \brief CATB signal: DIS on PB03 mux G */ 783 #define MUX_PB03G_CATB_DIS _L_(6) 784 #define PINMUX_PB03G_CATB_DIS ((PIN_PB03G_CATB_DIS << 16) | MUX_PB03G_CATB_DIS) 785 #define GPIO_PB03G_CATB_DIS _UL_(1 << 3) 786 #define PIN_PB12G_CATB_DIS _L_(44) /**< \brief CATB signal: DIS on PB12 mux G */ 787 #define MUX_PB12G_CATB_DIS _L_(6) 788 #define PINMUX_PB12G_CATB_DIS ((PIN_PB12G_CATB_DIS << 16) | MUX_PB12G_CATB_DIS) 789 #define GPIO_PB12G_CATB_DIS _UL_(1 << 12) 790 #define PIN_PA04G_CATB_SENSE0 _L_(4) /**< \brief CATB signal: SENSE0 on PA04 mux G */ 791 #define MUX_PA04G_CATB_SENSE0 _L_(6) 792 #define PINMUX_PA04G_CATB_SENSE0 ((PIN_PA04G_CATB_SENSE0 << 16) | MUX_PA04G_CATB_SENSE0) 793 #define GPIO_PA04G_CATB_SENSE0 _UL_(1 << 4) 794 #define PIN_PA27G_CATB_SENSE0 _L_(27) /**< \brief CATB signal: SENSE0 on PA27 mux G */ 795 #define MUX_PA27G_CATB_SENSE0 _L_(6) 796 #define PINMUX_PA27G_CATB_SENSE0 ((PIN_PA27G_CATB_SENSE0 << 16) | MUX_PA27G_CATB_SENSE0) 797 #define GPIO_PA27G_CATB_SENSE0 _UL_(1 << 27) 798 #define PIN_PB13G_CATB_SENSE0 _L_(45) /**< \brief CATB signal: SENSE0 on PB13 mux G */ 799 #define MUX_PB13G_CATB_SENSE0 _L_(6) 800 #define PINMUX_PB13G_CATB_SENSE0 ((PIN_PB13G_CATB_SENSE0 << 16) | MUX_PB13G_CATB_SENSE0) 801 #define GPIO_PB13G_CATB_SENSE0 _UL_(1 << 13) 802 #define PIN_PA05G_CATB_SENSE1 _L_(5) /**< \brief CATB signal: SENSE1 on PA05 mux G */ 803 #define MUX_PA05G_CATB_SENSE1 _L_(6) 804 #define PINMUX_PA05G_CATB_SENSE1 ((PIN_PA05G_CATB_SENSE1 << 16) | MUX_PA05G_CATB_SENSE1) 805 #define GPIO_PA05G_CATB_SENSE1 _UL_(1 << 5) 806 #define PIN_PA28G_CATB_SENSE1 _L_(28) /**< \brief CATB signal: SENSE1 on PA28 mux G */ 807 #define MUX_PA28G_CATB_SENSE1 _L_(6) 808 #define PINMUX_PA28G_CATB_SENSE1 ((PIN_PA28G_CATB_SENSE1 << 16) | MUX_PA28G_CATB_SENSE1) 809 #define GPIO_PA28G_CATB_SENSE1 _UL_(1 << 28) 810 #define PIN_PB14G_CATB_SENSE1 _L_(46) /**< \brief CATB signal: SENSE1 on PB14 mux G */ 811 #define MUX_PB14G_CATB_SENSE1 _L_(6) 812 #define PINMUX_PB14G_CATB_SENSE1 ((PIN_PB14G_CATB_SENSE1 << 16) | MUX_PB14G_CATB_SENSE1) 813 #define GPIO_PB14G_CATB_SENSE1 _UL_(1 << 14) 814 #define PIN_PA06G_CATB_SENSE2 _L_(6) /**< \brief CATB signal: SENSE2 on PA06 mux G */ 815 #define MUX_PA06G_CATB_SENSE2 _L_(6) 816 #define PINMUX_PA06G_CATB_SENSE2 ((PIN_PA06G_CATB_SENSE2 << 16) | MUX_PA06G_CATB_SENSE2) 817 #define GPIO_PA06G_CATB_SENSE2 _UL_(1 << 6) 818 #define PIN_PA29G_CATB_SENSE2 _L_(29) /**< \brief CATB signal: SENSE2 on PA29 mux G */ 819 #define MUX_PA29G_CATB_SENSE2 _L_(6) 820 #define PINMUX_PA29G_CATB_SENSE2 ((PIN_PA29G_CATB_SENSE2 << 16) | MUX_PA29G_CATB_SENSE2) 821 #define GPIO_PA29G_CATB_SENSE2 _UL_(1 << 29) 822 #define PIN_PB15G_CATB_SENSE2 _L_(47) /**< \brief CATB signal: SENSE2 on PB15 mux G */ 823 #define MUX_PB15G_CATB_SENSE2 _L_(6) 824 #define PINMUX_PB15G_CATB_SENSE2 ((PIN_PB15G_CATB_SENSE2 << 16) | MUX_PB15G_CATB_SENSE2) 825 #define GPIO_PB15G_CATB_SENSE2 _UL_(1 << 15) 826 #define PIN_PA07G_CATB_SENSE3 _L_(7) /**< \brief CATB signal: SENSE3 on PA07 mux G */ 827 #define MUX_PA07G_CATB_SENSE3 _L_(6) 828 #define PINMUX_PA07G_CATB_SENSE3 ((PIN_PA07G_CATB_SENSE3 << 16) | MUX_PA07G_CATB_SENSE3) 829 #define GPIO_PA07G_CATB_SENSE3 _UL_(1 << 7) 830 #define PIN_PA30G_CATB_SENSE3 _L_(30) /**< \brief CATB signal: SENSE3 on PA30 mux G */ 831 #define MUX_PA30G_CATB_SENSE3 _L_(6) 832 #define PINMUX_PA30G_CATB_SENSE3 ((PIN_PA30G_CATB_SENSE3 << 16) | MUX_PA30G_CATB_SENSE3) 833 #define GPIO_PA30G_CATB_SENSE3 _UL_(1 << 30) 834 #define PIN_PA08G_CATB_SENSE4 _L_(8) /**< \brief CATB signal: SENSE4 on PA08 mux G */ 835 #define MUX_PA08G_CATB_SENSE4 _L_(6) 836 #define PINMUX_PA08G_CATB_SENSE4 ((PIN_PA08G_CATB_SENSE4 << 16) | MUX_PA08G_CATB_SENSE4) 837 #define GPIO_PA08G_CATB_SENSE4 _UL_(1 << 8) 838 #define PIN_PA09G_CATB_SENSE5 _L_(9) /**< \brief CATB signal: SENSE5 on PA09 mux G */ 839 #define MUX_PA09G_CATB_SENSE5 _L_(6) 840 #define PINMUX_PA09G_CATB_SENSE5 ((PIN_PA09G_CATB_SENSE5 << 16) | MUX_PA09G_CATB_SENSE5) 841 #define GPIO_PA09G_CATB_SENSE5 _UL_(1 << 9) 842 #define PIN_PA10G_CATB_SENSE6 _L_(10) /**< \brief CATB signal: SENSE6 on PA10 mux G */ 843 #define MUX_PA10G_CATB_SENSE6 _L_(6) 844 #define PINMUX_PA10G_CATB_SENSE6 ((PIN_PA10G_CATB_SENSE6 << 16) | MUX_PA10G_CATB_SENSE6) 845 #define GPIO_PA10G_CATB_SENSE6 _UL_(1 << 10) 846 #define PIN_PA11G_CATB_SENSE7 _L_(11) /**< \brief CATB signal: SENSE7 on PA11 mux G */ 847 #define MUX_PA11G_CATB_SENSE7 _L_(6) 848 #define PINMUX_PA11G_CATB_SENSE7 ((PIN_PA11G_CATB_SENSE7 << 16) | MUX_PA11G_CATB_SENSE7) 849 #define GPIO_PA11G_CATB_SENSE7 _UL_(1 << 11) 850 #define PIN_PA13G_CATB_SENSE8 _L_(13) /**< \brief CATB signal: SENSE8 on PA13 mux G */ 851 #define MUX_PA13G_CATB_SENSE8 _L_(6) 852 #define PINMUX_PA13G_CATB_SENSE8 ((PIN_PA13G_CATB_SENSE8 << 16) | MUX_PA13G_CATB_SENSE8) 853 #define GPIO_PA13G_CATB_SENSE8 _UL_(1 << 13) 854 #define PIN_PA14G_CATB_SENSE9 _L_(14) /**< \brief CATB signal: SENSE9 on PA14 mux G */ 855 #define MUX_PA14G_CATB_SENSE9 _L_(6) 856 #define PINMUX_PA14G_CATB_SENSE9 ((PIN_PA14G_CATB_SENSE9 << 16) | MUX_PA14G_CATB_SENSE9) 857 #define GPIO_PA14G_CATB_SENSE9 _UL_(1 << 14) 858 #define PIN_PA15G_CATB_SENSE10 _L_(15) /**< \brief CATB signal: SENSE10 on PA15 mux G */ 859 #define MUX_PA15G_CATB_SENSE10 _L_(6) 860 #define PINMUX_PA15G_CATB_SENSE10 ((PIN_PA15G_CATB_SENSE10 << 16) | MUX_PA15G_CATB_SENSE10) 861 #define GPIO_PA15G_CATB_SENSE10 _UL_(1 << 15) 862 #define PIN_PA16G_CATB_SENSE11 _L_(16) /**< \brief CATB signal: SENSE11 on PA16 mux G */ 863 #define MUX_PA16G_CATB_SENSE11 _L_(6) 864 #define PINMUX_PA16G_CATB_SENSE11 ((PIN_PA16G_CATB_SENSE11 << 16) | MUX_PA16G_CATB_SENSE11) 865 #define GPIO_PA16G_CATB_SENSE11 _UL_(1 << 16) 866 #define PIN_PA17G_CATB_SENSE12 _L_(17) /**< \brief CATB signal: SENSE12 on PA17 mux G */ 867 #define MUX_PA17G_CATB_SENSE12 _L_(6) 868 #define PINMUX_PA17G_CATB_SENSE12 ((PIN_PA17G_CATB_SENSE12 << 16) | MUX_PA17G_CATB_SENSE12) 869 #define GPIO_PA17G_CATB_SENSE12 _UL_(1 << 17) 870 #define PIN_PA18G_CATB_SENSE13 _L_(18) /**< \brief CATB signal: SENSE13 on PA18 mux G */ 871 #define MUX_PA18G_CATB_SENSE13 _L_(6) 872 #define PINMUX_PA18G_CATB_SENSE13 ((PIN_PA18G_CATB_SENSE13 << 16) | MUX_PA18G_CATB_SENSE13) 873 #define GPIO_PA18G_CATB_SENSE13 _UL_(1 << 18) 874 #define PIN_PA19G_CATB_SENSE14 _L_(19) /**< \brief CATB signal: SENSE14 on PA19 mux G */ 875 #define MUX_PA19G_CATB_SENSE14 _L_(6) 876 #define PINMUX_PA19G_CATB_SENSE14 ((PIN_PA19G_CATB_SENSE14 << 16) | MUX_PA19G_CATB_SENSE14) 877 #define GPIO_PA19G_CATB_SENSE14 _UL_(1 << 19) 878 #define PIN_PA20G_CATB_SENSE15 _L_(20) /**< \brief CATB signal: SENSE15 on PA20 mux G */ 879 #define MUX_PA20G_CATB_SENSE15 _L_(6) 880 #define PINMUX_PA20G_CATB_SENSE15 ((PIN_PA20G_CATB_SENSE15 << 16) | MUX_PA20G_CATB_SENSE15) 881 #define GPIO_PA20G_CATB_SENSE15 _UL_(1 << 20) 882 #define PIN_PA21G_CATB_SENSE16 _L_(21) /**< \brief CATB signal: SENSE16 on PA21 mux G */ 883 #define MUX_PA21G_CATB_SENSE16 _L_(6) 884 #define PINMUX_PA21G_CATB_SENSE16 ((PIN_PA21G_CATB_SENSE16 << 16) | MUX_PA21G_CATB_SENSE16) 885 #define GPIO_PA21G_CATB_SENSE16 _UL_(1 << 21) 886 #define PIN_PA22G_CATB_SENSE17 _L_(22) /**< \brief CATB signal: SENSE17 on PA22 mux G */ 887 #define MUX_PA22G_CATB_SENSE17 _L_(6) 888 #define PINMUX_PA22G_CATB_SENSE17 ((PIN_PA22G_CATB_SENSE17 << 16) | MUX_PA22G_CATB_SENSE17) 889 #define GPIO_PA22G_CATB_SENSE17 _UL_(1 << 22) 890 #define PIN_PA24G_CATB_SENSE18 _L_(24) /**< \brief CATB signal: SENSE18 on PA24 mux G */ 891 #define MUX_PA24G_CATB_SENSE18 _L_(6) 892 #define PINMUX_PA24G_CATB_SENSE18 ((PIN_PA24G_CATB_SENSE18 << 16) | MUX_PA24G_CATB_SENSE18) 893 #define GPIO_PA24G_CATB_SENSE18 _UL_(1 << 24) 894 #define PIN_PA25G_CATB_SENSE19 _L_(25) /**< \brief CATB signal: SENSE19 on PA25 mux G */ 895 #define MUX_PA25G_CATB_SENSE19 _L_(6) 896 #define PINMUX_PA25G_CATB_SENSE19 ((PIN_PA25G_CATB_SENSE19 << 16) | MUX_PA25G_CATB_SENSE19) 897 #define GPIO_PA25G_CATB_SENSE19 _UL_(1 << 25) 898 #define PIN_PA26G_CATB_SENSE20 _L_(26) /**< \brief CATB signal: SENSE20 on PA26 mux G */ 899 #define MUX_PA26G_CATB_SENSE20 _L_(6) 900 #define PINMUX_PA26G_CATB_SENSE20 ((PIN_PA26G_CATB_SENSE20 << 16) | MUX_PA26G_CATB_SENSE20) 901 #define GPIO_PA26G_CATB_SENSE20 _UL_(1 << 26) 902 #define PIN_PB00G_CATB_SENSE21 _L_(32) /**< \brief CATB signal: SENSE21 on PB00 mux G */ 903 #define MUX_PB00G_CATB_SENSE21 _L_(6) 904 #define PINMUX_PB00G_CATB_SENSE21 ((PIN_PB00G_CATB_SENSE21 << 16) | MUX_PB00G_CATB_SENSE21) 905 #define GPIO_PB00G_CATB_SENSE21 _UL_(1 << 0) 906 #define PIN_PB01G_CATB_SENSE22 _L_(33) /**< \brief CATB signal: SENSE22 on PB01 mux G */ 907 #define MUX_PB01G_CATB_SENSE22 _L_(6) 908 #define PINMUX_PB01G_CATB_SENSE22 ((PIN_PB01G_CATB_SENSE22 << 16) | MUX_PB01G_CATB_SENSE22) 909 #define GPIO_PB01G_CATB_SENSE22 _UL_(1 << 1) 910 #define PIN_PB02G_CATB_SENSE23 _L_(34) /**< \brief CATB signal: SENSE23 on PB02 mux G */ 911 #define MUX_PB02G_CATB_SENSE23 _L_(6) 912 #define PINMUX_PB02G_CATB_SENSE23 ((PIN_PB02G_CATB_SENSE23 << 16) | MUX_PB02G_CATB_SENSE23) 913 #define GPIO_PB02G_CATB_SENSE23 _UL_(1 << 2) 914 #define PIN_PB04G_CATB_SENSE24 _L_(36) /**< \brief CATB signal: SENSE24 on PB04 mux G */ 915 #define MUX_PB04G_CATB_SENSE24 _L_(6) 916 #define PINMUX_PB04G_CATB_SENSE24 ((PIN_PB04G_CATB_SENSE24 << 16) | MUX_PB04G_CATB_SENSE24) 917 #define GPIO_PB04G_CATB_SENSE24 _UL_(1 << 4) 918 #define PIN_PB05G_CATB_SENSE25 _L_(37) /**< \brief CATB signal: SENSE25 on PB05 mux G */ 919 #define MUX_PB05G_CATB_SENSE25 _L_(6) 920 #define PINMUX_PB05G_CATB_SENSE25 ((PIN_PB05G_CATB_SENSE25 << 16) | MUX_PB05G_CATB_SENSE25) 921 #define GPIO_PB05G_CATB_SENSE25 _UL_(1 << 5) 922 #define PIN_PB06G_CATB_SENSE26 _L_(38) /**< \brief CATB signal: SENSE26 on PB06 mux G */ 923 #define MUX_PB06G_CATB_SENSE26 _L_(6) 924 #define PINMUX_PB06G_CATB_SENSE26 ((PIN_PB06G_CATB_SENSE26 << 16) | MUX_PB06G_CATB_SENSE26) 925 #define GPIO_PB06G_CATB_SENSE26 _UL_(1 << 6) 926 #define PIN_PB07G_CATB_SENSE27 _L_(39) /**< \brief CATB signal: SENSE27 on PB07 mux G */ 927 #define MUX_PB07G_CATB_SENSE27 _L_(6) 928 #define PINMUX_PB07G_CATB_SENSE27 ((PIN_PB07G_CATB_SENSE27 << 16) | MUX_PB07G_CATB_SENSE27) 929 #define GPIO_PB07G_CATB_SENSE27 _UL_(1 << 7) 930 #define PIN_PB08G_CATB_SENSE28 _L_(40) /**< \brief CATB signal: SENSE28 on PB08 mux G */ 931 #define MUX_PB08G_CATB_SENSE28 _L_(6) 932 #define PINMUX_PB08G_CATB_SENSE28 ((PIN_PB08G_CATB_SENSE28 << 16) | MUX_PB08G_CATB_SENSE28) 933 #define GPIO_PB08G_CATB_SENSE28 _UL_(1 << 8) 934 #define PIN_PB09G_CATB_SENSE29 _L_(41) /**< \brief CATB signal: SENSE29 on PB09 mux G */ 935 #define MUX_PB09G_CATB_SENSE29 _L_(6) 936 #define PINMUX_PB09G_CATB_SENSE29 ((PIN_PB09G_CATB_SENSE29 << 16) | MUX_PB09G_CATB_SENSE29) 937 #define GPIO_PB09G_CATB_SENSE29 _UL_(1 << 9) 938 #define PIN_PB10G_CATB_SENSE30 _L_(42) /**< \brief CATB signal: SENSE30 on PB10 mux G */ 939 #define MUX_PB10G_CATB_SENSE30 _L_(6) 940 #define PINMUX_PB10G_CATB_SENSE30 ((PIN_PB10G_CATB_SENSE30 << 16) | MUX_PB10G_CATB_SENSE30) 941 #define GPIO_PB10G_CATB_SENSE30 _UL_(1 << 10) 942 #define PIN_PB11G_CATB_SENSE31 _L_(43) /**< \brief CATB signal: SENSE31 on PB11 mux G */ 943 #define MUX_PB11G_CATB_SENSE31 _L_(6) 944 #define PINMUX_PB11G_CATB_SENSE31 ((PIN_PB11G_CATB_SENSE31 << 16) | MUX_PB11G_CATB_SENSE31) 945 #define GPIO_PB11G_CATB_SENSE31 _UL_(1 << 11) 946 /* ========== GPIO definition for USBC peripheral ========== */ 947 #define PIN_PA25A_USBC_DM _L_(25) /**< \brief USBC signal: DM on PA25 mux A */ 948 #define MUX_PA25A_USBC_DM _L_(0) 949 #define PINMUX_PA25A_USBC_DM ((PIN_PA25A_USBC_DM << 16) | MUX_PA25A_USBC_DM) 950 #define GPIO_PA25A_USBC_DM _UL_(1 << 25) 951 #define PIN_PA26A_USBC_DP _L_(26) /**< \brief USBC signal: DP on PA26 mux A */ 952 #define MUX_PA26A_USBC_DP _L_(0) 953 #define PINMUX_PA26A_USBC_DP ((PIN_PA26A_USBC_DP << 16) | MUX_PA26A_USBC_DP) 954 #define GPIO_PA26A_USBC_DP _UL_(1 << 26) 955 /* ========== GPIO definition for PEVC peripheral ========== */ 956 #define PIN_PA08C_PEVC_PAD_EVT0 _L_(8) /**< \brief PEVC signal: PAD_EVT0 on PA08 mux C */ 957 #define MUX_PA08C_PEVC_PAD_EVT0 _L_(2) 958 #define PINMUX_PA08C_PEVC_PAD_EVT0 ((PIN_PA08C_PEVC_PAD_EVT0 << 16) | MUX_PA08C_PEVC_PAD_EVT0) 959 #define GPIO_PA08C_PEVC_PAD_EVT0 _UL_(1 << 8) 960 #define PIN_PB12C_PEVC_PAD_EVT0 _L_(44) /**< \brief PEVC signal: PAD_EVT0 on PB12 mux C */ 961 #define MUX_PB12C_PEVC_PAD_EVT0 _L_(2) 962 #define PINMUX_PB12C_PEVC_PAD_EVT0 ((PIN_PB12C_PEVC_PAD_EVT0 << 16) | MUX_PB12C_PEVC_PAD_EVT0) 963 #define GPIO_PB12C_PEVC_PAD_EVT0 _UL_(1 << 12) 964 #define PIN_PA09C_PEVC_PAD_EVT1 _L_(9) /**< \brief PEVC signal: PAD_EVT1 on PA09 mux C */ 965 #define MUX_PA09C_PEVC_PAD_EVT1 _L_(2) 966 #define PINMUX_PA09C_PEVC_PAD_EVT1 ((PIN_PA09C_PEVC_PAD_EVT1 << 16) | MUX_PA09C_PEVC_PAD_EVT1) 967 #define GPIO_PA09C_PEVC_PAD_EVT1 _UL_(1 << 9) 968 #define PIN_PB13C_PEVC_PAD_EVT1 _L_(45) /**< \brief PEVC signal: PAD_EVT1 on PB13 mux C */ 969 #define MUX_PB13C_PEVC_PAD_EVT1 _L_(2) 970 #define PINMUX_PB13C_PEVC_PAD_EVT1 ((PIN_PB13C_PEVC_PAD_EVT1 << 16) | MUX_PB13C_PEVC_PAD_EVT1) 971 #define GPIO_PB13C_PEVC_PAD_EVT1 _UL_(1 << 13) 972 #define PIN_PA10C_PEVC_PAD_EVT2 _L_(10) /**< \brief PEVC signal: PAD_EVT2 on PA10 mux C */ 973 #define MUX_PA10C_PEVC_PAD_EVT2 _L_(2) 974 #define PINMUX_PA10C_PEVC_PAD_EVT2 ((PIN_PA10C_PEVC_PAD_EVT2 << 16) | MUX_PA10C_PEVC_PAD_EVT2) 975 #define GPIO_PA10C_PEVC_PAD_EVT2 _UL_(1 << 10) 976 #define PIN_PB09B_PEVC_PAD_EVT2 _L_(41) /**< \brief PEVC signal: PAD_EVT2 on PB09 mux B */ 977 #define MUX_PB09B_PEVC_PAD_EVT2 _L_(1) 978 #define PINMUX_PB09B_PEVC_PAD_EVT2 ((PIN_PB09B_PEVC_PAD_EVT2 << 16) | MUX_PB09B_PEVC_PAD_EVT2) 979 #define GPIO_PB09B_PEVC_PAD_EVT2 _UL_(1 << 9) 980 #define PIN_PA11C_PEVC_PAD_EVT3 _L_(11) /**< \brief PEVC signal: PAD_EVT3 on PA11 mux C */ 981 #define MUX_PA11C_PEVC_PAD_EVT3 _L_(2) 982 #define PINMUX_PA11C_PEVC_PAD_EVT3 ((PIN_PA11C_PEVC_PAD_EVT3 << 16) | MUX_PA11C_PEVC_PAD_EVT3) 983 #define GPIO_PA11C_PEVC_PAD_EVT3 _UL_(1 << 11) 984 #define PIN_PB10B_PEVC_PAD_EVT3 _L_(42) /**< \brief PEVC signal: PAD_EVT3 on PB10 mux B */ 985 #define MUX_PB10B_PEVC_PAD_EVT3 _L_(1) 986 #define PINMUX_PB10B_PEVC_PAD_EVT3 ((PIN_PB10B_PEVC_PAD_EVT3 << 16) | MUX_PB10B_PEVC_PAD_EVT3) 987 #define GPIO_PB10B_PEVC_PAD_EVT3 _UL_(1 << 10) 988 /* ========== GPIO definition for SCIF peripheral ========== */ 989 #define PIN_PA19E_SCIF_GCLK0 _L_(19) /**< \brief SCIF signal: GCLK0 on PA19 mux E */ 990 #define MUX_PA19E_SCIF_GCLK0 _L_(4) 991 #define PINMUX_PA19E_SCIF_GCLK0 ((PIN_PA19E_SCIF_GCLK0 << 16) | MUX_PA19E_SCIF_GCLK0) 992 #define GPIO_PA19E_SCIF_GCLK0 _UL_(1 << 19) 993 #define PIN_PB10E_SCIF_GCLK0 _L_(42) /**< \brief SCIF signal: GCLK0 on PB10 mux E */ 994 #define MUX_PB10E_SCIF_GCLK0 _L_(4) 995 #define PINMUX_PB10E_SCIF_GCLK0 ((PIN_PB10E_SCIF_GCLK0 << 16) | MUX_PB10E_SCIF_GCLK0) 996 #define GPIO_PB10E_SCIF_GCLK0 _UL_(1 << 10) 997 #define PIN_PA02A_SCIF_GCLK0 _L_(2) /**< \brief SCIF signal: GCLK0 on PA02 mux A */ 998 #define MUX_PA02A_SCIF_GCLK0 _L_(0) 999 #define PINMUX_PA02A_SCIF_GCLK0 ((PIN_PA02A_SCIF_GCLK0 << 16) | MUX_PA02A_SCIF_GCLK0) 1000 #define GPIO_PA02A_SCIF_GCLK0 _UL_(1 << 2) 1001 #define PIN_PA20E_SCIF_GCLK1 _L_(20) /**< \brief SCIF signal: GCLK1 on PA20 mux E */ 1002 #define MUX_PA20E_SCIF_GCLK1 _L_(4) 1003 #define PINMUX_PA20E_SCIF_GCLK1 ((PIN_PA20E_SCIF_GCLK1 << 16) | MUX_PA20E_SCIF_GCLK1) 1004 #define GPIO_PA20E_SCIF_GCLK1 _UL_(1 << 20) 1005 #define PIN_PB11E_SCIF_GCLK1 _L_(43) /**< \brief SCIF signal: GCLK1 on PB11 mux E */ 1006 #define MUX_PB11E_SCIF_GCLK1 _L_(4) 1007 #define PINMUX_PB11E_SCIF_GCLK1 ((PIN_PB11E_SCIF_GCLK1 << 16) | MUX_PB11E_SCIF_GCLK1) 1008 #define GPIO_PB11E_SCIF_GCLK1 _UL_(1 << 11) 1009 #define PIN_PB12E_SCIF_GCLK2 _L_(44) /**< \brief SCIF signal: GCLK2 on PB12 mux E */ 1010 #define MUX_PB12E_SCIF_GCLK2 _L_(4) 1011 #define PINMUX_PB12E_SCIF_GCLK2 ((PIN_PB12E_SCIF_GCLK2 << 16) | MUX_PB12E_SCIF_GCLK2) 1012 #define GPIO_PB12E_SCIF_GCLK2 _UL_(1 << 12) 1013 #define PIN_PB13E_SCIF_GCLK3 _L_(45) /**< \brief SCIF signal: GCLK3 on PB13 mux E */ 1014 #define MUX_PB13E_SCIF_GCLK3 _L_(4) 1015 #define PINMUX_PB13E_SCIF_GCLK3 ((PIN_PB13E_SCIF_GCLK3 << 16) | MUX_PB13E_SCIF_GCLK3) 1016 #define GPIO_PB13E_SCIF_GCLK3 _UL_(1 << 13) 1017 #define PIN_PA23E_SCIF_GCLK_IN0 _L_(23) /**< \brief SCIF signal: GCLK_IN0 on PA23 mux E */ 1018 #define MUX_PA23E_SCIF_GCLK_IN0 _L_(4) 1019 #define PINMUX_PA23E_SCIF_GCLK_IN0 ((PIN_PA23E_SCIF_GCLK_IN0 << 16) | MUX_PA23E_SCIF_GCLK_IN0) 1020 #define GPIO_PA23E_SCIF_GCLK_IN0 _UL_(1 << 23) 1021 #define PIN_PB14E_SCIF_GCLK_IN0 _L_(46) /**< \brief SCIF signal: GCLK_IN0 on PB14 mux E */ 1022 #define MUX_PB14E_SCIF_GCLK_IN0 _L_(4) 1023 #define PINMUX_PB14E_SCIF_GCLK_IN0 ((PIN_PB14E_SCIF_GCLK_IN0 << 16) | MUX_PB14E_SCIF_GCLK_IN0) 1024 #define GPIO_PB14E_SCIF_GCLK_IN0 _UL_(1 << 14) 1025 #define PIN_PA24E_SCIF_GCLK_IN1 _L_(24) /**< \brief SCIF signal: GCLK_IN1 on PA24 mux E */ 1026 #define MUX_PA24E_SCIF_GCLK_IN1 _L_(4) 1027 #define PINMUX_PA24E_SCIF_GCLK_IN1 ((PIN_PA24E_SCIF_GCLK_IN1 << 16) | MUX_PA24E_SCIF_GCLK_IN1) 1028 #define GPIO_PA24E_SCIF_GCLK_IN1 _UL_(1 << 24) 1029 #define PIN_PB15E_SCIF_GCLK_IN1 _L_(47) /**< \brief SCIF signal: GCLK_IN1 on PB15 mux E */ 1030 #define MUX_PB15E_SCIF_GCLK_IN1 _L_(4) 1031 #define PINMUX_PB15E_SCIF_GCLK_IN1 ((PIN_PB15E_SCIF_GCLK_IN1 << 16) | MUX_PB15E_SCIF_GCLK_IN1) 1032 #define GPIO_PB15E_SCIF_GCLK_IN1 _UL_(1 << 15) 1033 /* ========== GPIO definition for EIC peripheral ========== */ 1034 #define PIN_PB01C_EIC_EXTINT0 _L_(33) /**< \brief EIC signal: EXTINT0 on PB01 mux C */ 1035 #define MUX_PB01C_EIC_EXTINT0 _L_(2) 1036 #define PINMUX_PB01C_EIC_EXTINT0 ((PIN_PB01C_EIC_EXTINT0 << 16) | MUX_PB01C_EIC_EXTINT0) 1037 #define GPIO_PB01C_EIC_EXTINT0 _UL_(1 << 1) 1038 #define PIN_PB01C_EIC_EXTINT_NUM _L_(0) /**< \brief EIC signal: PIN_PB01 External Interrupt Line */ 1039 #define PIN_PA06C_EIC_EXTINT1 _L_(6) /**< \brief EIC signal: EXTINT1 on PA06 mux C */ 1040 #define MUX_PA06C_EIC_EXTINT1 _L_(2) 1041 #define PINMUX_PA06C_EIC_EXTINT1 ((PIN_PA06C_EIC_EXTINT1 << 16) | MUX_PA06C_EIC_EXTINT1) 1042 #define GPIO_PA06C_EIC_EXTINT1 _UL_(1 << 6) 1043 #define PIN_PA06C_EIC_EXTINT_NUM _L_(1) /**< \brief EIC signal: PIN_PA06 External Interrupt Line */ 1044 #define PIN_PA16C_EIC_EXTINT1 _L_(16) /**< \brief EIC signal: EXTINT1 on PA16 mux C */ 1045 #define MUX_PA16C_EIC_EXTINT1 _L_(2) 1046 #define PINMUX_PA16C_EIC_EXTINT1 ((PIN_PA16C_EIC_EXTINT1 << 16) | MUX_PA16C_EIC_EXTINT1) 1047 #define GPIO_PA16C_EIC_EXTINT1 _UL_(1 << 16) 1048 #define PIN_PA16C_EIC_EXTINT_NUM _L_(1) /**< \brief EIC signal: PIN_PA16 External Interrupt Line */ 1049 #define PIN_PA04C_EIC_EXTINT2 _L_(4) /**< \brief EIC signal: EXTINT2 on PA04 mux C */ 1050 #define MUX_PA04C_EIC_EXTINT2 _L_(2) 1051 #define PINMUX_PA04C_EIC_EXTINT2 ((PIN_PA04C_EIC_EXTINT2 << 16) | MUX_PA04C_EIC_EXTINT2) 1052 #define GPIO_PA04C_EIC_EXTINT2 _UL_(1 << 4) 1053 #define PIN_PA04C_EIC_EXTINT_NUM _L_(2) /**< \brief EIC signal: PIN_PA04 External Interrupt Line */ 1054 #define PIN_PA17C_EIC_EXTINT2 _L_(17) /**< \brief EIC signal: EXTINT2 on PA17 mux C */ 1055 #define MUX_PA17C_EIC_EXTINT2 _L_(2) 1056 #define PINMUX_PA17C_EIC_EXTINT2 ((PIN_PA17C_EIC_EXTINT2 << 16) | MUX_PA17C_EIC_EXTINT2) 1057 #define GPIO_PA17C_EIC_EXTINT2 _UL_(1 << 17) 1058 #define PIN_PA17C_EIC_EXTINT_NUM _L_(2) /**< \brief EIC signal: PIN_PA17 External Interrupt Line */ 1059 #define PIN_PA05C_EIC_EXTINT3 _L_(5) /**< \brief EIC signal: EXTINT3 on PA05 mux C */ 1060 #define MUX_PA05C_EIC_EXTINT3 _L_(2) 1061 #define PINMUX_PA05C_EIC_EXTINT3 ((PIN_PA05C_EIC_EXTINT3 << 16) | MUX_PA05C_EIC_EXTINT3) 1062 #define GPIO_PA05C_EIC_EXTINT3 _UL_(1 << 5) 1063 #define PIN_PA05C_EIC_EXTINT_NUM _L_(3) /**< \brief EIC signal: PIN_PA05 External Interrupt Line */ 1064 #define PIN_PA18C_EIC_EXTINT3 _L_(18) /**< \brief EIC signal: EXTINT3 on PA18 mux C */ 1065 #define MUX_PA18C_EIC_EXTINT3 _L_(2) 1066 #define PINMUX_PA18C_EIC_EXTINT3 ((PIN_PA18C_EIC_EXTINT3 << 16) | MUX_PA18C_EIC_EXTINT3) 1067 #define GPIO_PA18C_EIC_EXTINT3 _UL_(1 << 18) 1068 #define PIN_PA18C_EIC_EXTINT_NUM _L_(3) /**< \brief EIC signal: PIN_PA18 External Interrupt Line */ 1069 #define PIN_PA07C_EIC_EXTINT4 _L_(7) /**< \brief EIC signal: EXTINT4 on PA07 mux C */ 1070 #define MUX_PA07C_EIC_EXTINT4 _L_(2) 1071 #define PINMUX_PA07C_EIC_EXTINT4 ((PIN_PA07C_EIC_EXTINT4 << 16) | MUX_PA07C_EIC_EXTINT4) 1072 #define GPIO_PA07C_EIC_EXTINT4 _UL_(1 << 7) 1073 #define PIN_PA07C_EIC_EXTINT_NUM _L_(4) /**< \brief EIC signal: PIN_PA07 External Interrupt Line */ 1074 #define PIN_PA19C_EIC_EXTINT4 _L_(19) /**< \brief EIC signal: EXTINT4 on PA19 mux C */ 1075 #define MUX_PA19C_EIC_EXTINT4 _L_(2) 1076 #define PINMUX_PA19C_EIC_EXTINT4 ((PIN_PA19C_EIC_EXTINT4 << 16) | MUX_PA19C_EIC_EXTINT4) 1077 #define GPIO_PA19C_EIC_EXTINT4 _UL_(1 << 19) 1078 #define PIN_PA19C_EIC_EXTINT_NUM _L_(4) /**< \brief EIC signal: PIN_PA19 External Interrupt Line */ 1079 #define PIN_PA20C_EIC_EXTINT5 _L_(20) /**< \brief EIC signal: EXTINT5 on PA20 mux C */ 1080 #define MUX_PA20C_EIC_EXTINT5 _L_(2) 1081 #define PINMUX_PA20C_EIC_EXTINT5 ((PIN_PA20C_EIC_EXTINT5 << 16) | MUX_PA20C_EIC_EXTINT5) 1082 #define GPIO_PA20C_EIC_EXTINT5 _UL_(1 << 20) 1083 #define PIN_PA20C_EIC_EXTINT_NUM _L_(5) /**< \brief EIC signal: PIN_PA20 External Interrupt Line */ 1084 #define PIN_PA21C_EIC_EXTINT6 _L_(21) /**< \brief EIC signal: EXTINT6 on PA21 mux C */ 1085 #define MUX_PA21C_EIC_EXTINT6 _L_(2) 1086 #define PINMUX_PA21C_EIC_EXTINT6 ((PIN_PA21C_EIC_EXTINT6 << 16) | MUX_PA21C_EIC_EXTINT6) 1087 #define GPIO_PA21C_EIC_EXTINT6 _UL_(1 << 21) 1088 #define PIN_PA21C_EIC_EXTINT_NUM _L_(6) /**< \brief EIC signal: PIN_PA21 External Interrupt Line */ 1089 #define PIN_PA22C_EIC_EXTINT7 _L_(22) /**< \brief EIC signal: EXTINT7 on PA22 mux C */ 1090 #define MUX_PA22C_EIC_EXTINT7 _L_(2) 1091 #define PINMUX_PA22C_EIC_EXTINT7 ((PIN_PA22C_EIC_EXTINT7 << 16) | MUX_PA22C_EIC_EXTINT7) 1092 #define GPIO_PA22C_EIC_EXTINT7 _UL_(1 << 22) 1093 #define PIN_PA22C_EIC_EXTINT_NUM _L_(7) /**< \brief EIC signal: PIN_PA22 External Interrupt Line */ 1094 #define PIN_PA23C_EIC_EXTINT8 _L_(23) /**< \brief EIC signal: EXTINT8 on PA23 mux C */ 1095 #define MUX_PA23C_EIC_EXTINT8 _L_(2) 1096 #define PINMUX_PA23C_EIC_EXTINT8 ((PIN_PA23C_EIC_EXTINT8 << 16) | MUX_PA23C_EIC_EXTINT8) 1097 #define GPIO_PA23C_EIC_EXTINT8 _UL_(1 << 23) 1098 #define PIN_PA23C_EIC_EXTINT_NUM _L_(8) /**< \brief EIC signal: PIN_PA23 External Interrupt Line */ 1099 1100 #endif /* _SAM4LS2B_PIO_ */ 1101
