1 //***************************************************************************** 2 // 3 //! @file am_hal_usbregs.h 4 //! 5 //! @brief CMSIS-style register definitions for the USB registers. 6 //! 7 // 8 //! The Ambiq USB implementation is 8-bit oriented, yet multiple USB registers 9 //! are packed into 32-bit registers. Also, many of the USB aregisters have 10 //! read or write side-effects. Therefore many of the registers must be byte 11 //! accessed as reading the entire 32-bits would trigger the side-effects of 12 //! registers that are not even of interest. 13 //! 14 //! Given all that, and that CMSIS generated registers are 32-bit oriented, 15 //! this CMSIS-like register structure is implemented. 16 //! 17 //! Thus we define the USB registers such that the compilers will access each 18 //! register with an appropriate sized access. e.g. 8-bit registers will be 19 //! accessed as bytes and 16-bit registers as half-words, etc. 20 //! 21 //! 22 //! Usage of the USB registers is very similar to CMSIS access. 23 //! Some simple usage examples: 24 //! 25 //! uint8_t ui32Faddr = 0x1234; 26 //! USBHAL->FADDR = ui32Faddr; 27 //! 28 //! if ( USBHAL->CSR0_b.OutPktRdy ) { do stuff }; 29 //! 30 //! if ( USBHAL->COUNT0_b.Count0 == 0x4 ) { do stuff }; 31 //! 32 //! USBHAL->INTRUSBen_b.SOF = 1; 33 //! 34 //! @addtogroup usb_regs_4p USBRREGS - USB Register Functionality 35 //! @ingroup apollo4p_hal 36 //! @{ 37 // 38 //***************************************************************************** 39 40 //***************************************************************************** 41 // 42 // Copyright (c) 2023, Ambiq Micro, Inc. 43 // All rights reserved. 44 // 45 // Redistribution and use in source and binary forms, with or without 46 // modification, are permitted provided that the following conditions are met: 47 // 48 // 1. Redistributions of source code must retain the above copyright notice, 49 // this list of conditions and the following disclaimer. 50 // 51 // 2. Redistributions in binary form must reproduce the above copyright 52 // notice, this list of conditions and the following disclaimer in the 53 // documentation and/or other materials provided with the distribution. 54 // 55 // 3. Neither the name of the copyright holder nor the names of its 56 // contributors may be used to endorse or promote products derived from this 57 // software without specific prior written permission. 58 // 59 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 60 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 63 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 64 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 65 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 66 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 67 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 68 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 69 // POSSIBILITY OF SUCH DAMAGE. 70 // 71 // This is part of revision release_sdk_4_4_0-3c5977e664 of the AmbiqSuite Development Package. 72 // 73 //***************************************************************************** 74 75 #ifndef AM_HAL_USBREGS_H 76 #define AM_HAL_USBREGS_H 77 78 #ifdef __cplusplus 79 extern "C" 80 { 81 #endif 82 83 //***************************************************************************** 84 // 85 //! This anonymous union handling is taken right from the CMSIS generated file. 86 // 87 //***************************************************************************** 88 #if defined (__CC_ARM) 89 #pragma push 90 #pragma anon_unions 91 #elif defined (__ICCARM__) 92 #pragma language = extended 93 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 94 #pragma clang diagnostic push 95 #pragma clang diagnostic ignored "-Wc11-extensions" 96 #pragma clang diagnostic ignored "-Wreserved-id-macro" 97 #pragma clang diagnostic ignored "-Wgnu-anonymous-struct" 98 #pragma clang diagnostic ignored "-Wnested-anon-types" 99 #elif defined (__GNUC__) 100 /* anonymous unions are enabled by default */ 101 #elif defined (__TMS470__) 102 /* anonymous unions are enabled by default */ 103 #elif defined (__TASKING__) 104 #pragma warning 586 105 #elif defined (__CSMC__) 106 /* anonymous unions are enabled by default */ 107 #else 108 #warning Not supported compiler type 109 #endif 110 111 //***************************************************************************** 112 // 113 //! Ambiq USB registers 114 // 115 //***************************************************************************** 116 typedef struct 117 { 118 //! CFG0 119 union 120 { 121 __IOM uint32_t CFG0; //32bit 122 struct 123 { 124 struct 125 { // 0x0 126 __IOM uint8_t FuncAddr : 7; 127 __IM uint8_t Update : 1; 128 } FADDR_b; 129 struct 130 { // 0x1 131 __IOM uint8_t EnableSuspendM : 1; 132 __IM uint8_t SuspendMode : 1; 133 __IOM uint8_t Resume : 1; 134 __IM uint8_t Reset : 1; 135 __IM uint8_t HSMode : 1; 136 __IOM uint8_t HSEnable : 1; 137 __IOM uint8_t VersionSpecific : 1; 138 __IOM uint8_t ISOUpdate : 1; 139 } POWER_b; 140 union 141 { 142 __IOM uint16_t INTRIN; // 0x2,3 143 struct 144 { 145 __IOM uint16_t EP0 : 1; 146 __IOM uint16_t EP1 : 1; 147 __IOM uint16_t EP2 : 1; 148 __IOM uint16_t EP3 : 1; 149 __IOM uint16_t EP4 : 1; 150 __IOM uint16_t EP5 : 1; 151 __IM uint16_t RSVD : 10; 152 } INTRIN_b; 153 }; 154 }; 155 }; 156 157 //! CFG1 158 union 159 { 160 __IOM uint32_t CFG1; //32bit 161 struct 162 { 163 union 164 { 165 __IOM uint16_t INTROUT; // 0x4,5 166 struct 167 { 168 __IOM uint16_t EP0 : 1; 169 __IOM uint16_t EP1 : 1; 170 __IOM uint16_t EP2 : 1; 171 __IOM uint16_t EP3 : 1; 172 __IOM uint16_t EP4 : 1; 173 __IOM uint16_t EP5 : 1; 174 __IM uint16_t RSVD : 10; 175 } INTROUT_b; 176 }; 177 union 178 { 179 __IOM uint16_t INTRINE; // 0x6,7 180 struct 181 { 182 __IOM uint16_t EP0 : 1; 183 __IOM uint16_t EP1 : 1; 184 __IOM uint16_t EP2 : 1; 185 __IOM uint16_t EP3 : 1; 186 __IOM uint16_t EP4 : 1; 187 __IOM uint16_t EP5 : 1; 188 __IM uint16_t RSVD : 10; 189 } INTRINE_b; 190 }; 191 }; 192 }; 193 194 //! CFG2 195 union 196 { 197 __IOM uint32_t CFG2; //32bit 198 struct 199 { 200 union 201 { 202 __IOM uint16_t INTROUTE; // 0x8,9 203 struct 204 { 205 __IOM uint16_t EP0 : 1; 206 __IOM uint16_t EP1 : 1; 207 __IOM uint16_t EP2 : 1; 208 __IOM uint16_t EP3 : 1; 209 __IOM uint16_t EP4 : 1; 210 __IOM uint16_t EP5 : 1; 211 __IM uint16_t RSVD : 10; 212 } INTROUTE_b; 213 }; 214 union 215 { 216 __IOM uint8_t INTRUSB; // 0xA 217 struct 218 { 219 __IM uint8_t Suspend : 1; 220 __IM uint8_t Resume : 1; 221 __IM uint8_t Reset : 1; 222 __IM uint8_t SOF : 1; 223 __IM uint8_t RSVD : 4; 224 } INTRUSB_b; 225 }; 226 union 227 { 228 __IOM uint8_t INTRUSBE; // 0xB 229 struct 230 { 231 __IOM uint8_t Suspend : 1; 232 __IOM uint8_t Resume : 1; 233 __IOM uint8_t Reset : 1; 234 __IOM uint8_t SOF : 1; 235 __IM uint8_t RSVD : 4; 236 } INTRUSBE_b; 237 }; 238 }; 239 }; 240 241 //! CFG3 242 union 243 { 244 __IOM uint32_t CFG3; //32bit 245 struct 246 { 247 struct 248 { // 0xC,D 249 __IOM uint16_t FrameNumber : 11; 250 __IM uint16_t RSVD : 5; 251 } FRAME_b; 252 struct 253 { // 0xE 254 __IOM uint8_t EndPoint : 4; 255 __IM uint8_t RSVD : 4; 256 } INDEX_b; 257 struct 258 { // 0xF 259 __IOM uint8_t TestSE0NAK : 1; 260 __IOM uint8_t TestJ : 1; 261 __IOM uint8_t TestK : 1; 262 __IOM uint8_t TestPacket : 1; 263 __IOM uint8_t ForceHS : 1; 264 __IOM uint8_t ForceFS : 1; 265 __IM uint8_t RSVD : 2; 266 } TESTMODE_b; 267 }; 268 }; 269 270 //! IDX0 271 union 272 { 273 __IOM uint32_t IDX0; //32bit 274 struct 275 { 276 struct // 0x10 277 { 278 __IOM uint16_t MaxPayload : 11; 279 __IOM uint16_t SplitMultiplier : 5; 280 } INMAXP_b; 281 union // 0x12 282 { 283 struct 284 { 285 __IOM uint8_t OutPktRdy : 1; 286 __IOM uint8_t InPktRdy : 1; 287 __IOM uint8_t SentStall : 1; 288 __IOM uint8_t DataEnd : 1; 289 __IOM uint8_t SetupEnd : 1; 290 __IOM uint8_t SendStall : 1; 291 __IOM uint8_t ServicedOutPktRdy : 1; 292 __IOM uint8_t ServicedSetupEnd : 1; 293 } CSR0_b; 294 struct 295 { 296 __IOM uint8_t InPktRdy : 1; 297 __IOM uint8_t FIFONotEmpty : 1; 298 __IOM uint8_t UnderRun : 1; 299 __IOM uint8_t FlushFIFO : 1; 300 __IOM uint8_t SendStall : 1; 301 __IOM uint8_t SentStall : 1; 302 __IOM uint8_t ClrDataTog : 1; 303 __IOM uint8_t IncompTx : 1; 304 } INCSRL_b; 305 }; 306 struct // 0x13 307 { 308 __IOM uint8_t Unused : 1; 309 __IOM uint8_t DPktBufDis : 1; 310 __IOM uint8_t DMAReqMode : 1; 311 __IOM uint8_t FrcDataTog : 1; 312 __IOM uint8_t DMAReqEnab : 1; 313 __IOM uint8_t Mode : 1; 314 __IOM uint8_t ISO : 1; 315 __IOM uint8_t AutoSet : 1; 316 } INCSRU_b; 317 }; 318 }; 319 320 //! IDX1 321 union 322 { 323 __IOM uint32_t IDX1; //32bit 324 struct 325 { 326 struct 327 { // 0x14-0x15 328 __IOM uint16_t MaxPayload : 11; 329 __IOM uint16_t CombineMultiplier : 5; 330 } OUTMAXP_b; 331 struct 332 { // 0x16 333 __IOM uint8_t OutPktRdy : 1; 334 __IOM uint8_t FIFOFull : 1; 335 __IOM uint8_t OverRun : 1; 336 __IOM uint8_t DataError : 1; 337 __IOM uint8_t FlushFIFO : 1; 338 __IOM uint8_t SendStall : 1; 339 __IOM uint8_t SentStall : 1; 340 __IOM uint8_t ClrDataTog : 1; 341 } OUTCSRL_b; 342 struct 343 { // 0x17 344 __IOM uint8_t IncompRx : 1; 345 __IOM uint8_t DPktBufDis : 1; 346 __IOM uint8_t Unused : 1; 347 __IOM uint8_t DMAReqMode : 1; 348 __IOM uint8_t DisNyetPIDError : 1; 349 __IOM uint8_t DMAReqEnab : 1; 350 __IOM uint8_t ISO : 1; 351 __IOM uint8_t AutoClear : 1; 352 } OUTCSRU_b; 353 }; 354 }; 355 356 //! IDX2 357 union 358 { 359 __IOM uint32_t IDX2; 360 struct 361 { 362 union 363 { 364 struct 365 { // 0x18 366 __IOM uint8_t COUNT0 : 7; 367 __IM uint8_t Pad : 1; 368 } COUNT0_b; 369 struct 370 { // 0x18 371 __IOM uint16_t OUTCOUNT : 13; 372 __IM uint16_t Pad : 3; 373 } OUTCOUNT_b; 374 }; 375 struct 376 { // 0x1a 377 __IM uint8_t Unused : 3; 378 __IOM uint8_t DPB : 1; 379 __IOM uint8_t InFIFOsz : 4; 380 } InFIFOsz_b; 381 struct 382 { // 0x1b 383 __IM uint8_t Unused : 3; 384 __IOM uint8_t DPB : 1; 385 __IOM uint8_t OutFIFOsz : 4; 386 } OutFIFOsz_b; 387 }; 388 }; 389 390 //! In FIFO Address 391 struct 392 { // 0x1c 393 __IM uint16_t Unused : 2; 394 __IM uint16_t Reserved : 1; 395 __IOM uint16_t InFIFOAddr : 13; 396 } InFIFOAddr_b; 397 398 //! Out FIFO Address 399 struct 400 { //0x1e 401 __IM uint16_t Unused : 2; 402 __IM uint16_t Reserved : 1; 403 __IOM uint16_t OutFIFOAddr : 13; 404 } OutFIFOAddr_b; 405 406 //! FIFOx 407 __IOM uint32_t FIFOx[6]; // 0x20 - 0x34 408 409 //! RESERVED 410 __IM uint32_t RESERVED[13]; 411 412 //! HWVERS 413 union 414 { 415 __IOM uint32_t HWVERS; // 0x6C 416 struct 417 { 418 __IOM uint32_t yyy : 10; 419 __IOM uint32_t xx : 5; 420 __IOM uint32_t RC : 1; 421 } HWVERS_b; 422 }; 423 424 //! RESERVED1 425 __IM uint32_t RESERVED1[2]; 426 427 //! INFO 428 union 429 { 430 __IOM uint32_t INFO; // 0x78 431 struct 432 { 433 __IOM uint32_t InEndPoints : 4; 434 __IOM uint32_t OutEndPoints : 4; 435 __IOM uint32_t RamBits : 4; 436 __IOM uint32_t DMAChains : 4; 437 __IOM uint32_t RSTS : 1; 438 __IM uint32_t : 6; 439 __IOM uint32_t EDMAOUT : 1; 440 __IOM uint32_t EDMAIN : 1; 441 } INFO_b; 442 }; 443 444 //! RESERVED2 445 __IM uint32_t RESERVED2; 446 447 //! TIMEOUT1 448 union 449 { 450 __IOM uint32_t TIMEOUT1; // 0x80 451 struct 452 { 453 __IOM uint32_t CTUCH : 16; 454 } TIMEOUT1_b; 455 }; 456 457 //! TIMEOUT2 458 union 459 { 460 __IOM uint32_t TIMEOUT2; //0x84 461 struct 462 { 463 __IOM uint32_t CTHRSTN : 16; 464 } TIMEOUT2_b; 465 }; 466 467 //! RESERVED3 468 __IM uint32_t RESERVED3[2014]; 469 470 //! CLKCTRL 471 union 472 { 473 __IOM uint32_t CLKCTRL; //0x2000 474 struct 475 { 476 __IOM uint32_t PHYREFCLKDIS : 1; 477 __IM uint32_t : 7; 478 __IOM uint32_t CTRLAPBCLKDIS : 1; 479 __IM uint32_t : 7; 480 __IOM uint32_t PHYAPBLCLKDIS : 1; 481 } CLKCTRL_b; 482 }; 483 484 //! SRAMCTRL 485 union 486 { 487 __IOM uint32_t SRAMCTRL; // 0x2004 488 struct 489 { 490 __IOM uint32_t RET1N : 1; 491 __IOM uint32_t EMA : 3; 492 __IOM uint32_t EMAS : 1; 493 __IOM uint32_t EMAW : 2; 494 __IOM uint32_t RAWLM : 2; 495 __IOM uint32_t RAWL : 1; 496 __IOM uint32_t WABLM : 3; 497 __IOM uint32_t WABL : 1; 498 __IOM uint32_t STOV : 1; 499 } SRAMCTRL_b; 500 }; 501 502 //! RESERVED4 503 __IM uint32_t RESERVED4[3]; 504 505 //! UTMISTICKYSTATUS 506 union 507 { 508 __IOM uint32_t UTMISTICKYSTATUS; //0x2014 509 struct 510 { 511 __IOM uint32_t obsportstciky : 2; 512 } UTMISTICKYSTATUS_b; 513 }; 514 515 //! OBSCLRSTAT 516 union 517 { 518 __IOM uint32_t OBSCLRSTAT; 519 struct 520 { 521 __IOM uint32_t CLRSTAT : 1; 522 } OBSCLRSTAT_b; 523 }; 524 525 //! DPDMPULLDOWN 526 union 527 { 528 __IOM uint32_t DPDMPULLDOWN; 529 struct 530 { 531 __IOM uint32_t DMPULLDOWN : 1; 532 __IOM uint32_t DPPULLDOWN : 1; 533 } DPDMPULLDOWN_b; 534 }; 535 } USBHAL_Type; 536 537 //***************************************************************************** 538 // 539 //! This anonymous union handling is taken right from the CMSIS generated file. 540 // 541 //***************************************************************************** 542 #if defined (__CC_ARM) 543 #pragma pop 544 #elif defined (__ICCARM__) 545 /* leave anonymous unions enabled */ 546 #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) 547 #pragma clang diagnostic pop 548 #elif defined (__GNUC__) 549 /* anonymous unions are enabled by default */ 550 #elif defined (__TMS470__) 551 /* anonymous unions are enabled by default */ 552 #elif defined (__TASKING__) 553 #pragma warning restore 554 #elif defined (__CSMC__) 555 /* anonymous unions are enabled by default */ 556 #endif 557 558 //***************************************************************************** 559 // 560 //! USB Peripheral declaration 561 // 562 //***************************************************************************** 563 #define USBHAL ((USBHAL_Type*) ((uint8_t*)(USB_BASE))) 564 565 #ifdef __cplusplus 566 } 567 #endif 568 569 #endif // AM_HAL_USBREGS_H 570 571 //***************************************************************************** 572 // 573 // End Doxygen group. 574 //! @} 575 // 576 //***************************************************************************** 577 578
