1 //*****************************************************************************
2 //
3 //! @file am_hal_pdm.h
4 //!
5 //! @brief HAL implementation for the Pulse Density Modulation module.
6 //!
7 //! @addtogroup pdm_4p PDM - Pulse Density Modulation
8 //! @ingroup apollo4p_hal
9 //! @{
10 //
11 //*****************************************************************************
12 
13 //*****************************************************************************
14 //
15 // Copyright (c) 2023, Ambiq Micro, Inc.
16 // All rights reserved.
17 //
18 // Redistribution and use in source and binary forms, with or without
19 // modification, are permitted provided that the following conditions are met:
20 //
21 // 1. Redistributions of source code must retain the above copyright notice,
22 // this list of conditions and the following disclaimer.
23 //
24 // 2. Redistributions in binary form must reproduce the above copyright
25 // notice, this list of conditions and the following disclaimer in the
26 // documentation and/or other materials provided with the distribution.
27 //
28 // 3. Neither the name of the copyright holder nor the names of its
29 // contributors may be used to endorse or promote products derived from this
30 // software without specific prior written permission.
31 //
32 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
33 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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39 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
40 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
41 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 // POSSIBILITY OF SUCH DAMAGE.
43 //
44 // This is part of revision release_sdk_4_4_0-3c5977e664 of the AmbiqSuite Development Package.
45 //
46 //*****************************************************************************
47 
48 #ifndef AM_HAL_PDM_H
49 #define AM_HAL_PDM_H
50 
51 #ifdef __cplusplus
52 extern "C"
53 {
54 #endif
55 
56 //*****************************************************************************
57 //
58 //! CMSIS-style macro for handling a variable IOS module number.
59 //
60 //*****************************************************************************
61 #define AM_REG_PDM_NUM_MODULES                       4
62 #define PDMn(n) ((PDM0_Type*)(PDM0_BASE + (n * (PDM1_BASE - PDM0_BASE))))
63 
64 //*****************************************************************************
65 //
66 //! DMA threshold minimum.
67 //
68 //! The PDM DMA works best if its threshold value is set to a multiple of 4
69 //! between 16 and 24, but it will technically allow threshold settings between
70 //! 4 and 24. This macro sets the minimum threshold value that the HAL layer
71 //! will allow.
72 //
73 //*****************************************************************************
74 #define AM_HAL_PDM_DMA_THRESHOLD_MIN        16
75 
76 //*****************************************************************************
77 //
78 //! PDM-specific error conditions.
79 //
80 //*****************************************************************************
81 typedef enum
82 {
83     //
84     //! The PDM HAL will throw this error if it can't find a threshold value to
85     //! match the total-count value passed in by a caller requesting a DMA
86     //! transfer. The PDM hardware requires all DMA transactions to be evenly
87     //! divisible in chunks of one FIFO size or smaller. Try changing your
88     //! ui32TotalCount value to a more evenly divisible number.
89     //
90     AM_HAL_PDM_STATUS_BAD_TOTALCOUNT = AM_HAL_STATUS_MODULE_SPECIFIC_START,
91 }
92 am_hal_pdm_status_e;
93 
94 //*****************************************************************************
95 //
96 //! Gain settings.
97 //
98 //*****************************************************************************
99 typedef enum
100 {
101     AM_HAL_PDM_GAIN_P345DB = 0x1F,
102     AM_HAL_PDM_GAIN_P330DB = 0x1E,
103     AM_HAL_PDM_GAIN_P315DB = 0x1D,
104     AM_HAL_PDM_GAIN_P300DB = 0x1C,
105     AM_HAL_PDM_GAIN_P285DB = 0x1B,
106     AM_HAL_PDM_GAIN_P270DB = 0x1A,
107     AM_HAL_PDM_GAIN_P255DB = 0x19,
108     AM_HAL_PDM_GAIN_P240DB = 0x18,
109     AM_HAL_PDM_GAIN_P225DB = 0x17,
110     AM_HAL_PDM_GAIN_P210DB = 0x16,
111     AM_HAL_PDM_GAIN_P195DB = 0x15,
112     AM_HAL_PDM_GAIN_P180DB = 0x14,
113     AM_HAL_PDM_GAIN_P165DB = 0x13,
114     AM_HAL_PDM_GAIN_P150DB = 0x12,
115     AM_HAL_PDM_GAIN_P135DB = 0x11,
116     AM_HAL_PDM_GAIN_P120DB = 0x10,
117     AM_HAL_PDM_GAIN_P105DB = 0x0F,
118     AM_HAL_PDM_GAIN_P90DB  = 0x0E,
119     AM_HAL_PDM_GAIN_P75DB  = 0x0D,
120     AM_HAL_PDM_GAIN_P60DB  = 0x0C,
121     AM_HAL_PDM_GAIN_P45DB  = 0x0B,
122     AM_HAL_PDM_GAIN_P30DB  = 0x0A,
123     AM_HAL_PDM_GAIN_P15DB  = 0x09,
124     AM_HAL_PDM_GAIN_0DB    = 0x08,
125     AM_HAL_PDM_GAIN_M15DB  = 0x07,
126     AM_HAL_PDM_GAIN_M30DB  = 0x06,
127     AM_HAL_PDM_GAIN_M45DB  = 0x05,
128     AM_HAL_PDM_GAIN_M60DB  = 0x04,
129     AM_HAL_PDM_GAIN_M75DB  = 0x03,
130     AM_HAL_PDM_GAIN_M90DB  = 0x02,
131     AM_HAL_PDM_GAIN_M105DB = 0x01,
132     AM_HAL_PDM_GAIN_M120DB = 0x00
133 }
134 am_hal_pdm_gain_e;
135 
136 //*****************************************************************************
137 //
138 //! gain step size.
139 //
140 //*****************************************************************************
141 // FIXME - CORECFG1 SELSTEP Enums missing.
142 typedef enum
143 {
144   AM_HAL_PDM_GAIN_STEP_0_13DB = 0,
145   AM_HAL_PDM_GAIN_STEP_0_26DB = 1
146 }
147 am_hal_pdm_gain_stepsize_e;
148 
149 //*****************************************************************************
150 //
151 //! high pass filter enable/disable.
152 //
153 //*****************************************************************************
154 typedef enum
155 {
156   AM_HAL_PDM_HIGH_PASS_ENABLE = 0,
157   AM_HAL_PDM_HIGH_PASS_DISABLE = 1
158 }
159 am_hal_pdm_highpass_filter_onoff_e;
160 
161 //*****************************************************************************
162 //
163 //! PDM internal clock speed selection.
164 //
165 //*****************************************************************************
166 typedef enum
167 {
168     AM_HAL_PDM_CLK_HFRC2ADJ_24_576MHZ   = 0,
169     AM_HAL_PDM_CLK_HFXTAL               = 1,
170     AM_HAL_PDM_CLK_HFRC_24MHZ           = 2
171 }
172 am_hal_pdm_clkspd_e;
173 
174 //*****************************************************************************
175 //
176 //! PDM clock divider setting.
177 //! DIVMCLKQ REG_PDM_CORECFG1(3:2)
178 //! Divide down ratio for generating internal master MCLKQ.
179 //! Fmclkq = Fpdmclk/(DIVMCLKQ) if DIVMCLKQ > 0;
180 //
181 //*****************************************************************************
182 typedef enum
183 {
184     AM_HAL_PDM_MCLKDIV_3 = 3,
185     AM_HAL_PDM_MCLKDIV_2 = 2,
186     AM_HAL_PDM_MCLKDIV_1 = 1,
187 }
188 am_hal_pdm_mclkdiv_e;
189 
190 //*****************************************************************************
191 //
192 //! PDMA_CKO frequency divisor. Fpdma_cko = Fmclk_l/(MCLKDIV+1)
193 //
194 //*****************************************************************************
195 typedef enum
196 {
197     AM_HAL_PDM_PDMA_CLKO_DIV15 = 0xF,
198     AM_HAL_PDM_PDMA_CLKO_DIV14 = 0xE,
199     AM_HAL_PDM_PDMA_CLKO_DIV13 = 0xD,
200     AM_HAL_PDM_PDMA_CLKO_DIV12 = 0xC,
201     AM_HAL_PDM_PDMA_CLKO_DIV11 = 0xB,
202     AM_HAL_PDM_PDMA_CLKO_DIV10 = 0xA,
203     AM_HAL_PDM_PDMA_CLKO_DIV9  = 0x9,
204     AM_HAL_PDM_PDMA_CLKO_DIV8  = 0x8,
205     AM_HAL_PDM_PDMA_CLKO_DIV7  = 0x7,
206     AM_HAL_PDM_PDMA_CLKO_DIV6  = 0x6,
207     AM_HAL_PDM_PDMA_CLKO_DIV5  = 0x5,
208     AM_HAL_PDM_PDMA_CLKO_DIV4  = 0x4,
209     AM_HAL_PDM_PDMA_CLKO_DIV3  = 0x3,
210     AM_HAL_PDM_PDMA_CLKO_DIV2  = 0x2,
211     AM_HAL_PDM_PDMA_CLKO_DIV1  = 0x1,
212     AM_HAL_PDM_PDMA_CLKO_DIV0  = 0x1,   // setting DIV0 is prohibited
213 }
214 am_hal_pdm_pdma_clkodiv_e;
215 
216 //*****************************************************************************
217 //
218 //! PDMA_CKO clock phase delay in terms of PDMCLK period to internal sampler
219 //
220 //*****************************************************************************
221 typedef enum
222 {
223     AM_HAL_PDM_CLKOUT_PHSDLY_CYCLE7 = 7,
224     AM_HAL_PDM_CLKOUT_PHSDLY_CYCLE6 = 6,
225     AM_HAL_PDM_CLKOUT_PHSDLY_CYCLE5 = 5,
226     AM_HAL_PDM_CLKOUT_PHSDLY_CYCLE4 = 4,
227     AM_HAL_PDM_CLKOUT_PHSDLY_CYCLE3 = 3,
228     AM_HAL_PDM_CLKOUT_PHSDLY_CYCLE2 = 2,
229     AM_HAL_PDM_CLKOUT_PHSDLY_CYCLE1 = 1,
230     AM_HAL_PDM_CLKOUT_PHSDLY_NONE   = 0
231 }
232 am_hal_pdm_clkout_phsdly_e;
233 
234 //*****************************************************************************
235 //
236 //! Set number of PDMA_CKO cycles during gain setting changes or soft mute
237 //
238 //*****************************************************************************
239 typedef enum
240 {
241     AM_HAL_PDM_CLKOUT_DELAY_CYCLE7 = 7,
242     AM_HAL_PDM_CLKOUT_DELAY_CYCLE6 = 6,
243     AM_HAL_PDM_CLKOUT_DELAY_CYCLE5 = 5,
244     AM_HAL_PDM_CLKOUT_DELAY_CYCLE4 = 4,
245     AM_HAL_PDM_CLKOUT_DELAY_CYCLE3 = 3,
246     AM_HAL_PDM_CLKOUT_DELAY_CYCLE2 = 2,
247     AM_HAL_PDM_CLKOUT_DELAY_CYCLE1 = 1,
248     AM_HAL_PDM_CLKOUT_DELAY_NONE   = 0
249 }
250 am_hal_pdm_clkout_delay_e;
251 
252 //*****************************************************************************
253 //
254 //! PCM Channel Select.
255 //
256 //*****************************************************************************
257 typedef enum
258 {
259     AM_HAL_PDM_CHANNEL_LEFT   = PDM0_CORECFG1_PCMCHSET_MONOL,
260     AM_HAL_PDM_CHANNEL_RIGHT  = PDM0_CORECFG1_PCMCHSET_MONOR,
261     AM_HAL_PDM_CHANNEL_STEREO = PDM0_CORECFG1_PCMCHSET_STEREO,
262 }
263 am_hal_pdm_chset_e;
264 
265 //*****************************************************************************
266 //
267 //! @name PDM power state settings.
268 //! @{
269 //
270 //*****************************************************************************
271 #define AM_HAL_PDM_POWER_ON           AM_HAL_SYSCTRL_WAKE
272 #define AM_HAL_PDM_POWER_OFF          AM_HAL_SYSCTRL_NORMALSLEEP
273 //
274 //! @}
275 //
276 
277 //*****************************************************************************
278 //
279 //! @name PDM interrupts.
280 //! @{
281 //
282 //*****************************************************************************
283 #define AM_HAL_PDM_INT_DERR           PDM0_INTSTAT_DERR_Msk
284 #define AM_HAL_PDM_INT_DCMP           PDM0_INTSTAT_DCMP_Msk
285 #define AM_HAL_PDM_INT_UNDFL          PDM0_INTSTAT_UNDFL_Msk
286 #define AM_HAL_PDM_INT_OVF            PDM0_INTSTAT_OVF_Msk
287 #define AM_HAL_PDM_INT_THR            PDM0_INTSTAT_THR_Msk
288 //
289 //! @}
290 //
291 
292 //*****************************************************************************
293 //
294 //! @name PDM DMA STATE.
295 //! @{
296 //
297 //*****************************************************************************
298 #define AM_HAL_PDM_DMASTAT_DMATIP     PDM0_DMASTAT_DMATIP_Msk
299 #define AM_HAL_PDM_DMASTAT_DCMP       PDM0_DMASTAT_DMACPL_Msk
300 #define AM_HAL_PDM_DMASTAT_DMAERR     PDM0_DMASTAT_DMAERR_Msk
301 //
302 //! @}
303 //
304 
305 //*****************************************************************************
306 //
307 //! Configuration structure for the PDM
308 //
309 //*****************************************************************************
310 typedef struct
311 {
312     //
313     // Clock
314     //
315     //! ide down ratio for generating internal master MCLKQ.
316     am_hal_pdm_mclkdiv_e eClkDivider;
317 
318     //! PDMA_CKO frequency divisor.Fpdma_cko = Fmclk_l/(MCLKDIV+1)
319     am_hal_pdm_pdma_clkodiv_e ePDMAClkOutDivder ;
320 
321     //! Gain
322     am_hal_pdm_gain_e eLeftGain;
323     am_hal_pdm_gain_e eRightGain;
324 
325     //! Fine grain step size for smooth PGA or Softmute attenuation
326     //! transition0: 0.13dB1: 0.26dB
327     am_hal_pdm_gain_stepsize_e eStepSize;
328 
329     //! Decimation Rate
330     uint32_t ui32DecimationRate;
331 
332     //! Filters
333     bool bHighPassEnable;
334     //! HPGAIN: Adjust High Pass Coefficients
335     uint32_t ui32HighPassCutoff;
336 
337     //! PDM Clock select.
338     am_hal_pdm_clkspd_e ePDMClkSpeed;
339 
340     //! PCMPACK
341     bool bDataPacking;
342 
343     //! CHSET
344     am_hal_pdm_chset_e ePCMChannels;
345 
346     //! CKODLY
347     am_hal_pdm_clkout_phsdly_e bPDMSampleDelay;
348 
349     //! SCYCLES
350     am_hal_pdm_clkout_delay_e ui32GainChangeDelay;
351 
352     bool bSoftMute;
353 
354     bool bLRSwap;
355 }
356 am_hal_pdm_config_t;
357 
358 //*****************************************************************************
359 //
360 //! DMA transfer structure
361 //
362 //*****************************************************************************
363 typedef struct
364 {
365     uint32_t ui32TargetAddr;
366     uint32_t ui32TargetAddrReverse;
367 
368     uint32_t ui32TotalCount;
369 }
370 am_hal_pdm_transfer_t;
371 
372 //*****************************************************************************
373 //
374 //! Is Register State Valid
375 //
376 //*****************************************************************************
377 typedef struct
378 {
379     bool bValid;
380 }
381 am_hal_pdm_register_state_t;
382 
383 //*****************************************************************************
384 //
385 //! Structure for handling PDM HAL state information.
386 //
387 //*****************************************************************************
388 typedef struct
389 {
390     am_hal_handle_prefix_t prefix;
391     am_hal_pdm_register_state_t sRegState;
392     uint32_t ui32Module;
393 
394     //
395     //! DMA transaction Transfer Control Buffer.
396     //
397     uint32_t            ui32BufferPing;
398     uint32_t            ui32BufferPong;
399     uint32_t            ui32BufferPtr;
400 }
401 am_hal_pdm_state_t;
402 
403 //*****************************************************************************
404 //
405 //! @brief initialize the PDM device controller
406 //!
407 //! @param ui32Module - the index to the PDM
408 //! @param ppHandle   - the handle of initialized PDM instance
409 //!
410 //! This function should be called firstly before we use any other PDM HAL driver
411 //! functions.
412 //!
413 //! @return status    - generic or interface specific status.
414 //
415 //*****************************************************************************
416 extern uint32_t am_hal_pdm_initialize(uint32_t ui32Module, void **ppHandle);
417 
418 //*****************************************************************************
419 //
420 //! @brief Uninitialize the PDM device controller
421 //!
422 //! @param pHandle - the handle of initialized PDM instance
423 //!
424 //! @return status - generic or interface specific status.
425 //
426 //*****************************************************************************
427 extern uint32_t am_hal_pdm_deinitialize(void *pHandle);
428 
429 //*****************************************************************************
430 //
431 //! @brief PDM Power control function. function
432 //!
433 //! @param pHandle      - handle for the PDM.
434 //! @param ePowerState  - power state requested
435 //! @param bRetainState - boolean on whether to retain state
436 //!
437 //! This function allows advanced settings
438 //!
439 //! @return status      - generic or interface specific status.
440 //
441 //*****************************************************************************
442 extern uint32_t am_hal_pdm_power_control(void *pHandle, am_hal_sysctrl_power_state_e ePowerState, bool bRetainState);
443 
444 //*****************************************************************************
445 //
446 //! @brief PDM configuration function
447 //!
448 //! @param pHandle  - handle for the module instance.
449 //! @param psConfig - pointer to the configuration structure.
450 //!
451 //! This function configures the PDM for operation.
452 //!
453 //! @return status  - generic or interface specific status.
454 //
455 //*****************************************************************************
456 extern uint32_t am_hal_pdm_configure(void *pHandle, am_hal_pdm_config_t *psConfig);
457 
458 //*****************************************************************************
459 //
460 //! @brief PDM enable function
461 //!
462 //! @param pHandle - handle for the module instance.
463 //!
464 //! This function enables the PDM operation.
465 //!
466 //! @return status - generic or interface specific status.
467 //
468 //*****************************************************************************
469 extern uint32_t am_hal_pdm_enable(void *pHandle);
470 
471 //*****************************************************************************
472 //
473 //! @brief PDM disable function
474 //!
475 //! @param pHandle - handle for the module instance.
476 //!
477 //! This function disables the PDM operation.
478 //!
479 //! @return status - generic or interface specific status.
480 //
481 //*****************************************************************************
482 extern uint32_t am_hal_pdm_disable(void *pHandle);
483 
484 //*****************************************************************************
485 //
486 //! @brief PDM Reset function
487 //!
488 //! @param pHandle - handle for the module instance.
489 //!
490 //! This function reset the PDM module
491 //!
492 //! @return status - generic or interface specific status.
493 //
494 //*****************************************************************************
495 extern uint32_t am_hal_pdm_reset(void *pHandle);
496 
497 //*****************************************************************************
498 //
499 //! @brief PDM DMA NonBlocking Transfer Start
500 //!
501 //! @param pHandle - handle for the interface.
502 //! @param pDmaCfg - Pointer to the PDM DMA Config
503 //!
504 //! @return status - generic or interface specific status.
505 //
506 //*****************************************************************************
507 extern uint32_t am_hal_pdm_dma_start(void *pHandle, am_hal_pdm_transfer_t *pDmaCfg);
508 
509 //*****************************************************************************
510 //
511 //! @brief Gets the PDM DMA NonBlocking Transfer State
512 //!
513 //! @param pHandle - handle for the interface.
514 //!
515 //! @return status - generic or interface specific status.
516 //
517 //*****************************************************************************
518 extern uint32_t am_hal_pdm_dma_state(void *pHandle);
519 
520 //*****************************************************************************
521 //
522 //! @brief PDM DMA Get Buffer
523 //!
524 //! @param pHandle - handle for the interface.
525 //!
526 //! @return Pointer to the DMA Buffer
527 //
528 //*****************************************************************************
529 extern uint32_t am_hal_pdm_dma_get_buffer(void *pHandle);
530 
531 //*****************************************************************************
532 //
533 //! @brief PDM DMA Reset Count function
534 //!
535 //! @param count - value to reset to
536 //!
537 //! This function reset the PDM module
538 //
539 //*****************************************************************************
540 extern void am_hal_pdm_dma_reset_count(uint32_t count);
541 
542 //*****************************************************************************
543 //
544 //! @brief Flush the PDM FIFO.
545 //!
546 //! @param pHandle - handle for the interface.
547 //!
548 //! @return status - generic or interface specific status.
549 //
550 //*****************************************************************************
551 extern uint32_t am_hal_pdm_fifo_flush(void *pHandle);
552 
553 //*****************************************************************************
554 //
555 //! @brief Read FIFO data.
556 //!
557 //! @param pHandle - handle for the interface.
558 //!
559 //! @return value of FIFOREAD
560 //
561 //*****************************************************************************
562 uint32_t am_hal_pdm_fifo_data_read(void *pHandle);
563 
564 //*****************************************************************************
565 //
566 //! @brief Read FIFO data.
567 //!
568 //! @param pHandle - handle for the interface.
569 //! @param buffer  - Pointer to beffer for FIFOREAD
570 //! @param size    - Size to read
571 //!
572 //! @return 0
573 //
574 //*****************************************************************************
575 uint32_t am_hal_pdm_fifo_data_reads(void *pHandle, uint8_t* buffer, uint32_t size);
576 
577 //*****************************************************************************
578 //
579 //! @brief Read FIFO data.
580 //!
581 //! @param pHandle - handle for the interface.
582 //!
583 //! @return value of FIFOCNT
584 //
585 //*****************************************************************************
586 uint32_t am_hal_pdm_fifo_count_get(void *pHandle);
587 
588 //*****************************************************************************
589 //
590 //! @brief Set FIFOTHR Value
591 //!
592 //! @param pHandle - handle for the interface.
593 //! @param value   - value for the threshold.
594 //!
595 //! @return AM_HAL_STATUS_SUCCESS
596 //
597 //*****************************************************************************
598 uint32_t am_hal_pdm_fifo_threshold_setup(void *pHandle, uint32_t value);
599 
600 //*****************************************************************************
601 //
602 //! @brief PDM -> I2S Passthrough enable function
603 //!
604 //! @param pHandle - handle for the module instance.
605 //!
606 //! This function enables the PDM -> I2S Passthrough operation.
607 //!
608 //! @return status - generic or interface specific status.
609 //
610 //*****************************************************************************
611 extern uint32_t am_hal_pdm_i2s_enable(void *pHandle);
612 
613 //*****************************************************************************
614 //
615 //! @brief PDM -> I2S Passthrough disable function
616 //!
617 //! @param pHandle - handle for the module instance.
618 //!
619 //! This function disnables the PDM -> I2S Passthrough operation.
620 //!
621 //! @return status - generic or interface specific status.
622 //
623 //*****************************************************************************
624 extern uint32_t am_hal_pdm_i2s_disable(void *pHandle);
625 
626 //*****************************************************************************
627 //
628 //! @brief PDM enable interrupts function
629 //!
630 //! @param pHandle - handle for the module instance.
631 //! @param ui32IntMask  - interface specific interrupt mask.
632 //!
633 //! This function enables the specific indicated interrupts (see above).
634 //!
635 //! @return status      - generic or interface specific status.
636 //
637 //*****************************************************************************
638 extern uint32_t am_hal_pdm_interrupt_enable(void *pHandle, uint32_t ui32IntMask);
639 
640 //*****************************************************************************
641 //
642 //! @brief PDM disable interrupts function
643 //!
644 //! @param pHandle           - handle for the module instance.
645 //! @param ui32IntMask - interface specific interrupt mask.
646 //!
647 //! This function disables the specified interrupts.
648 //!
649 //! @return status      - generic or interface specific status.
650 //!
651 //*****************************************************************************
652 extern uint32_t am_hal_pdm_interrupt_disable(void *pHandle, uint32_t ui32IntMask);
653 
654 //*****************************************************************************
655 //
656 //! @brief PDM interrupt clear
657 //!
658 //! @param pHandle           - handle for the module instance.
659 //! @param ui32IntMask - interface specific interrupt mask.
660 //!
661 //! This function clears the interrupts for the given peripheral.
662 //!
663 //! @return status      - generic or interface specific status.
664 //
665 //*****************************************************************************
666 extern uint32_t am_hal_pdm_interrupt_clear(void *pHandle, uint32_t ui32IntMask);
667 
668 //*****************************************************************************
669 //
670 //! @brief PDM get interrupt status
671 //!
672 //! @param pHandle      - handle for the module instance.
673 //! @param pui32Status  - pointer to a uint32_t to return the interrupt status
674 //! @param bEnabledOnly - If interrupt is enabled
675 //!
676 //! @return status      - generic or interface specific status.
677 //
678 //*****************************************************************************
679 extern uint32_t am_hal_pdm_interrupt_status_get(void *pHandle, uint32_t *pui32Status, bool bEnabledOnly);
680 
681 //*****************************************************************************
682 //
683 //! @brief PDM Interrupt Service Routine
684 //!
685 //! @param pHandle     - handle for the module instance.
686 //! @param ui32IntMask - uint32_t for interrupts to clear
687 //! @param psConfig    - Pointer to the PDM Config
688 //!
689 //! @return AM_HAL_STATUS_SUCCESS
690 //
691 //*****************************************************************************
692 extern uint32_t am_hal_pdm_interrupt_service(void *pHandle, uint32_t ui32IntMask, am_hal_pdm_transfer_t* psConfig);
693 
694 //*****************************************************************************
695 //
696 //! @brief PDM DMA disable
697 //!
698 //! @param pHandle     - handle for the module instance.
699 //!
700 //! @return AM_HAL_STATUS_SUCCESS
701 //
702 //*****************************************************************************
703 extern uint32_t am_hal_pdm_dma_disable(void *pHandle);
704 
705 
706 
707 #ifdef __cplusplus
708 }
709 #endif
710 
711 #endif // AM_HAL_PDM_H
712 
713 //*****************************************************************************
714 //
715 // End Doxygen group.
716 //! @}
717 //
718 //*****************************************************************************
719 
720