1 //***************************************************************************** 2 // 3 //! @file am_hal_ctimer.h 4 //! 5 //! @brief Functions for Interfacing with the Counter/Timer Module. 6 //! 7 //! @addtogroup ctimer3p CTimer - Counter/Timer 8 //! @ingroup apollo3p_hal 9 //! @{ 10 // 11 //***************************************************************************** 12 13 //***************************************************************************** 14 // 15 // Copyright (c) 2024, Ambiq Micro, Inc. 16 // All rights reserved. 17 // 18 // Redistribution and use in source and binary forms, with or without 19 // modification, are permitted provided that the following conditions are met: 20 // 21 // 1. Redistributions of source code must retain the above copyright notice, 22 // this list of conditions and the following disclaimer. 23 // 24 // 2. Redistributions in binary form must reproduce the above copyright 25 // notice, this list of conditions and the following disclaimer in the 26 // documentation and/or other materials provided with the distribution. 27 // 28 // 3. Neither the name of the copyright holder nor the names of its 29 // contributors may be used to endorse or promote products derived from this 30 // software without specific prior written permission. 31 // 32 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 33 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 36 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 37 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 38 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 39 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 40 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 41 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 42 // POSSIBILITY OF SUCH DAMAGE. 43 // 44 // This is part of revision release_sdk_3_2_0-dd5f40c14b of the AmbiqSuite Development Package. 45 // 46 //***************************************************************************** 47 #ifndef AM_HAL_CTIMER_H 48 #define AM_HAL_CTIMER_H 49 50 #ifdef __cplusplus 51 extern "C" 52 { 53 #endif 54 55 // 56 // Designate this peripheral. 57 // 58 #define AM_APOLLO3_CTIMER 1 59 60 //***************************************************************************** 61 // 62 //! CTIMERADDRn() 63 //! This is a specialized version of AM_REGADDRn(). It is necessary because 64 //! the CTIMER does not work as a multi-module peripheral. In typical 65 //! multi-module peripherals, the base address is defined as MODULE0_BASE. 66 //! For CTIMER it's CTIMER_BASE (there is no module 0 defined). 67 //! 68 //! Usage: 69 //! CTIMER_ADDRn(CTIMER, n, reg). 70 //! 71 //! periph: Must always be CTIMER. 72 //! n: The timer number specified as a macro, variable, etc. 73 //! reg: The register name always ending in '0'. E.g. TMR0, CTRL0, CMPRB0, 74 //! etc (regardless of the timernum specified by 'n'). 75 // 76 //***************************************************************************** 77 #define CTIMERADDRn(periph, n, reg) ( periph##_BASE + \ 78 offsetof(periph##_Type, reg) + \ 79 (n * (offsetof(periph##_Type, TMR1) - offsetof(periph##_Type, TMR0))) ) 80 81 // 82 //! Enumerations for the eOutputType argument of am_hal_ctimer_output_config(). 83 // 84 typedef enum 85 { 86 AM_HAL_CTIMER_OUTPUT_NORMAL = 0x0, 87 AM_HAL_CTIMER_OUTPUT_SECONDARY = 0x1, 88 AM_HAL_CTIMER_OUTPUT_FORCE0 = 0x2, 89 AM_HAL_CTIMER_OUTPUT_FORCE1 = 0x3 90 } am_hal_ctimer_outputtype_e; 91 92 93 //***************************************************************************** 94 // 95 //! CMSIS-Style macro for handling a variable CTIMER module number. 96 // 97 //***************************************************************************** 98 #define CTIMERn(n) ((CTIMER_Type*)(CTIMER_BASE + (n * ((uint32_t)&CTIMER->TMR1 - (uint32_t)&CTIMER->TMR0)))) 99 100 //***************************************************************************** 101 // 102 //! Number of timers 103 // 104 //***************************************************************************** 105 #define AM_HAL_CTIMER_TIMERS_NUM 8 106 107 //***************************************************************************** 108 // 109 //! Timer offset value 110 // 111 //***************************************************************************** 112 #define AM_HAL_CTIMER_TIMER_OFFSET ((uint32_t)&CTIMER->TMR1 - (uint32_t)&CTIMER->TMR0) 113 114 //***************************************************************************** 115 // 116 //! @name Interrupt Status Bits 117 //! @brief Interrupt Status Bits for enable/disble use 118 //! 119 //! These macros may be used to set and clear interrupt bits 120 //! @{ 121 // 122 //***************************************************************************** 123 #define AM_HAL_CTIMER_INT_TIMERA0C0 CTIMER_INTEN_CTMRA0C0INT_Msk 124 #define AM_HAL_CTIMER_INT_TIMERA0C1 CTIMER_INTEN_CTMRA0C1INT_Msk 125 #define AM_HAL_CTIMER_INT_TIMERA1C0 CTIMER_INTEN_CTMRA1C0INT_Msk 126 #define AM_HAL_CTIMER_INT_TIMERA1C1 CTIMER_INTEN_CTMRA1C1INT_Msk 127 #define AM_HAL_CTIMER_INT_TIMERA2C0 CTIMER_INTEN_CTMRA2C0INT_Msk 128 #define AM_HAL_CTIMER_INT_TIMERA2C1 CTIMER_INTEN_CTMRA2C1INT_Msk 129 #define AM_HAL_CTIMER_INT_TIMERA3C0 CTIMER_INTEN_CTMRA3C0INT_Msk 130 #define AM_HAL_CTIMER_INT_TIMERA3C1 CTIMER_INTEN_CTMRA3C1INT_Msk 131 #define AM_HAL_CTIMER_INT_TIMERA4C0 CTIMER_INTEN_CTMRA4C0INT_Msk 132 #define AM_HAL_CTIMER_INT_TIMERA4C1 CTIMER_INTEN_CTMRA4C1INT_Msk 133 #define AM_HAL_CTIMER_INT_TIMERA5C0 CTIMER_INTEN_CTMRA5C0INT_Msk 134 #define AM_HAL_CTIMER_INT_TIMERA5C1 CTIMER_INTEN_CTMRA5C1INT_Msk 135 #define AM_HAL_CTIMER_INT_TIMERA6C0 CTIMER_INTEN_CTMRA6C0INT_Msk 136 #define AM_HAL_CTIMER_INT_TIMERA6C1 CTIMER_INTEN_CTMRA6C1INT_Msk 137 #define AM_HAL_CTIMER_INT_TIMERA7C0 CTIMER_INTEN_CTMRA7C0INT_Msk 138 #define AM_HAL_CTIMER_INT_TIMERA7C1 CTIMER_INTEN_CTMRA7C1INT_Msk 139 140 #define AM_HAL_CTIMER_INT_TIMERB0C0 CTIMER_INTEN_CTMRB0C0INT_Msk 141 #define AM_HAL_CTIMER_INT_TIMERB0C1 CTIMER_INTEN_CTMRB0C1INT_Msk 142 #define AM_HAL_CTIMER_INT_TIMERB1C0 CTIMER_INTEN_CTMRB1C0INT_Msk 143 #define AM_HAL_CTIMER_INT_TIMERB1C1 CTIMER_INTEN_CTMRB1C1INT_Msk 144 #define AM_HAL_CTIMER_INT_TIMERB2C0 CTIMER_INTEN_CTMRB2C0INT_Msk 145 #define AM_HAL_CTIMER_INT_TIMERB2C1 CTIMER_INTEN_CTMRB2C1INT_Msk 146 #define AM_HAL_CTIMER_INT_TIMERB3C0 CTIMER_INTEN_CTMRB3C0INT_Msk 147 #define AM_HAL_CTIMER_INT_TIMERB3C1 CTIMER_INTEN_CTMRB3C1INT_Msk 148 #define AM_HAL_CTIMER_INT_TIMERB4C0 CTIMER_INTEN_CTMRB4C0INT_Msk 149 #define AM_HAL_CTIMER_INT_TIMERB4C1 CTIMER_INTEN_CTMRB4C1INT_Msk 150 #define AM_HAL_CTIMER_INT_TIMERB5C0 CTIMER_INTEN_CTMRB5C0INT_Msk 151 #define AM_HAL_CTIMER_INT_TIMERB5C1 CTIMER_INTEN_CTMRB5C1INT_Msk 152 #define AM_HAL_CTIMER_INT_TIMERB6C0 CTIMER_INTEN_CTMRB6C0INT_Msk 153 #define AM_HAL_CTIMER_INT_TIMERB6C1 CTIMER_INTEN_CTMRB6C1INT_Msk 154 #define AM_HAL_CTIMER_INT_TIMERB7C0 CTIMER_INTEN_CTMRB7C0INT_Msk 155 #define AM_HAL_CTIMER_INT_TIMERB7C1 CTIMER_INTEN_CTMRB7C1INT_Msk 156 //! @} 157 158 //***************************************************************************** 159 // 160 //! DEPRECATED Interrupt Status Bits 161 // 162 //***************************************************************************** 163 #define AM_HAL_CTIMER_INT_TIMERA0 AM_HAL_CTIMER_INT_TIMERA0C0 164 #define AM_HAL_CTIMER_INT_TIMERB0 AM_HAL_CTIMER_INT_TIMERB0C0 165 #define AM_HAL_CTIMER_INT_TIMERA1 AM_HAL_CTIMER_INT_TIMERA1C0 166 #define AM_HAL_CTIMER_INT_TIMERB1 AM_HAL_CTIMER_INT_TIMERB1C0 167 #define AM_HAL_CTIMER_INT_TIMERA2 AM_HAL_CTIMER_INT_TIMERA2C0 168 #define AM_HAL_CTIMER_INT_TIMERB2 AM_HAL_CTIMER_INT_TIMERB2C0 169 #define AM_HAL_CTIMER_INT_TIMERA3 AM_HAL_CTIMER_INT_TIMERA3C0 170 #define AM_HAL_CTIMER_INT_TIMERB3 AM_HAL_CTIMER_INT_TIMERB3C0 171 172 //***************************************************************************** 173 // 174 //! @name Configuration options 175 //! @brief Configuration options for \e am_hal_ctimer_config_t 176 //! 177 //! These options are to be used with the \e am_hal_ctimer_config_t structure 178 //! used by \e am_hal_ctimer_config 179 //! @{ 180 // 181 //***************************************************************************** 182 #define AM_HAL_CTIMER_CLK_PIN _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x00) 183 #define AM_HAL_CTIMER_HFRC_12MHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x01) 184 #define AM_HAL_CTIMER_HFRC_3MHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x02) 185 #define AM_HAL_CTIMER_HFRC_187_5KHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x03) 186 #define AM_HAL_CTIMER_HFRC_47KHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x04) 187 #define AM_HAL_CTIMER_HFRC_12KHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x05) 188 #define AM_HAL_CTIMER_XT_32_768KHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x06) 189 #define AM_HAL_CTIMER_XT_16_384KHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x07) 190 #define AM_HAL_CTIMER_XT_2_048KHZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x08) 191 #define AM_HAL_CTIMER_XT_256HZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x09) 192 #define AM_HAL_CTIMER_LFRC_512HZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x0A) 193 #define AM_HAL_CTIMER_LFRC_32HZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x0B) 194 #define AM_HAL_CTIMER_LFRC_1HZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x0C) 195 #define AM_HAL_CTIMER_LFRC_1_16HZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x0D) 196 #define AM_HAL_CTIMER_RTC_100HZ _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x0E) 197 #define AM_HAL_CTIMER_HCLK_DIV4 _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x0F) 198 #define AM_HAL_CTIMER_XT_DIV4 _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x10) 199 #define AM_HAL_CTIMER_XT_DIV8 _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x11) 200 #define AM_HAL_CTIMER_XT_DIV32 _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x12) 201 #define AM_HAL_CTIMER_RSVD _VAL2FLD(CTIMER_CTRL0_TMRA0CLK, 0x13) 202 //! @} 203 204 //***************************************************************************** 205 // 206 //! Timer function macros. 207 //! 208 //! @{ 209 // 210 //***************************************************************************** 211 //! Single Count: Counts one time to the compare value, then the output 212 //! changes polarity and stays at that level, with an optional interrupt. 213 #define AM_HAL_CTIMER_FN_ONCE _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 0) 214 //! Repeated Count: Periodic 1-clock-cycle wide pulses with optional interrupts. 215 #define AM_HAL_CTIMER_FN_REPEAT _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 1) 216 //! Single Pulse (One Shot): A single pulse of programmed width, with an optional interrupt. 217 #define AM_HAL_CTIMER_FN_PWM_ONCE _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 2) 218 //! Repeated Pulse: A rectangular (or square) waveform with programmed high and 219 //! low widths, and optional interrupts on each cycle. 220 #define AM_HAL_CTIMER_FN_PWM_REPEAT _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 3) 221 //! Single Pattern: one burst of bits specified by the CMPR0/1/2/3 registers. 222 #define AM_HAL_CTIMER_FN_PTN_ONCE _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 4) 223 //! Repeated Pattern: repeated burst of bits specified by the CMPR0/1/2/3 registers. 224 #define AM_HAL_CTIMER_FN_PTN_REPEAT _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 5) 225 //! Continuous: Free running timer with a single level change on the output and 226 //! a single optional interrupt. 227 #define AM_HAL_CTIMER_FN_CONTINUOUS _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 6) 228 //! Alternate Pulse: like Repeated Pulse but alternating between two different 229 //! pulse width/spacing settings. 230 #define AM_HAL_CTIMER_FN_PWM_ALTERNATE _VAL2FLD(CTIMER_CTRL0_TMRA0FN, 7) 231 //! @} 232 233 //***************************************************************************** 234 // 235 //! Half-timer options. 236 //! 237 //! @{ 238 // 239 //***************************************************************************** 240 #define AM_HAL_CTIMER_INT_ENABLE CTIMER_CTRL0_TMRA0IE0_Msk 241 //#define AM_HAL_CTIMER_PIN_ENABLE CTIMER_CTRL0_TMRA0PE_Msk 242 #define AM_HAL_CTIMER_PIN_INVERT CTIMER_CTRL0_TMRA0POL_Msk 243 #define AM_HAL_CTIMER_CLEAR CTIMER_CTRL0_TMRA0CLR_Msk 244 //! @} 245 246 //***************************************************************************** 247 // 248 //! Additional timer options. 249 //! 250 //! @{ 251 // 252 //***************************************************************************** 253 #define AM_HAL_CTIMER_LINK CTIMER_CTRL0_CTLINK0_Msk 254 #define AM_HAL_CTIMER_ADC_TRIG CTIMER_CTRL3_ADCEN_Msk 255 //! @} 256 257 //***************************************************************************** 258 // 259 //! Timer selection macros. 260 //! 261 //! @{ 262 // 263 //***************************************************************************** 264 #define AM_HAL_CTIMER_TIMERA 0x0000FFFF 265 #define AM_HAL_CTIMER_TIMERB 0xFFFF0000 266 #define AM_HAL_CTIMER_BOTH 0xFFFFFFFF 267 //! @} 268 269 //***************************************************************************** 270 // 271 //! Timer trigger options for Apollo3 Blue (rev B0 and later) including 272 //! Apollo3 Blue Plus. 273 //! 274 //! Valid only for CTIMER4 and CTIMER5 when CTLINK==1 and TMRA4TRIG==1 275 //! 276 //! @{ 277 // 278 //***************************************************************************** 279 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCAP0 CTIMER_AUX4_TMRB4TRIG_A7OUT 280 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCAP1 CTIMER_AUX4_TMRB4TRIG_B7OUT 281 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCAP2 CTIMER_AUX4_TMRB4TRIG_A1OUT 282 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCAP3 CTIMER_AUX4_TMRB4TRIG_B1OUT 283 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP0 CTIMER_AUX4_TMRB4TRIG_B3OUT2 284 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP1 CTIMER_AUX4_TMRB4TRIG_A3OUT2 285 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP2 CTIMER_AUX4_TMRB4TRIG_A1OUT2 286 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP3 CTIMER_AUX4_TMRB4TRIG_B1OUT2 287 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP4 CTIMER_AUX4_TMRB4TRIG_A6OUT2DUAL 288 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP5 CTIMER_AUX4_TMRB4TRIG_A7OUT2DUAL 289 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP6 CTIMER_AUX4_TMRB4TRIG_B5OUT2DUAL 290 #define AM_HAL_CTIMER_AUX4_TMRB4TRIG_STIMERCMP7 CTIMER_AUX4_TMRB4TRIG_A5OUT2DUAL 291 292 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCAP0 CTIMER_AUX5_TMRB5TRIG_A7OUT 293 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCAP1 CTIMER_AUX5_TMRB5TRIG_B7OUT 294 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCAP2 CTIMER_AUX5_TMRB5TRIG_A1OUT 295 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCAP3 CTIMER_AUX5_TMRB5TRIG_B1OUT 296 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP0 CTIMER_AUX5_TMRB5TRIG_B3OUT2 297 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP1 CTIMER_AUX5_TMRB5TRIG_A3OUT2 298 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP2 CTIMER_AUX5_TMRB5TRIG_A1OUT2 299 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP3 CTIMER_AUX5_TMRB5TRIG_B1OUT2 300 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP4 CTIMER_AUX5_TMRB5TRIG_A6OUT2DUAL 301 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP5 CTIMER_AUX5_TMRB5TRIG_A7OUT2DUAL 302 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP6 CTIMER_AUX5_TMRB5TRIG_B5OUT2DUAL 303 #define AM_HAL_CTIMER_AUX5_TMRB5TRIG_STIMERCMP7 CTIMER_AUX5_TMRB5TRIG_A5OUT2DUAL 304 //! @} 305 306 //***************************************************************************** 307 // 308 //! @name All-In-One Configuration 309 //! @brief New API for multiple timer configuration. 310 //! 311 //! These options are to be used with the \e am_hal_ctimer_config_t structure 312 //! used by \e am_hal_ctimer_config 313 //! @{ 314 // 315 //***************************************************************************** 316 //! CTimer AIO Compare Configuration. 317 typedef struct 318 { 319 // 320 //! Function Number. 321 // 322 uint32_t FN; 323 // 324 //! Timer Segment. Timer A, B, BOTH selector. 325 // 326 uint32_t AB; 327 // 328 //! Compare Register A0. 329 // 330 uint32_t A0; 331 // 332 //! Compare Register A1. 333 // 334 uint32_t A1; 335 // 336 //! Compare Register A2. 337 // 338 uint32_t A2; 339 // 340 //! Compare Register A3. 341 // 342 uint32_t A3; 343 // 344 //! Compare Register B0. 345 // 346 uint32_t B0; 347 // 348 //! Compare Register B1. 349 // 350 uint32_t B1; 351 // 352 //! Compare Register B2. 353 // 354 uint32_t B2; 355 // 356 //! Compare Register B3. 357 // 358 uint32_t B3; 359 // 360 //! LMT field values. 361 // 362 uint32_t LMT; 363 // 364 //! A "T" indicates that a 1 is loaded if the OUT2 output is used, otherwise a 0 is loaded. 365 // 366 uint32_t EN23; 367 // 368 //! TRIG: a single pattern will be triggered; TERM: a repeated pattern will be terminated. 369 // 370 uint32_t TRIG; 371 // 372 //! Select clock source: internal, external, a buck pulse, or output of another CTIMER. 373 // 374 uint32_t CLK; 375 // 376 //! Enable the primary interrupt INT. 377 // 378 uint32_t IE0; 379 // 380 //! Enable the secondary interrupt INT2. 381 // 382 uint32_t IE1; 383 // 384 //! Select the polarity of the OUT output. 385 // 386 uint32_t POL; 387 // 388 //! Select the polarity of the OUT2 output. 389 // 390 uint32_t POL23; 391 // 392 //! Select polarity of both OUT and OUT2 as a function of the trigger input. 393 // 394 uint32_t TINV; 395 // 396 //! Disable clock synchronization on read. 397 // 398 uint32_t NOSYNC; 399 // 400 //! Enable the timer.\n 401 //! This is ANDed with the global enable in GLOBEN, and allows the counter to begin counting. 402 // 403 uint32_t EN; 404 // 405 //! Clear the timer. This will hold the timer at zero even if EN is asserted.\n 406 //! It is typically cleared at the end of a configuration and 407 //! is probably not included in the function structure. 408 // 409 //uint32_t CLR; 410 411 } 412 am_hal_ctimer_aio_config_t; 413 414 //! CTimer AIO Output Selection and Interconnect. 415 typedef struct 416 { 417 //! Pad 0-9 418 uint32_t OUTCFG0; 419 //! Pad 10-19 420 uint32_t OUTCFG1; 421 //! Pad 20-29 422 uint32_t OUTCFG2; 423 //! Pad 30-31 424 uint32_t OUTCFG3; 425 } 426 am_hal_ctimer_aio_connect_t; 427 //! @} 428 429 //***************************************************************************** 430 // 431 //! Timer configuration structure 432 // 433 //***************************************************************************** 434 typedef struct 435 { 436 // 437 //! Set to 1 to operate this timer as a 32-bit timer instead of two 16-bit 438 //! timers. 439 // 440 uint32_t ui32Link; 441 442 // 443 //! Configuration options for TIMERA 444 // 445 uint32_t ui32TimerAConfig; 446 447 // 448 //! Configuration options for TIMERB 449 // 450 uint32_t ui32TimerBConfig; 451 452 } 453 am_hal_ctimer_config_t; 454 455 //***************************************************************************** 456 // 457 //! Function pointer type for CTimer interrupt handlers. 458 // 459 //***************************************************************************** 460 typedef void (*am_hal_ctimer_handler_t)(void); 461 462 //***************************************************************************** 463 // 464 // External function definitions 465 // 466 //***************************************************************************** 467 468 //***************************************************************************** 469 // 470 //! @brief Set up the counter/timer. 471 //! 472 //! @param ui32ConfigVal - The value to set the global enable register. 473 //! 474 //! This function sets the global enable register inside a critical section. 475 // 476 //***************************************************************************** 477 extern void am_hal_ctimer_globen(uint32_t ui32ConfigVal); 478 479 //***************************************************************************** 480 // 481 //! @brief Set up the counter/timer. 482 //! 483 //! @param ui32TimerNumber - The number of the Timer that should be 484 //! configured. 485 //! 486 //! @param psConfig - A pointer to a structure that holds important settings 487 //! for the timer. 488 //! 489 //! This function should be used to perform the initial set-up of the 490 //! counter-timer. 491 //! 492 //! @note This function is deprecated and will eventually be replaced by 493 //! am_hal_ctimer_config_single(), which performs the same configuration 494 //! without requiring a structure and without assuming both timer halves 495 //! are being configured. 496 //! Please use am_hal_ctimer_config_single() for new development. 497 //! @par 498 //! @note In order to initialize the given timer into a known state, this 499 //! function asserts the CLR configuration bit. The CLR bit will be deasserted 500 //! with the write of the configuration register. The CLR bit is also 501 //! intentionally deasserted with a call to am_hal_ctimer_start(). 502 //! 503 // 504 //***************************************************************************** 505 extern void am_hal_ctimer_config(uint32_t ui32TimerNumber, 506 am_hal_ctimer_config_t *psConfig); 507 508 //***************************************************************************** 509 // 510 //! @brief Set up the counter/timer. 511 //! 512 //! @param ui32TimerNumber - The number of the Timer that should be 513 //! configured. 514 //! 515 //! @param ui32TimerSegment - Specifies which segment of the timer should be 516 //! enabled. 517 //! - Valid values for ui32TimerSegment are: 518 //! - AM_HAL_CTIMER_TIMERA 519 //! - AM_HAL_CTIMER_TIMERB 520 //! - AM_HAL_CTIMER_BOTH 521 //! 522 //! @param ui32ConfigVal - Specifies the configuration options for the selected 523 //! timer. 524 //! @parblock 525 //! - The timer's clock source, mode, interrupt, and external pin behavior are 526 //! all controlled through the \e ui32Configval parameter.\n The valid options 527 //! for ui32ConfigVal include any ORed together combination of the following: 528 //! 529 //! - Clock configuration macros: 530 //! - AM_HAL_CTIMER_HFRC_24MHZ 531 //! - AM_HAL_CTIMER_LFRC_512HZ 532 //! - ... etc. (See am_hal_ctimer.h for the full set of options.) 533 //! 534 //! - Mode selection macros: 535 //! - AM_HAL_CTIMER_FN_ONCE 536 //! - AM_HAL_CTIMER_FN_REPEAT 537 //! - AM_HAL_CTIMER_FN_PWM_ONCE 538 //! - AM_HAL_CTIMER_FN_PWM_REPEAT 539 //! - AM_HAL_CTIMER_FN_CONTINUOUS 540 //! 541 //! - Interrupt control: 542 //! - AM_HAL_CTIMER_INT_ENABLE 543 //! 544 //! - Pin control: 545 //! - AM_HAL_CTIMER_PIN_ENABLE 546 //! - AM_HAL_CTIMER_PIN_INVERT 547 //! 548 //! - ADC trigger (Timer 3 only): 549 //! - AM_HAL_CTIMER_ADC_TRIG 550 //! @endparblock 551 //! 552 //! This function should be used to perform the initial set-up of the 553 //! counter-timer. It can be used to configure either a 16-bit timer (A or B) or a 554 //! 32-bit timer using the BOTH option. 555 //! 556 //! @note In order to initialize the given timer into a known state, this 557 //! function asserts the CLR configuration bit. The CLR bit will be deasserted 558 //! with the write of the configuration register. The CLR bit is also 559 //! intentionally deasserted with a call to am_hal_ctimer_start(). 560 //! 561 // 562 //***************************************************************************** 563 extern void am_hal_ctimer_config_single(uint32_t ui32TimerNumber, 564 uint32_t ui32TimerSegment, 565 uint32_t ui32ConfigVal); 566 567 //***************************************************************************** 568 // 569 //! @brief Set up the counter/timer trigger. 570 //! 571 //! @param ui32TimerNumber - The number of the Timer that should be 572 //! configured. 573 //! 574 //! @param ui32TimerSegment - Specifies which segment of the timer should be 575 //! enabled. 576 //! - Valid values for ui32TimerSegment are: 577 //! - AM_HAL_CTIMER_TIMERA 578 //! - AM_HAL_CTIMER_TIMERB 579 //! 580 //! @param ui32ConfigVal - Specifies the configuration options for the selected 581 //! timer trigger AUXn register. 582 //! 583 //! This function should be used to perform the configuration of the trigger 584 //! for the counter-timer (A or B). 585 //! 586 //! @note In order to initialize the given timer into a known state, this 587 //! function asserts the CLR configuration bit. The CLR bit will be deasserted 588 //! with the write of the configuration register. The CLR bit is also 589 //! intentionally deasserted with a call to am_hal_ctimer_start(). 590 //! 591 // 592 //***************************************************************************** 593 extern void am_hal_ctimer_config_trigger(uint32_t ui32TimerNumber, 594 uint32_t ui32TimerSegment, 595 uint32_t ui32ConfigVal); 596 597 //***************************************************************************** 598 // 599 //! @brief Start a timer 600 //! 601 //! @param ui32TimerNumber - The number of the timer to enable 602 //! - The \e ui32TimerNumber parameter selects the timer that should be enabled. 603 //! - For example, a 0 would target TIMER0. 604 //! 605 //! @param ui32TimerSegment - Specifies which segment of the timer should be 606 //! enabled. 607 //! - Valid values for ui32TimerSegment are: 608 //! - AM_HAL_CTIMER_TIMERA 609 //! - AM_HAL_CTIMER_TIMERB 610 //! - AM_HAL_CTIMER_BOTH 611 //! - The \e ui32TimerSegment parameter allows the caller to individually 612 //! select a segment within a timer to be enabled,\n 613 //! such as TIMER0A, TIMER0B, or both. 614 //! 615 //! This function will enable a timer to begin incrementing. 616 //! 617 // 618 //***************************************************************************** 619 extern void am_hal_ctimer_start(uint32_t ui32TimerNumber, 620 uint32_t ui32TimerSegment); 621 622 //***************************************************************************** 623 // 624 //! @brief Stop a timer 625 //! 626 //! @param ui32TimerNumber - The number of the timer to disable. 627 //! - The \e ui32TimerNumber parameter selects the timer that should be enabled. 628 //! - For example, a 0 would target TIMER0. 629 //! 630 //! @param ui32TimerSegment - Specifies which segment of the timer should be 631 //! disabled. 632 //! - Valid values for ui32TimerSegment are: 633 //! - AM_HAL_CTIMER_TIMERA 634 //! - AM_HAL_CTIMER_TIMERB 635 //! - AM_HAL_CTIMER_BOTH 636 //! - The \e ui32TimerSegment parameter allows the caller to individually 637 //! select a segment within a timer to be enabled,\n 638 //! such as TIMER0A, TIMER0B, or both. 639 //! 640 //! This function will stop the selected timer from incrementing. 641 //! 642 //! @note This function will stop a counter/timer from counting, but does not return 643 //! the count value to 'zero'. If you would like to reset the counter back to 644 //! zero, try the am_hal_ctimer_clear() function instead. 645 //! 646 // 647 //***************************************************************************** 648 extern void am_hal_ctimer_stop(uint32_t ui32TimerNumber, 649 uint32_t ui32TimerSegment); 650 651 //***************************************************************************** 652 // 653 //! @brief Stops a timer and resets its value back to zero. 654 //! 655 //! @param ui32TimerNumber - The number of the timer to clear. 656 //! @param ui32TimerSegment - Specifies which segment of the timer should be 657 //! cleared. 658 //! - Valid values for ui32TimerSegment are: 659 //! - AM_HAL_CTIMER_TIMERA 660 //! - AM_HAL_CTIMER_TIMERB 661 //! - AM_HAL_CTIMER_BOTH 662 //! - The \e ui32TimerSegment parameter allows the caller to individually 663 //! select a segment within, such as TIMER0A, TIMER0B, or both. 664 //! 665 //! This function will stop a free-running counter-timer, reset its value to 666 //! zero, and leave the timer disabled. When you would like to restart the 667 //! counter, you will need to call am_hal_ctimer_start(). 668 //! 669 //! @note Setting the CLR bit is necessary for completing timer initialization 670 //! including after MCU resets. 671 //! 672 // 673 //***************************************************************************** 674 extern void am_hal_ctimer_clear(uint32_t ui32TimerNumber, 675 uint32_t ui32TimerSegment); 676 677 //***************************************************************************** 678 // 679 //! @brief Returns the current free-running value of the selected timer. 680 //! 681 //! @param ui32TimerNumber - The number of the timer to read. 682 //! @param ui32TimerSegment - Specifies which segment of the timer should be 683 //! read. 684 //! - Valid values for ui32TimerSegment are: 685 //! - AM_HAL_CTIMER_TIMERA 686 //! - AM_HAL_CTIMER_TIMERB 687 //! - AM_HAL_CTIMER_BOTH 688 //! 689 //! This function returns the current free-running value of the selected timer. 690 //! 691 //! @note When reading from a linked timer, be sure to use AM_HAL_CTIMER both 692 //! for the segment argument. 693 //! 694 //! @return Current timer value. 695 // 696 //***************************************************************************** 697 extern uint32_t am_hal_ctimer_read(uint32_t ui32TimerNumber, 698 uint32_t ui32TimerSegment); 699 700 //***************************************************************************** 701 // 702 //! @brief Configure timer pin output. 703 //! 704 //! @param ui32TimerNumber - The number of the timer to configure. 705 //! - The timer number, 0-7. 706 //! @param ui32TimerSegment - Specifies which segment of the timer to use. 707 //! - AM_HAL_CTIMER_TIMERA 708 //! - AM_HAL_CTIMER_TIMERB 709 //! - AM_HAL_CTIMER_BOTH 710 //! @param ui32PadNum - Pad number to be used for the output signal. 711 //! @param eOutputType - Output Configuration options 712 //! - AM_HAL_CTIMER_OUTPUT_NORMAL 713 //! - AM_HAL_CTIMER_OUTPUT_SECONDARY 714 //! - AM_HAL_CTIMER_OUTPUT_FORCE0 715 //! - AM_HAL_CTIMER_OUTPUT_FORCE1 716 //! @param eDriveStrength - Drive strength 717 //! - AM_HAL_GPIO_PIN_DRIVESTRENGTH_2MA = 0x0, 718 //! - AM_HAL_GPIO_PIN_DRIVESTRENGTH_4MA = 0x1, 719 //! - AM_HAL_GPIO_PIN_DRIVESTRENGTH_8MA = 0x2, 720 //! - AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA = 0x3 721 //! 722 //! This function will configure the output pin for the selected timer. 723 //! 724 //! @return status (0 is Success). 725 // 726 //***************************************************************************** 727 extern uint32_t am_hal_ctimer_output_config(uint32_t ui32TimerNumber, 728 uint32_t ui32TimerSegment, 729 uint32_t ui32PadNum, 730 uint32_t eOutputType, 731 uint32_t eDriveStrength); 732 733 //***************************************************************************** 734 // 735 //! @brief Configure timer inputs. 736 //! 737 //! @param ui32TimerNumber - The number of the timer to configure. 738 //! 739 //! @param ui32TimerSegment - Specifies which segment of the timer to use. 740 //! - Valid values for ui32TimerSegment are: 741 //! - AM_HAL_CTIMER_TIMERA 742 //! - AM_HAL_CTIMER_TIMERB 743 //! - AM_HAL_CTIMER_BOTH 744 //! 745 //! @param ui32TimerInputConfig Input Configuration options. 746 //! 747 //! This function will configure the input pin for the selected timer. 748 //! 749 // 750 //***************************************************************************** 751 extern void am_hal_ctimer_input_config(uint32_t ui32TimerNumber, 752 uint32_t ui32TimerSegment, 753 uint32_t ui32TimerInputConfig); 754 755 //***************************************************************************** 756 // 757 //! @brief Set a compare register. 758 //! 759 //! @param ui32TimerNumber -The number of the timer to configure. 760 //! 761 //! @param ui32TimerSegment -Specifies which segment of the timer to use. 762 //! - The \e ui32TimerSegment parameter allows the caller to individually 763 //! select a segment within, such as TIMER0A, TIMER0B, or both. 764 //! - Valid values for ui32TimerSegment are: 765 //! - AM_HAL_CTIMER_TIMERA 766 //! - AM_HAL_CTIMER_TIMERB 767 //! - AM_HAL_CTIMER_BOTH 768 //! 769 //! @param ui32CompareReg - Specifies which compare register should be set 770 //! (either 0 or 1) 771 //! 772 //! @param ui32Value - The value that should be written to the compare 773 //! register. 774 //! 775 //! This function allows the caller to set the values in the compare registers 776 //! for a timer. These registers control the period and duty cycle of the 777 //! timers and their associated output pins. Please see the datasheet for 778 //! further information on the operation of the compare registers. 779 //! 780 //! @note For simple manipulations of period or duty cycle for timers and PWMs, 781 //! you may find it easier to use the am_hal_ctimer_period_set() function. 782 // 783 //***************************************************************************** 784 extern void am_hal_ctimer_compare_set(uint32_t ui32TimerNumber, 785 uint32_t ui32TimerSegment, 786 uint32_t ui32CompareReg, 787 uint32_t ui32Value); 788 789 //***************************************************************************** 790 // 791 //! @brief Set a compare register. 792 //! 793 //! @param ui32TimerNumber - The number of the timer to configure. 794 //! 795 //! @param ui32TimerSegment - Specifies which segment of the timer to use. 796 //! - The \e ui32TimerSegment parameter allows the caller to individually 797 //! select a segment within, such as TIMER0A, TIMER0B, or both. 798 //! - Valid values for ui32TimerSegment are: 799 //! - AM_HAL_CTIMER_TIMERA 800 //! - AM_HAL_CTIMER_TIMERB 801 //! - AM_HAL_CTIMER_BOTH 802 //! 803 //! @param ui32CompareReg - Specifies which compare register should be set 804 //! (either 0 or 1) 805 //! 806 //! @param ui32Value - The value that should be written to the compare 807 //! register. 808 //! 809 //! This function allows the caller to set the values in the compare registers 810 //! for a timer. These registers control the period and duty cycle of the 811 //! timers and their associated output pins. Please see the datasheet for 812 //! further information on the operation of the compare registers. 813 //! 814 //! @note For simple manipulations of period or duty cycle for timers and PWMs, 815 //! you may find it easier to use the am_hal_ctimer_period_set() function. 816 // 817 //***************************************************************************** 818 extern void am_hal_ctimer_aux_compare_set(uint32_t ui32TimerNumber, 819 uint32_t ui32TimerSegment, 820 uint32_t ui32CompareReg, 821 uint32_t ui32Value); 822 823 //***************************************************************************** 824 // 825 //! @brief Set the period and duty cycle of a timer. 826 //! 827 //! @param ui32TimerNumber - The number of the timer to configure. 828 //! 829 //! @param ui32TimerSegment - Specifies which segment of the timer to use. 830 //! - Valid values for ui32TimerSegment are: 831 //! - AM_HAL_CTIMER_TIMERA 832 //! - AM_HAL_CTIMER_TIMERB 833 //! - AM_HAL_CTIMER_BOTH 834 //! 835 //! @param ui32Period - Specifies the desired period.\n 836 //! - This parameter effectively specifies the CTIMER CMPR field(s). 837 //! - The CMPR fields are handled in hardware 838 //! as (n+1) values, therefore ui32Period is actually specified as 1 less than 839 //! the desired period. 840 //! - Finally, as mentioned in the data sheet, the CMPR fields 841 //! cannot be 0 (a value of 1), so neither can ui32Period be 0. 842 //! 843 //! @param ui32OnTime - Set the number of clocks where the output signal is high. 844 //! 845 //! @note This function should be used for simple manipulations of the period and 846 //! duty cycle of a counter/timer. To set the period and/or duty cycle of a 847 //! linked timer pair, use AM_HAL_CTIMER_BOTH as the timer segment argument. If 848 //! you would like to set the period and/or duty cycle for both TIMERA and 849 //! TIMERB you will need to call this function twice: once for TIMERA, and once 850 //! for TIMERB. 851 //! @par 852 //! 853 //! @note The ui32OnTime parameter will only work if the timer is currently 854 //! operating in one of the PWM modes. 855 // 856 //***************************************************************************** 857 extern void am_hal_ctimer_period_set(uint32_t ui32TimerNumber, 858 uint32_t ui32TimerSegment, 859 uint32_t ui32Period, 860 uint32_t ui32OnTime); 861 862 //***************************************************************************** 863 // 864 //! @brief Set the period and duty cycle of a timer. 865 //! 866 //! @param ui32TimerNumber - The number of the timer to configure. 867 //! 868 //! @param ui32TimerSegment - Specifies which segment of the timer to use. 869 //! - Valid values for ui32TimerSegment are: 870 //! - AM_HAL_CTIMER_TIMERA 871 //! - AM_HAL_CTIMER_TIMERB 872 //! - AM_HAL_CTIMER_BOTH 873 //! 874 //! @param ui32Period - Specifies the desired period.\n 875 //! - This parameter effectively specifies the CTIMER CMPR field(s). 876 //! - The CMPR fields are handled in hardware 877 //! as (n+1) values, therefore ui32Period is actually specified as 1 less than 878 //! the desired period. 879 //! - Finally, as mentioned in the data sheet, the CMPR fields 880 //! cannot be 0 (a value of 1), so neither can ui32Period be 0. 881 //! 882 //! @param ui32OnTime - Set the number of clocks where the output signal is high. 883 //! 884 //! @note This function should be used for simple manipulations of the period and 885 //! duty cycle of a counter/timer. To set the period and/or duty cycle of a 886 //! linked timer pair, use AM_HAL_CTIMER_BOTH as the timer segment argument. If 887 //! you would like to set the period and/or duty cycle for both TIMERA and 888 //! TIMERB you will need to call this function twice: once for TIMERA, and once 889 //! for TIMERB. 890 //! @par 891 //! 892 //! @note The ui32OnTime parameter will only work if the timer is currently 893 //! operating in one of the PWM modes. 894 // 895 //***************************************************************************** 896 extern void am_hal_ctimer_aux_period_set(uint32_t ui32TimerNumber, 897 uint32_t ui32TimerSegment, 898 uint32_t ui32Period, 899 uint32_t ui32OnTime); 900 901 //***************************************************************************** 902 // 903 //! @brief Enable the TIMERA3 ADC trigger 904 //! 905 //! This function enables the ADC trigger within TIMERA3. 906 // 907 //***************************************************************************** 908 extern void am_hal_ctimer_adc_trigger_enable(void); 909 910 //***************************************************************************** 911 // 912 //! @brief Disable the TIMERA3 ADC trigger 913 //! 914 //! This function disables the ADC trigger within TIMERA3. 915 //! 916 // 917 //***************************************************************************** 918 extern void am_hal_ctimer_adc_trigger_disable(void); 919 920 //***************************************************************************** 921 // 922 //! @brief Enables the selected timer interrupt. 923 //! 924 //! @param ui32Interrupt - The interrupt to be used. 925 //! - ui32Interrupt should be the logical OR of one or more of the following 926 //! values: 927 //! - AM_HAL_CTIMER_INT_TIMERAxCx 928 //! - AM_HAL_CTIMER_INT_TIMERAxCx 929 //! 930 //! @note This function will enable the selected interrupts in the main CTIMER 931 //! interrupt enable register.\n In order to receive an interrupt from a 932 //! timer, you will need to enable the interrupt for that timer in this 933 //! main register, as well as in the timer control register 934 //! (accessible though am_hal_ctimer_config()), and in the NVIC. 935 //! @par 936 //! 937 //! @note The AM_HAL_CTIMER_INT_TIMER defines were re-definitions of 938 //! AM_REG_CTIMER_INTEN_CTMRAxCxINT_M register defines. They are 939 //! dropped in this release to go back to a single source definition. 940 //! 941 // 942 //***************************************************************************** 943 extern void am_hal_ctimer_int_enable(uint32_t ui32Interrupt); 944 945 //***************************************************************************** 946 // 947 //! @brief Disables the selected timer interrupt. 948 //! 949 //! @param ui32Interrupt - The interrupt to be used. 950 //! - ui32Interrupt should be the logical OR of one or more of the following 951 //! values: 952 //! - AM_HAL_CTIMER_INT_TIMERAxCx 953 //! 954 //! This function will disable the selected interrupts in the main CTIMER 955 //! interrupt register. 956 //! 957 // 958 //***************************************************************************** 959 extern void am_hal_ctimer_int_disable(uint32_t ui32Interrupt); 960 961 //***************************************************************************** 962 // 963 //! @brief Sets the selected timer interrupt. 964 //! 965 //! @param ui32Interrupt - The interrupt to be used. 966 //! - ui32Interrupt should be the logical OR of one or more of the following 967 //! values: 968 //! - AM_HAL_CTIMER_INT_TIMERAxCx 969 //! - AM_HAL_CTIMER_INT_TIMERAxCx 970 //! 971 //! This function will set the selected interrupts in the main CTIMER 972 //! interrupt register. 973 //! 974 // 975 //***************************************************************************** 976 extern void am_hal_ctimer_int_set(uint32_t ui32Interrupt); 977 978 //***************************************************************************** 979 // 980 //! @brief Clears the selected timer interrupt. 981 //! 982 //! @param ui32Interrupt -The interrupt to be used. 983 //! - ui32Interrupt should be the logical OR of one or more of the following 984 //! values: 985 //! - AM_HAL_CTIMER_INT_TIMERAxCx 986 //! - AM_HAL_CTIMER_INT_TIMERAxCx 987 //! 988 //! This function will clear the selected interrupts in the main CTIMER 989 //! interrupt register. 990 // 991 //***************************************************************************** 992 extern void am_hal_ctimer_int_clear(uint32_t ui32Interrupt); 993 994 //***************************************************************************** 995 // 996 //! @brief Returns either the enabled or raw timer interrupt status. 997 //! 998 //! @param bEnabledOnly - If true this function returns the status of the 999 //! enabled interrupts only. 1000 //! 1001 //! This function will return the timer interrupt status. 1002 //! 1003 //! @return ui32RetVal either the timer interrupt status, or interrupt enabled.\n 1004 //! - The return value will be the logical OR of one or more of the 1005 //! following values: 1006 //! - AM_REG_CTIMER_INTEN_CTMRAxC0INT_M 1007 //! - AM_HAL_CTIMER_INT_TIMERAxC1 1008 // 1009 //***************************************************************************** 1010 extern uint32_t am_hal_ctimer_int_status_get(bool bEnabledOnly); 1011 1012 //***************************************************************************** 1013 // 1014 //! @brief Register an interrupt handler for CTimer. 1015 //! 1016 //! @param ui32Interrupt - Interrupt number to assign this interrupt handler to. 1017 //! @param pfnHandler - Function to call when this interrupt is received. 1018 //! 1019 //! This function allows the caller to specify a function that should be called 1020 //! any time a Ctimer interrupt is received. Registering an 1021 //! interrupt handler using this function adds the function pointer to an array 1022 //! in SRAM. This interrupt handler will be called by am_hal_ctimer_int_service() 1023 //! whenever the ui32Status parameter indicates that the corresponding interrupt. 1024 //! 1025 //! To remove an interrupt handler that has already been registered, the 1026 //! pfnHandler parameter may be set to zero. 1027 //! 1028 //! @note This function will not have any effect unless the 1029 //! am_hal_ctimer_int_service() function is being used. 1030 // 1031 //***************************************************************************** 1032 extern void am_hal_ctimer_int_register(uint32_t ui32Interrupt, 1033 am_hal_ctimer_handler_t pfnHandler); 1034 1035 //***************************************************************************** 1036 // 1037 //! @brief Convenience function for responding to CTimer interrupts. 1038 //! 1039 //! @param ui32Status - The interrupt status as returned by 1040 //! am_hal_ctimer_int_status_get() 1041 //! 1042 //! This function may be called from am_ctimer_isr() to read the status of 1043 //! the CTimer interrupts, determine which source caused the most recent 1044 //! interrupt, and call an interrupt handler function to respond. The interrupt 1045 //! handler to be called must be first registered with the 1046 //! am_hal_ctimer_int_register() function. 1047 //! 1048 //! @note In the event that multiple sources are active, the corresponding 1049 //! interrupt handlers will be called in numerical order based on interrupt def. 1050 // 1051 //***************************************************************************** 1052 extern void am_hal_ctimer_int_service(uint32_t ui32Status); 1053 1054 //***************************************************************************** 1055 //! @brief General function to do triple back-to-back reads. 1056 //! 1057 //! @param ui32TimerAddr 1058 //! @param ui32Data 1059 //***************************************************************************** 1060 extern void am_hal_triple_read(uint32_t ui32TimerAddr, uint32_t ui32Data[]); 1061 1062 #ifdef __cplusplus 1063 } 1064 #endif 1065 1066 #endif // AM_HAL_CTIMER_H 1067 1068 //***************************************************************************** 1069 // 1070 // End Doxygen group. 1071 //! @} 1072 // 1073 //***************************************************************************** 1074
