1 //***************************************************************************** 2 // 3 //! @file am_hal_uart.h 4 //! 5 //! @brief Functions for accessing and configuring the UART. 6 //! 7 //! @addtogroup uart3 UART - UART Functionality 8 //! @ingroup apollo3_hal 9 //! @{ 10 // 11 //***************************************************************************** 12 13 //***************************************************************************** 14 // 15 // Copyright (c) 2024, Ambiq Micro, Inc. 16 // All rights reserved. 17 // 18 // Redistribution and use in source and binary forms, with or without 19 // modification, are permitted provided that the following conditions are met: 20 // 21 // 1. Redistributions of source code must retain the above copyright notice, 22 // this list of conditions and the following disclaimer. 23 // 24 // 2. Redistributions in binary form must reproduce the above copyright 25 // notice, this list of conditions and the following disclaimer in the 26 // documentation and/or other materials provided with the distribution. 27 // 28 // 3. Neither the name of the copyright holder nor the names of its 29 // contributors may be used to endorse or promote products derived from this 30 // software without specific prior written permission. 31 // 32 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 33 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 36 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 37 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 38 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 39 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 40 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 41 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 42 // POSSIBILITY OF SUCH DAMAGE. 43 // 44 // This is part of revision release_sdk_3_2_0-dd5f40c14b of the AmbiqSuite Development Package. 45 // 46 //***************************************************************************** 47 #ifndef AM_HAL_UART_H 48 #define AM_HAL_UART_H 49 50 #ifdef __cplusplus 51 extern "C" 52 { 53 #endif 54 55 //***************************************************************************** 56 // 57 //! CMSIS-style macro for handling a variable MSPI module number. 58 // 59 //***************************************************************************** 60 #define UARTn(n) ((UART0_Type*)(UART0_BASE + (n * (UART1_BASE - UART0_BASE)))) 61 62 63 64 //***************************************************************************** 65 // 66 //! Control operations. 67 // 68 //***************************************************************************** 69 typedef enum 70 { 71 AM_HAL_UART_CONTROL_CLKSEL, 72 } am_hal_uart_control_e; 73 74 //***************************************************************************** 75 // 76 //! Module clock speed options 77 // 78 //***************************************************************************** 79 typedef enum 80 { 81 eUART_CLK_SPEED_DEFAULT = 0, 82 eUART_CLK_SPEED_NOCLK = UART0_CR_CLKSEL_NOCLK + 1, 83 eUART_CLK_SPEED_24MHZ = UART0_CR_CLKSEL_24MHZ + 1, 84 eUART_CLK_SPEED_12MHZ = UART0_CR_CLKSEL_12MHZ + 1, 85 eUART_CLK_SPEED_6MHZ = UART0_CR_CLKSEL_6MHZ + 1, 86 eUART_CLK_SPEED_3MHZ = UART0_CR_CLKSEL_3MHZ + 1, 87 eUART_CLK_SPEED_INVALID, 88 } am_hal_uart_clock_speed_e; 89 90 91 92 //***************************************************************************** 93 // 94 //! UART configuration options. 95 // 96 //***************************************************************************** 97 typedef struct 98 { 99 // 100 //! Standard UART options. 101 // 102 uint32_t ui32BaudRate; 103 uint32_t ui32DataBits; 104 uint32_t ui32Parity; 105 uint32_t ui32StopBits; 106 uint32_t ui32FlowControl; 107 108 // 109 //! Additional options. 110 // 111 uint32_t ui32FifoLevels; 112 113 // 114 //! Buffers 115 // 116 uint8_t *pui8TxBuffer; 117 uint32_t ui32TxBufferSize; 118 uint8_t *pui8RxBuffer; 119 uint32_t ui32RxBufferSize; 120 } 121 am_hal_uart_config_t; 122 123 //***************************************************************************** 124 // 125 //! @brief UART transfer structure. 126 // 127 //! This structure describes a UART transaction that can be performed by \e 128 //! am_hal_uart_transfer() 129 // 130 //***************************************************************************** 131 typedef struct 132 { 133 //! Determines whether data should be read or written. 134 //! 135 //! Should be either AM_HAL_UART_WRITE or AM_HAL_UART_READ 136 uint32_t ui32Direction; 137 138 //! Pointer to data to be sent, or space to fill with received data. 139 uint8_t *pui8Data; 140 141 //! Number of bytes to send or receive. 142 uint32_t ui32NumBytes; 143 144 //! Timeout in milliseconds. 145 //! 146 //! Given a timeout value, the \e am_hal_uart_transfer() function will keep 147 //! trying to transfer data until either the number of bytes is satisfied, 148 //! or the time runs out. If provided with a value of zero, the transfer 149 //! function will only send as much data as it can immediately deal with. 150 //! If provided with a timeout value of \e AM_HAL_UART_WAIT_FOREVER, the 151 //! function will block until either the final "read" byte is received or 152 //! the final "write" byte is placed in the output buffer. 153 uint32_t ui32TimeoutMs; 154 155 //! Number of bytes successfully transferred. 156 uint32_t *pui32BytesTransferred; 157 } 158 am_hal_uart_transfer_t; 159 160 //***************************************************************************** 161 // 162 //! Maximum baudrate supported is 921600 for Apollo3-A1 and 1.5Mbaud for 163 //! Apollo3-B0. 164 // 165 //***************************************************************************** 166 #define AM_HAL_UART_MAXIMUM_BAUDRATE_A1 921600 167 #define AM_HAL_UART_MAXIMUM_BAUDRATE_B0 1500000 168 169 //***************************************************************************** 170 // 171 //! @name Uart transfer options. 172 //! @{ 173 // 174 //***************************************************************************** 175 #define AM_HAL_UART_WRITE 0 176 #define AM_HAL_UART_READ 1 177 #define AM_HAL_UART_WAIT_FOREVER 0xFFFFFFFF 178 //! @} 179 180 //***************************************************************************** 181 // 182 //! UART conficuration option values. 183 // 184 //***************************************************************************** 185 186 //***************************************************************************** 187 // 188 //! @name Data bits Macros 189 //! @{ 190 // 191 //***************************************************************************** 192 #define AM_HAL_UART_DATA_BITS_8 (_VAL2FLD(UART0_LCRH_WLEN, 3)) 193 #define AM_HAL_UART_DATA_BITS_7 (_VAL2FLD(UART0_LCRH_WLEN, 2)) 194 #define AM_HAL_UART_DATA_BITS_6 (_VAL2FLD(UART0_LCRH_WLEN, 1)) 195 #define AM_HAL_UART_DATA_BITS_5 (_VAL2FLD(UART0_LCRH_WLEN, 0)) 196 //! @} 197 198 //***************************************************************************** 199 // 200 //! @name Parity Macros 201 //! @{ 202 // 203 //***************************************************************************** 204 #define AM_HAL_UART_PARITY_NONE 0 205 #define AM_HAL_UART_PARITY_ODD UART0_LCRH_PEN_Msk 206 #define AM_HAL_UART_PARITY_EVEN (UART0_LCRH_PEN_Msk | \ 207 UART0_LCRH_EPS_Msk) 208 //! @} 209 210 //***************************************************************************** 211 // 212 //! @name Stop Bits Macros 213 //! @{ 214 // 215 //***************************************************************************** 216 #define AM_HAL_UART_ONE_STOP_BIT (_VAL2FLD(UART0_LCRH_STP2, 0)) 217 #define AM_HAL_UART_TWO_STOP_BITS (_VAL2FLD(UART0_LCRH_STP2, 1)) 218 //! @} 219 220 //***************************************************************************** 221 // 222 //! @name Flow control Macros 223 //! @{ 224 // 225 //***************************************************************************** 226 #define AM_HAL_UART_FLOW_CTRL_NONE 0 227 #define AM_HAL_UART_FLOW_CTRL_CTS_ONLY UART0_CR_CTSEN_Msk 228 #define AM_HAL_UART_FLOW_CTRL_RTS_ONLY UART0_CR_RTSEN_Msk 229 #define AM_HAL_UART_FLOW_CTRL_RTS_CTS (UART0_CR_CTSEN_Msk | \ 230 UART0_CR_RTSEN_Msk) 231 //! @} 232 //***************************************************************************** 233 // 234 //! @name FIFO enable/disable Macros 235 //! @{ 236 // 237 //***************************************************************************** 238 #define AM_HAL_UART_FIFO_ENABLE (_VAL2FLD(UART0_LCRH_FEN, 1)) 239 #define AM_HAL_UART_FIFO_DISABLE (_VAL2FLD(UART0_LCRH_FEN, 0)) 240 //! @} 241 242 //***************************************************************************** 243 // 244 //! @name TX FIFO interrupt level settings Macros 245 //! @{ 246 // 247 //***************************************************************************** 248 #define AM_HAL_UART_TX_FIFO_1_8 (_VAL2FLD(UART0_IFLS_TXIFLSEL, 0)) 249 #define AM_HAL_UART_TX_FIFO_1_4 (_VAL2FLD(UART0_IFLS_TXIFLSEL, 1)) 250 #define AM_HAL_UART_TX_FIFO_1_2 (_VAL2FLD(UART0_IFLS_TXIFLSEL, 2)) 251 #define AM_HAL_UART_TX_FIFO_3_4 (_VAL2FLD(UART0_IFLS_TXIFLSEL, 3)) 252 #define AM_HAL_UART_TX_FIFO_7_8 (_VAL2FLD(UART0_IFLS_TXIFLSEL, 4)) 253 //! @} 254 255 //***************************************************************************** 256 // 257 //! @name RX FIFO interrupt level settings Macros 258 //! @{ 259 // 260 //***************************************************************************** 261 #define AM_HAL_UART_RX_FIFO_1_8 (_VAL2FLD(UART0_IFLS_RXIFLSEL, 0)) 262 #define AM_HAL_UART_RX_FIFO_1_4 (_VAL2FLD(UART0_IFLS_RXIFLSEL, 1)) 263 #define AM_HAL_UART_RX_FIFO_1_2 (_VAL2FLD(UART0_IFLS_RXIFLSEL, 2)) 264 #define AM_HAL_UART_RX_FIFO_3_4 (_VAL2FLD(UART0_IFLS_RXIFLSEL, 3)) 265 #define AM_HAL_UART_RX_FIFO_7_8 (_VAL2FLD(UART0_IFLS_RXIFLSEL, 4)) 266 //! @} 267 268 //***************************************************************************** 269 // 270 //! @name UART interrupts Macros 271 //! @{ 272 // 273 //***************************************************************************** 274 #define AM_HAL_UART_INT_OVER_RUN UART0_IER_OEIM_Msk 275 #define AM_HAL_UART_INT_BREAK_ERR UART0_IER_BEIM_Msk 276 #define AM_HAL_UART_INT_PARITY_ERR UART0_IER_PEIM_Msk 277 #define AM_HAL_UART_INT_FRAME_ERR UART0_IER_FEIM_Msk 278 #define AM_HAL_UART_INT_RX_TMOUT UART0_IER_RTIM_Msk 279 #define AM_HAL_UART_INT_TX UART0_IER_TXIM_Msk 280 #define AM_HAL_UART_INT_RX UART0_IER_RXIM_Msk 281 #define AM_HAL_UART_INT_DSRM UART0_IER_DSRMIM_Msk 282 #define AM_HAL_UART_INT_DCDM UART0_IER_DCDMIM_Msk 283 #define AM_HAL_UART_INT_CTSM UART0_IER_CTSMIM_Msk 284 #define AM_HAL_UART_INT_TXCMP UART0_IER_TXCMPMIM_Msk 285 //! @} 286 287 //***************************************************************************** 288 // 289 //! @name UART Flag Register 290 //! @brief Macro definitions for UART Flag Register Bits. 291 //! 292 //! They may be used with the \e am_hal_uart_flags_get() function. 293 //! 294 //! @{ 295 // 296 //***************************************************************************** 297 #define AM_HAL_UART_FR_TX_EMPTY (_VAL2FLD(UART0_FR_TXFE, UART0_FR_TXFE_XMTFIFO_EMPTY)) 298 #define AM_HAL_UART_FR_RX_FULL (_VAL2FLD(UART0_FR_RXFF, UART0_FR_RXFF_RCVFIFO_FULL)) 299 #define AM_HAL_UART_FR_TX_FULL (_VAL2FLD(UART0_FR_TXFF, UART0_FR_TXFF_XMTFIFO_FULL)) 300 #define AM_HAL_UART_FR_RX_EMPTY (_VAL2FLD(UART0_FR_RXFE, UART0_FR_RXFE_RCVFIFO_EMPTY)) 301 #define AM_HAL_UART_FR_BUSY (_VAL2FLD(UART0_FR_BUSY, UART0_FR_BUSY_BUSY)) 302 #define AM_HAL_UART_FR_DCD_DETECTED (_VAL2FLD(UART0_FR_DCD, UART0_FR_DCD_DETECTED)) 303 #define AM_HAL_UART_FR_DSR_READY (_VAL2FLD(UART0_FR_DSR, UART0_FR_DSR_READY)) 304 #define AM_HAL_UART_FR_CTS UART0_FR_CTS_Msk 305 //! @} 306 307 //***************************************************************************** 308 // 309 //! UART FIFO size for Apollo3. 310 // 311 //***************************************************************************** 312 #define AM_HAL_UART_FIFO_MAX 32 313 314 //***************************************************************************** 315 // 316 //! Turn timeouts into indefinite waits. 317 // 318 //***************************************************************************** 319 #define AM_HAL_UART_WAIT_FOREVER 0xFFFFFFFF 320 321 typedef enum 322 { 323 AM_HAL_UART_STATUS_SUCCESS = 0, 324 AM_HAL_UART_STATUS_RX_QUEUE_FULL = 0x0001, 325 AM_HAL_UART_STATUS_RX_DATA_AVAIL = 0x0002, 326 AM_HAL_UART_STATUS_TX_QUEUE_FULL = 0x0004, 327 AM_HAL_UART_STATUS_TX_COMPLETE = 0x0008, 328 AM_HAL_UART_STATUS_TX_BUSY = 0x0010, 329 AM_HAL_UART_STATUS_FRM_ERROR = UART0_DR_FEDATA_Msk, 330 AM_HAL_UART_STATUS_PRTY_ERROR = UART0_DR_PEDATA_Msk, 331 AM_HAL_UART_STATUS_BRK_ERROR = UART0_DR_BEDATA_Msk, 332 AM_HAL_UART_STATUS_OVRN_ERROR = UART0_DR_OEDATA_Msk, 333 AM_HAL_UART_STATUS_INTRNL_MSK = (AM_HAL_UART_STATUS_FRM_ERROR 334 | AM_HAL_UART_STATUS_OVRN_ERROR 335 | AM_HAL_UART_STATUS_PRTY_ERROR 336 | AM_HAL_UART_STATUS_BRK_ERROR), 337 338 AM_HAL_UART_STATUS_x32 = 0x80000000, 339 } 340 am_hal_uart_status_t; 341 342 typedef enum 343 { 344 AM_HAL_UART_ERR_BUS_ERROR = AM_HAL_STATUS_MODULE_SPECIFIC_START, 345 AM_HAL_UART_ERR_RX_QUEUE_FULL, 346 AM_HAL_UART_ERR_CLOCK_NOT_CONFIGURED, 347 AM_HAL_UART_ERR_BAUDRATE_NOT_POSSIBLE, 348 } 349 am_hal_uart_errors_t; 350 351 352 //***************************************************************************** 353 // 354 //! @brief Initialize the UART interface. 355 //! 356 //! @param ui32Module - The module number for the UART to initialize. 357 //! @param ppHandle - The location to write the UART handle. 358 //! 359 //! This function sets internal tracking variables associated with a specific 360 //! UART module. It should be the first UART API called for each UART module in 361 //! use. The handle can be used to interact with the UART 362 //! 363 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 364 // 365 //***************************************************************************** 366 extern uint32_t am_hal_uart_initialize(uint32_t ui32Module, void **ppHandle); 367 368 //***************************************************************************** 369 // 370 //! @brief Deinitialize the UART interface. 371 //! 372 //! @param pHandle - A previously initialized UART handle. 373 //! 374 //! This function effectively disables future calls to interact with the UART 375 //! refered to by \e pHandle. The user may call this function if UART operation 376 //! is no longer desired. 377 //! 378 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 379 // 380 //***************************************************************************** 381 extern uint32_t am_hal_uart_deinitialize(void *pHandle); 382 383 //***************************************************************************** 384 // 385 //! @brief Change the power state of the UART module. 386 //! 387 //! @param pHandle - The handle for the UART to operate on. 388 //! @param ePowerState - the desired power state of the UART. 389 //! @param bRetainState - A flag to ask the HAL to save UART registers. 390 //! 391 //! This function can be used to switch the power to the UART on or off. If \e 392 //! bRetainState is true during a powerdown operation, it will store the UART 393 //! configuration registers to SRAM, so it can restore them on power-up. 394 //! 395 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 396 // 397 //***************************************************************************** 398 extern uint32_t am_hal_uart_power_control(void *pHandle, 399 am_hal_sysctrl_power_state_e ePowerState, 400 bool bRetainState); 401 402 //***************************************************************************** 403 // 404 //! @brief Used to configure basic UART settings. 405 //! 406 //! @param pHandle - The handle for the UART to operate on. 407 //! @param psConfig - A structure of UART configuration options. 408 //! 409 //! This function takes the options from an \e am_hal_uart_config_t structure, 410 //! and applies them to the UART referred to by \e pHandle. 411 //! 412 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 413 // 414 //***************************************************************************** 415 extern uint32_t am_hal_uart_configure(void *pHandle, 416 const am_hal_uart_config_t *psConfig); 417 418 //***************************************************************************** 419 // 420 //! @brief Transfer data through the UART interface. 421 //! 422 //! @param pHandle - The handle for the UART to operate on. 423 //! @param pTransfer - A structure describing the operation. 424 //! 425 //! This function executes a transaction as described by the \e 426 //! am_hal_uart_transfer_t structure. It can either read or write, and it will 427 //! take advantage of any buffer space provided by the \e 428 //! am_hal_uart_configure() function. 429 //! 430 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 431 // 432 //***************************************************************************** 433 extern uint32_t am_hal_uart_transfer(void *pHandle, 434 const am_hal_uart_transfer_t *pTransfer); 435 436 //***************************************************************************** 437 // 438 //! @brief Wait for the UART TX to become idle 439 //! 440 //! @param pHandle - The handle for the UART to operate on. 441 //! 442 //! This function waits (polling) for all data in the UART TX FIFO and UART TX 443 //! buffer (if configured) to be fully sent on the physical UART interface. 444 //! This is not the most power-efficient way to wait for UART idle, but it can be 445 //! useful in simpler applications, or where power-efficiency is less important. 446 //! 447 //! Once this function returns, the UART can be safely disabled without 448 //! interfering with any previous transmissions. 449 //! 450 //! For a more power-efficient way to shut down the UART, check the 451 //! \e am_hal_uart_interrupt_service() function. 452 //! 453 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 454 // 455 //***************************************************************************** 456 extern uint32_t am_hal_uart_tx_flush(void *pHandle); 457 458 //***************************************************************************** 459 // 460 //! @brief Read the UART flags. 461 //! 462 //! @param pHandle - The handle for the UART to operate on. 463 //! @param pui32Flags - The destination pointer for the UART flags. 464 //! 465 //! The UART hardware provides some information about the state of the physical 466 //! interface at all times. This function provides a way to read that data 467 //! directly. Below is a list of all possible UART flags. 468 //! 469 //! These correspond directly to the bits in the UART_FR register. 470 //! 471 //! @code 472 //! 473 //! AM_HAL_UART_FR_TX_EMPTY 474 //! AM_HAL_UART_FR_RX_FULL 475 //! AM_HAL_UART_FR_TX_FULL 476 //! AM_HAL_UART_FR_RX_EMPTY 477 //! AM_HAL_UART_FR_BUSY 478 //! AM_HAL_UART_FR_DCD_DETECTED 479 //! AM_HAL_UART_FR_DSR_READY 480 //! AM_HAL_UART_FR_CTS 481 //! 482 //! @endcode 483 //! 484 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 485 // 486 //***************************************************************************** 487 extern uint32_t am_hal_uart_flags_get(void *pHandle, uint32_t *pui32Flags); 488 489 //***************************************************************************** 490 // 491 //! @brief Read the UART FIFO directly. 492 //! 493 //! @param pHandle - The handle for the UART to operate on. 494 //! @param pui8Data - A pointer where the UART data should be written. 495 //! @param ui32NumBytes - The number of bytes to transfer. 496 //! @param pui32NumBytesRead - The number of bytes actually transferred. 497 //! 498 //! This function reads the UART FIFO directly, and writes the resulting bytes 499 //! to pui8Data. Since the UART FIFO hardware has no direct size indicator, the 500 //! caller can only specify the maximum number of bytes they can handle. This 501 //! function will try to read as many bytes as possible. At the end of the 502 //! transfer, the number of bytes actually transferred will be written to the 503 //! pui32NumBytesRead parameter. 504 //! 505 //! @return AM_HAL_STATUS_SUCCESS or applicable UART error. 506 // 507 //***************************************************************************** 508 extern uint32_t am_hal_uart_fifo_read(void *pHandle, 509 uint8_t *pui8Data, 510 uint32_t ui32NumBytes, 511 uint32_t *pui32NumBytesRead); 512 513 //***************************************************************************** 514 // 515 //! @brief Write the UART FIFO directly. 516 //! 517 //! @param pHandle - The handle for the UART to operate on. 518 //! @param pui8Data - A pointer where the UART data should be written. 519 //! @param ui32NumBytes - The number of bytes to transfer. 520 //! @param pui32NumBytesWritten - The number of bytes actually transferred. 521 //! 522 //! This function reads from pui8Data, and writes the requested number of bytes 523 //! directly to the UART FIFO. Since the UART FIFO hardware has no register to 524 //! tell us how much free space it has, the caller can only specify the number 525 //! of bytes they would like to send. This function will try to write as many 526 //! bytes as possible up to the requested number. At the end of the transfer, 527 //! the number of bytes actually transferred will be written to the 528 //! pui32NumBytesWritten parameter. 529 //! 530 //! @return AM_HAL_STATUS_SUCCESS or applicable UART error. 531 // 532 //***************************************************************************** 533 extern uint32_t am_hal_uart_fifo_write(void *pHandle, 534 uint8_t *pui8Data, 535 uint32_t ui32NumBytes, 536 uint32_t *pui32NumBytesWritten); 537 538 //***************************************************************************** 539 // 540 //! @brief This function handles the UART buffers during UART interrupts. 541 //! 542 //! @param pHandle - The handle for the UART to operate on. 543 //! @param ui32Status - The interrupt status at the time of ISR entry. 544 //! @param pui32UartTxIdle - Can be used to store the UART idle status. 545 //! 546 //! The main purpose of this function is to manage the UART buffer system. Any 547 //! buffers configured by \e am_hal_uart_buffer_configure will be managed by 548 //! this service routine. Data queued for transmit will be added to the UART TX 549 //! FIFO as space allows, and data stored in the UART RX FIFO will be copied 550 //! out and stored in the RX buffer. This function will skip this transfer for 551 //! any buffer that has not been configured. 552 //! 553 //! In addition, this function can be used to alert the caller when the UART 554 //! becomes idle via the optional \e pui32UartTxIdle argument. This function 555 //! will set this variable any time it completes its operation and the UART TX 556 //! channel is no longer in use (including both the FIFO and any configured 557 //! buffer). To make sure this happens as early as possible, the user may 558 //! enable the UART_TXCMP interrupt as shown below. 559 //! 560 //! For RTOS-enabled cases, this function does not necessarily need to be 561 //! called inside the actual ISR for the UART, but it should be called promptly 562 //! in response to the receipt of a UART TX, RX, or RX timeout interrupt. If 563 //! the service routine is not called quickly enough, the caller risks an RX 564 //! FIFO overflow (data can be lost here), or a TX FIFO underflow (usually not 565 //! harmful). 566 //! 567 //! @code 568 //! 569 //! void 570 //! am_uart_isr(void) 571 //! { 572 //! // 573 //! // Service the FIFOs as necessary, and clear the interrupts. 574 //! // 575 //! uint32_t ui32Status; 576 //! uint32_t ui32UartIdle; 577 //! 578 //! am_hal_uart_interrupt_status_get(UART, &ui32Status, true); 579 //! am_hal_uart_interrupt_clear(UART, ui32Status); 580 //! am_hal_uart_interrupt_service(UART, ui32Status, &ui32UartIdle); 581 //! 582 //! ui32TXDoneFlag = ui32UartIdle; 583 //! } 584 //! 585 //! int 586 //! main(void) 587 //! { 588 //! ... 589 //! 590 //! // Initialize, power up, and configure the UART. 591 //! am_hal_uart_initialize(0, &UART); 592 //! am_hal_uart_power_control(UART, AM_HAL_SYSCTRL_WAKE, false); 593 //! am_hal_uart_configure(UART, &sUartConfig); 594 //! 595 //! ... 596 //! 597 //! // Enable the UART0 interrupt vector. 598 //! am_hal_uart_interrupt_enable(UART, AM_REG_UART_IER_TXCMPMIM_M); 599 //! am_hal_interrupt_enable(AM_HAL_INTERRUPT_UART0); 600 //! am_hal_interrupt_master_enable(); 601 //! } 602 //! 603 //! @endcode 604 //! 605 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 606 // 607 //***************************************************************************** 608 extern uint32_t am_hal_uart_interrupt_service(void *pHandle, 609 uint32_t ui32Status, 610 uint32_t *pui32UartTxIdle); 611 612 //***************************************************************************** 613 // 614 //! @brief Enable interrupts. 615 //! 616 //! @param pHandle - The handle for the UART to operate on. 617 //! @param ui32IntMask - The bitmask of interrupts to enable. 618 //! 619 //! This function enables the UART interrupt(s) given by ui32IntMask. If 620 //! multiple interrupts are desired, they can be OR'ed together. 621 //! 622 //! @note This function need not be called for UART FIFO interrupts if the UART 623 //! buffer service provided by \e am_hal_uart_buffer_configure() and \e 624 //! am_hal_uart_interrupt_service() is already in use. Non-FIFO-related 625 //! interrupts do require the use of this function. 626 //! 627 //! The full list of interrupts is given by the following: 628 //! 629 //! @code 630 //! 631 //! AM_HAL_UART_INT_OVER_RUN 632 //! AM_HAL_UART_INT_BREAK_ERR 633 //! AM_HAL_UART_INT_PARITY_ERR 634 //! AM_HAL_UART_INT_FRAME_ERR 635 //! AM_HAL_UART_INT_RX_TMOUT 636 //! AM_HAL_UART_INT_TX 637 //! AM_HAL_UART_INT_RX 638 //! AM_HAL_UART_INT_DSRM 639 //! AM_HAL_UART_INT_DCDM 640 //! AM_HAL_UART_INT_CTSM 641 //! AM_HAL_UART_INT_TXCMP 642 //! 643 //! @endcode 644 //! 645 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 646 // 647 //***************************************************************************** 648 extern uint32_t am_hal_uart_interrupt_enable(void *pHandle, 649 uint32_t ui32IntMask); 650 651 //***************************************************************************** 652 // 653 //! @brief Disable interrupts. 654 //! 655 //! @param pHandle - The handle for the UART to operate on. 656 //! @param ui32IntMask - The bitmask of interrupts to disable. 657 //! 658 //! This function disables the UART interrupt(s) given by ui32IntMask. If 659 //! multiple interrupts need to be disabled, they can be OR'ed together. 660 //! 661 //! @note This function need not be called for UART FIFO interrupts if the UART 662 //! buffer service provided by \e am_hal_uart_buffer_configure() and \e 663 //! am_hal_uart_interrupt_service() is already in use. Non-FIFO-related 664 //! interrupts do require the use of this function. 665 //! 666 //! The full list of interrupts is given by the following: 667 //! 668 //! @code 669 //! 670 //! AM_HAL_UART_INT_OVER_RUN 671 //! AM_HAL_UART_INT_BREAK_ERR 672 //! AM_HAL_UART_INT_PARITY_ERR 673 //! AM_HAL_UART_INT_FRAME_ERR 674 //! AM_HAL_UART_INT_RX_TMOUT 675 //! AM_HAL_UART_INT_TX 676 //! AM_HAL_UART_INT_RX 677 //! AM_HAL_UART_INT_DSRM 678 //! AM_HAL_UART_INT_DCDM 679 //! AM_HAL_UART_INT_CTSM 680 //! AM_HAL_UART_INT_TXCMP 681 //! 682 //! @endcode 683 //! 684 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 685 // 686 //***************************************************************************** 687 extern uint32_t am_hal_uart_interrupt_disable(void *pHandle, 688 uint32_t ui32IntMask); 689 690 //***************************************************************************** 691 // 692 //! @brief Clear interrupt status. 693 //! 694 //! @param pHandle - The handle for the UART to operate on. 695 //! @param ui32IntMask - The bitmask of interrupts to clear. 696 //! 697 //! This function clears the UART interrupt(s) given by ui32IntMask. If 698 //! multiple interrupts need to be cleared, they can be OR'ed together. 699 //! 700 //! The full list of interrupts is given by the following: 701 //! 702 //! @code 703 //! 704 //! AM_HAL_UART_INT_OVER_RUN 705 //! AM_HAL_UART_INT_BREAK_ERR 706 //! AM_HAL_UART_INT_PARITY_ERR 707 //! AM_HAL_UART_INT_FRAME_ERR 708 //! AM_HAL_UART_INT_RX_TMOUT 709 //! AM_HAL_UART_INT_TX 710 //! AM_HAL_UART_INT_RX 711 //! AM_HAL_UART_INT_DSRM 712 //! AM_HAL_UART_INT_DCDM 713 //! AM_HAL_UART_INT_CTSM 714 //! AM_HAL_UART_INT_TXCMP 715 //! 716 //! @endcode 717 //! 718 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 719 // 720 //***************************************************************************** 721 extern uint32_t am_hal_uart_interrupt_clear(void *pHandle, 722 uint32_t ui32IntMask); 723 724 //***************************************************************************** 725 // 726 //! @brief Read interrupt status. 727 //! 728 //! @param pHandle - The handle for the UART to operate on. 729 //! @param pui32Status - The returned interrupt status (all bits OR'ed 730 //! together) 731 //! @param bEnabledOnly - determines whether to read interrupts that were not 732 //! enabled. 733 //! 734 //! This function reads the status the UART interrupt(s) if \e bEnabled is 735 //! true, it will only return the status of the enabled interrupts. Otherwise, 736 //! it will return the status of all interrupts, enabled or disabled. 737 //! 738 //! The full list of interrupts is given by the following: 739 //! 740 //! @code 741 //! 742 //! AM_HAL_UART_INT_OVER_RUN 743 //! AM_HAL_UART_INT_BREAK_ERR 744 //! AM_HAL_UART_INT_PARITY_ERR 745 //! AM_HAL_UART_INT_FRAME_ERR 746 //! AM_HAL_UART_INT_RX_TMOUT 747 //! AM_HAL_UART_INT_TX 748 //! AM_HAL_UART_INT_RX 749 //! AM_HAL_UART_INT_DSRM 750 //! AM_HAL_UART_INT_DCDM 751 //! AM_HAL_UART_INT_CTSM 752 //! AM_HAL_UART_INT_TXCMP 753 //! 754 //! @endcode 755 //! 756 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 757 // 758 //***************************************************************************** 759 extern uint32_t am_hal_uart_interrupt_status_get(void *pHandle, 760 uint32_t *pui32Status, 761 bool bEnabledOnly); 762 763 764 //***************************************************************************** 765 // 766 //! @brief Check to see which interrupts are enabled. 767 //! 768 //! @param pHandle - The handle for the UART to operate on. 769 //! 770 //! @param pui32IntMask - The current set of interrupt enable bits (all bits 771 //! OR'ed together) 772 //! 773 //! This function checks the UART Interrupt Enable Register to see which UART 774 //! interrupts are currently enabled. The result will be an interrupt mask with 775 //! one bit set for each of the currently enabled UART interrupts. 776 //! 777 //! The full set of UART interrupt bits is given by the list below: 778 //! 779 //! @code 780 //! 781 //! AM_HAL_UART_INT_OVER_RUN 782 //! AM_HAL_UART_INT_BREAK_ERR 783 //! AM_HAL_UART_INT_PARITY_ERR 784 //! AM_HAL_UART_INT_FRAME_ERR 785 //! AM_HAL_UART_INT_RX_TMOUT 786 //! AM_HAL_UART_INT_TX 787 //! AM_HAL_UART_INT_RX 788 //! AM_HAL_UART_INT_DSRM 789 //! AM_HAL_UART_INT_DCDM 790 //! AM_HAL_UART_INT_CTSM 791 //! AM_HAL_UART_INT_TXCMP 792 //! 793 //! @endcode 794 //! 795 //! @return AM_HAL_STATUS_SUCCESS or applicable UART errors. 796 // 797 //***************************************************************************** 798 extern uint32_t am_hal_uart_interrupt_enable_get(void *pHandle, uint32_t *pui32IntMask); 799 800 //***************************************************************************** 801 //! @brief Apply various specific commands/controls on the UART module 802 //! 803 //! @param pHandle - The handle for the UART to operate on. 804 //! @param eControl 805 //! @param pArgs 806 //! @return uint32_t 807 //***************************************************************************** 808 extern uint32_t am_hal_uart_control(void *pHandle, am_hal_uart_control_e eControl, void *pArgs) ; 809 810 //***************************************************************************** 811 // 812 //! @brief 813 //! 814 //! @param pHandle 815 //! @param pui8TxBuffer 816 //! @param ui32TxBufferSize 817 //! @param pui8RxBuffer 818 //! @param ui32RxBufferSize 819 //! 820 //! @return 821 // 822 //***************************************************************************** 823 extern uint32_t am_hal_uart_buffer_configure(void *pHandle, 824 uint8_t *pui8TxBuffer, 825 uint32_t ui32TxBufferSize, 826 uint8_t *pui8RxBuffer, 827 uint32_t ui32RxBufferSize); 828 829 830 //***************************************************************************** 831 // 832 //! @brief called from uart ISR 833 //! 834 //! @details this code process uart tx, txcomplete, and rx interrupts, it is 835 //! designed to be used with uart fifos enabled and tx and rx queues enabled 836 //! The application will add data to the tx queue with the am_hal_uart_append_tx 837 //! call. The application will read data from the rx queue with the 838 //! am_hal_uart_get_rx_data 839 //! 840 //! @param pHandle is the handle for the UART to operate on. 841 //! 842 //! This function should be called from the ISR and then recieve/transmit data 843 //! from/to hardware FIFO. 844 //! 845 //! @return am_hal_uart_status_t this is a bitfield 846 // 847 //***************************************************************************** 848 extern am_hal_uart_status_t am_hal_uart_interrupt_queue_service(void *pHandle); 849 850 //***************************************************************************** 851 // 852 //! @brief append data to uart tx output queue 853 //! 854 //! @details this code is used in conjunction with am_hal_uart_interrupt_queue_service 855 //! it is designed to be used with uart fifos enabled and tx and rx queues enabled 856 //! It will add data to the uart tx queue and get uart tx running 857 //! 858 //! @note the uart fifos and tx queue must be enabled before calling this 859 //! 860 //! @param pHandle - The handle for the UART to operate on. 861 //! @param pui8Buff - Pointer to data buffer 862 //! @param ui32NumBytes - The Number of bytes to send 863 //! 864 //! @return standard hal status 865 // 866 //***************************************************************************** 867 extern uint32_t am_hal_uart_append_tx( void *pHandle, 868 uint8_t *pui8Buff, 869 uint32_t ui32NumBytes); 870 871 //***************************************************************************** 872 // 873 //! @brief move data from rx queue (filled via ISR) into user supplied buffer 874 //! 875 //! @details this code is used in conjunction with am_hal_uart_interrupt_queue_service 876 //! it is designed to be used with uart fifos enabled and tx and rx queues enabled 877 //! It will add data to the uart tx queue and get uart tx running 878 //! 879 //! @note the uart fifos and rx queue must be enabled before calling this 880 //! 881 //! @param pHandle - UART handle 882 //! @param pui8DestBuff - data is moved into this buffer (user buffer) 883 //! @param ui32MaxBytes - max number of bytes that can be moved 884 //! 885 //! @return - actual number of bytes loaded into user buffer 886 // 887 //***************************************************************************** 888 extern int32_t am_hal_uart_get_rx_data( void *pHandle, 889 uint8_t *pui8DestBuff, 890 uint32_t ui32MaxBytes); 891 892 893 #ifdef __cplusplus 894 } 895 #endif 896 897 #endif // AM_HAL_UART_H 898 899 //***************************************************************************** 900 // 901 // End Doxygen group. 902 //! @} 903 // 904 //***************************************************************************** 905