1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>WUT</name> 5 <description>32-bit reloadable timer that can be used for timing and wakeup.</description> 6 <baseAddress>0x40006400</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x400</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <interrupt> 13 <name>Wakeup_Timer</name> 14 <description>WUT IRQ</description> 15 <value>1</value> 16 </interrupt> 17 <registers> 18 <register> 19 <name>CNT</name> 20 <description>Count. This register stores the current timer count.</description> 21 <addressOffset>0x00</addressOffset> 22 <resetValue>0x00000001</resetValue> 23 <fields> 24 <field> 25 <name>COUNT</name> 26 <description>Timer Count Value. </description> 27 <bitOffset>0</bitOffset> 28 <bitWidth>32</bitWidth> 29 </field> 30 </fields> 31 </register> 32 <register> 33 <name>CMP</name> 34 <description>Compare. This register stores the compare value, which is used to set the maximum count value to initiate a reload of the timer to 0x0001.</description> 35 <addressOffset>0x04</addressOffset> 36 <resetValue>0x0000FFFF</resetValue> 37 <fields> 38 <field> 39 <name>COMPARE</name> 40 <description>Timer Compare Value.</description> 41 <bitOffset>0</bitOffset> 42 <bitWidth>32</bitWidth> 43 </field> 44 </fields> 45 </register> 46 <register> 47 <name>INTR</name> 48 <description>Clear Interrupt. Writing a value (0 or 1) to a bit in this register clears the associated interrupt.</description> 49 <addressOffset>0x0C</addressOffset> 50 <modifiedWriteValues>oneToClear</modifiedWriteValues> 51 <fields> 52 <field> 53 <name>IRQ_CLR</name> 54 <description>Clear Interrupt.</description> 55 <bitOffset>0</bitOffset> 56 <bitWidth>1</bitWidth> 57 </field> 58 </fields> 59 </register> 60 <register> 61 <name>CTRL</name> 62 <description>Timer Control Register.</description> 63 <addressOffset>0x10</addressOffset> 64 <fields> 65 <field> 66 <name>TMODE</name> 67 <description>Timer Mode.</description> 68 <bitOffset>0</bitOffset> 69 <bitWidth>3</bitWidth> 70 <enumeratedValues> 71 <enumeratedValue> 72 <name>oneShot</name> 73 <description>One Shot Mode.</description> 74 <value>0</value> 75 </enumeratedValue> 76 <enumeratedValue> 77 <name>continuous</name> 78 <description>Continuous Mode.</description> 79 <value>1</value> 80 </enumeratedValue> 81 <enumeratedValue> 82 <name>counter</name> 83 <description>Counter Mode.</description> 84 <value>2</value> 85 </enumeratedValue> 86 <enumeratedValue> 87 <name>capture</name> 88 <description>Capture Mode.</description> 89 <value>4</value> 90 </enumeratedValue> 91 <enumeratedValue> 92 <name>compare</name> 93 <description>Compare Mode.</description> 94 <value>5</value> 95 </enumeratedValue> 96 <enumeratedValue> 97 <name>gated</name> 98 <description>Gated Mode.</description> 99 <value>6</value> 100 </enumeratedValue> 101 <enumeratedValue> 102 <name>captureCompare</name> 103 <description>Capture/Compare Mode.</description> 104 <value>7</value> 105 </enumeratedValue> 106 </enumeratedValues> 107 </field> 108 <field> 109 <name>PRES</name> 110 <description>Prescaler. Set the Timer's prescaler value. The prescaler divides the PCLK input to the timer and sets the Timer's Count Clock, F_CNT_CLK = PCLK(HZ)/prescaler. The Timer's prescaler setting is a 4-bit value with pres3:pres[2:0].</description> 111 <bitOffset>3</bitOffset> 112 <bitWidth>3</bitWidth> 113 <enumeratedValues> 114 <enumeratedValue> 115 <name>div1</name> 116 <description>Divide by 1.</description> 117 <value>0</value> 118 </enumeratedValue> 119 <enumeratedValue> 120 <name>div2</name> 121 <description>Divide by 2.</description> 122 <value>1</value> 123 </enumeratedValue> 124 <enumeratedValue> 125 <name>div4</name> 126 <description>Divide by 4.</description> 127 <value>2</value> 128 </enumeratedValue> 129 <enumeratedValue> 130 <name>div8</name> 131 <description>Divide by 8.</description> 132 <value>3</value> 133 </enumeratedValue> 134 <enumeratedValue> 135 <name>div16</name> 136 <description>Divide by 16.</description> 137 <value>4</value> 138 </enumeratedValue> 139 <enumeratedValue> 140 <name>div32</name> 141 <description>Divide by 32.</description> 142 <value>5</value> 143 </enumeratedValue> 144 <enumeratedValue> 145 <name>div64</name> 146 <description>Divide by 64.</description> 147 <value>6</value> 148 </enumeratedValue> 149 <enumeratedValue> 150 <name>div128</name> 151 <description>Divide by 128.</description> 152 <value>7</value> 153 </enumeratedValue> 154 </enumeratedValues> 155 </field> 156 <field> 157 <name>TPOL</name> 158 <description>Timer input/output polarity bit.</description> 159 <bitOffset>6</bitOffset> 160 <bitWidth>1</bitWidth> 161 <enumeratedValues> 162 <enumeratedValue> 163 <name>activeHi</name> 164 <description>Active High.</description> 165 <value>0</value> 166 </enumeratedValue> 167 <enumeratedValue> 168 <name>activeLo</name> 169 <description>Active Low.</description> 170 <value>1</value> 171 </enumeratedValue> 172 </enumeratedValues> 173 </field> 174 <field> 175 <name>TEN</name> 176 <description>Timer Enable.</description> 177 <bitOffset>7</bitOffset> 178 <bitWidth>1</bitWidth> 179 <enumeratedValues> 180 <enumeratedValue> 181 <name>dis</name> 182 <description>Disable.</description> 183 <value>0</value> 184 </enumeratedValue> 185 <enumeratedValue> 186 <name>en</name> 187 <description>Enable.</description> 188 <value>1</value> 189 </enumeratedValue> 190 </enumeratedValues> 191 </field> 192 <field> 193 <name>PRES3</name> 194 <description>MSB of prescaler value.</description> 195 <bitOffset>8</bitOffset> 196 <bitWidth>1</bitWidth> 197 </field> 198 </fields> 199 </register> 200 <register> 201 <name>NOLCMP</name> 202 <description>Timer Non-Overlapping Compare Register.</description> 203 <addressOffset>0x14</addressOffset> 204 <fields> 205 <field> 206 <name>NOLLCMP</name> 207 <description>Non-overlapping Low Compare. The 8-bit timer count value of non-overlapping time between falling edge of PWM output 0A and next rising edge of PWM output 0A'.</description> 208 <bitOffset>0</bitOffset> 209 <bitWidth>8</bitWidth> 210 </field> 211 <field> 212 <name>NOLHCMP</name> 213 <description>Non-overlapping High Compare. The 8-bit timer count value of non-overlapping time between falling edge of PWM output 0A' and next rising edge of PWM output 0A.</description> 214 <bitOffset>8</bitOffset> 215 <bitWidth>8</bitWidth> 216 </field> 217 </fields> 218 </register> 219 <register> 220 <name>PRESET</name> 221 <description>Preset register.</description> 222 <addressOffset>0x18</addressOffset> 223 <fields> 224 <field> 225 <name>PRESET</name> 226 <description>Preset Value.</description> 227 <bitOffset>0</bitOffset> 228 <bitWidth>32</bitWidth> 229 </field> 230 </fields> 231 </register> 232 <register> 233 <name>RELOAD</name> 234 <description>Reload register.</description> 235 <addressOffset>0x1C</addressOffset> 236 <fields> 237 <field> 238 <name>RELOAD</name> 239 <description>Rerload Value.</description> 240 <bitOffset>0</bitOffset> 241 <bitWidth>32</bitWidth> 242 </field> 243 </fields> 244 </register> 245 <register> 246 <name>SNAPSHOT</name> 247 <description>Snapshot register.</description> 248 <addressOffset>0x20</addressOffset> 249 <fields> 250 <field> 251 <name>SNAPSHOT</name> 252 <description>Snapshot Value.</description> 253 <bitOffset>0</bitOffset> 254 <bitWidth>32</bitWidth> 255 </field> 256 </fields> 257 </register> 258 </registers> 259 </peripheral> 260 <!-- WUT: 32-bit reloadable wakeup timer --> 261</device>
