1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "mxc_device.h"
22 #include "mxc_errors.h"
23 #include "mxc_assert.h"
24 #include "mxc_sys.h"
25 #include "tpu_reva.h"
26
27 /* ************************************************************************* */
28 /* Global Control/Configuration functions */
29 /* ************************************************************************* */
30
MXC_TPU_Init(mxc_sys_periph_clock_t clock)31 int MXC_TPU_Init(mxc_sys_periph_clock_t clock)
32 {
33 /* The crypto clock needs to be turned on for crypto to work. */
34 if ((MXC_GCR->clkcn & MXC_F_GCR_CLKCN_HIRC_EN) == 0) {
35 MXC_GCR->clkcn |= MXC_F_GCR_CLKCN_HIRC_EN;
36
37 // Check if CRYPTO clock is ready
38 if (MXC_SYS_Clock_Timeout(MXC_F_GCR_CLKCN_HIRC_RDY) != E_NO_ERROR) {
39 return E_TIME_OUT;
40 }
41 }
42
43 if (clock == MXC_SYS_PERIPH_CLOCK_TPU) {
44 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TPU);
45 }
46
47 if (clock == MXC_SYS_PERIPH_CLOCK_TRNG) {
48 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TRNG);
49 }
50
51 return E_NO_ERROR;
52 }
53
MXC_TPU_Shutdown(mxc_sys_periph_clock_t clock)54 int MXC_TPU_Shutdown(mxc_sys_periph_clock_t clock)
55 {
56 if (clock == MXC_SYS_PERIPH_CLOCK_TPU) {
57 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TPU);
58 }
59
60 if (clock == MXC_SYS_PERIPH_CLOCK_TRNG) {
61 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TRNG);
62 }
63
64 // Don't shutdown the HIRC Clock, others may be using it
65
66 return E_NO_ERROR;
67 }
68
MXC_TPU_Reset(void)69 void MXC_TPU_Reset(void)
70 {
71 MXC_TPU_RevA_Reset((mxc_tpu_reva_regs_t *)MXC_TPU);
72 }
73
74 /* ************************************************************************* */
75 /* Cyclic Redundancy Check (CRC) functions */
76 /* ************************************************************************* */
77
MXC_TPU_CRC_Config(void)78 int MXC_TPU_CRC_Config(void)
79 {
80 return MXC_TPU_RevA_CRC_Config((mxc_tpu_reva_regs_t *)MXC_TPU);
81 }
82
MXC_TPU_CRC(const uint8_t * src,uint32_t len,uint32_t poly,uint32_t * crc)83 int MXC_TPU_CRC(const uint8_t *src, uint32_t len, uint32_t poly, uint32_t *crc)
84 {
85 return MXC_TPU_RevA_CRC((mxc_tpu_reva_regs_t *)MXC_TPU, src, len, poly, crc);
86 }
87
MXC_TPU_Ham_Config(void)88 int MXC_TPU_Ham_Config(void)
89 {
90 return MXC_TPU_RevA_Ham_Config((mxc_tpu_reva_regs_t *)MXC_TPU);
91 }
92
MXC_TPU_Ham(const uint8_t * src,uint32_t len,uint32_t * ecc)93 int MXC_TPU_Ham(const uint8_t *src, uint32_t len, uint32_t *ecc)
94 {
95 return MXC_TPU_RevA_Ham((mxc_tpu_reva_regs_t *)MXC_TPU, src, len, ecc);
96 }
97
98 /* ************************************************************************* */
99 /* Cipher functions */
100 /* ************************************************************************* */
101
MXC_TPU_Cipher_Get_Key_Size(mxc_tpu_ciphersel_t cipher)102 unsigned int MXC_TPU_Cipher_Get_Key_Size(mxc_tpu_ciphersel_t cipher)
103 {
104 // Key size indexed by 'opsel'
105 switch (cipher) {
106 case MXC_TPU_CIPHER_DIS:
107 return 0;
108 case MXC_TPU_CIPHER_AES128:
109 return 16;
110 case MXC_TPU_CIPHER_AES192:
111 return 24;
112 case MXC_TPU_CIPHER_AES256:
113 return 32;
114 case MXC_TPU_CIPHER_DES:
115 return 8;
116 case MXC_TPU_CIPHER_TDES:
117 return 24;
118 }
119 // if returns this bad param was passed in or disable.
120 return 0;
121 }
122
MXC_TPU_Cipher_Get_Block_Size(mxc_tpu_ciphersel_t cipher)123 unsigned int MXC_TPU_Cipher_Get_Block_Size(mxc_tpu_ciphersel_t cipher)
124 {
125 switch (cipher) {
126 case MXC_TPU_CIPHER_DIS:
127 return 0;
128 case MXC_TPU_CIPHER_AES128:
129 return AES_DATA_LEN;
130 case MXC_TPU_CIPHER_AES192:
131 return AES_DATA_LEN;
132 case MXC_TPU_CIPHER_AES256:
133 return AES_DATA_LEN;
134 case MXC_TPU_CIPHER_DES:
135 return DES_DATA_LEN;
136 case MXC_TPU_CIPHER_TDES:
137 return DES_DATA_LEN;
138 }
139 // if returns this bad param was passed in or disable.
140 return 0;
141 }
142
MXC_TPU_Cipher_GetLength(mxc_tpu_ciphersel_t cipher,unsigned int data_size)143 unsigned int MXC_TPU_Cipher_GetLength(mxc_tpu_ciphersel_t cipher, unsigned int data_size)
144 {
145 return MXC_TPU_RevA_Cipher_GetLength(cipher, data_size);
146 }
147
MXC_TPU_Cipher_EncDecSelect(int enc)148 void MXC_TPU_Cipher_EncDecSelect(int enc)
149 {
150 MXC_TPU_RevA_Cipher_EncDecSelect((mxc_tpu_reva_regs_t *)MXC_TPU, enc);
151 }
152
MXC_TPU_Cipher_Config(mxc_tpu_modesel_t mode,mxc_tpu_ciphersel_t cipher)153 int MXC_TPU_Cipher_Config(mxc_tpu_modesel_t mode, mxc_tpu_ciphersel_t cipher)
154 {
155 return MXC_TPU_RevA_Cipher_Config((mxc_tpu_reva_regs_t *)MXC_TPU, (mxc_tpu_reva_modesel_t)mode,
156 (mxc_tpu_reva_ciphersel_t)cipher);
157 }
158
MXC_TPU_Cipher_KeySelect(mxc_tpu_keysrc_t key_src)159 int MXC_TPU_Cipher_KeySelect(mxc_tpu_keysrc_t key_src)
160 {
161 return MXC_TPU_RevA_Cipher_KeySelect((mxc_tpu_reva_regs_t *)MXC_TPU,
162 (mxc_tpu_reva_keysrc_t)key_src);
163 }
164
MXC_TPU_Cipher_DoOperation(const char * src,const char * iv,const char * key,mxc_tpu_ciphersel_t cipher,mxc_tpu_modesel_t mode,unsigned int data_size,char * outptr)165 int MXC_TPU_Cipher_DoOperation(const char *src, const char *iv, const char *key,
166 mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode,
167 unsigned int data_size, char *outptr)
168 {
169 return MXC_TPU_RevA_Cipher_DoOperation((mxc_tpu_reva_regs_t *)MXC_TPU, src, iv, key, cipher,
170 mode, data_size, outptr);
171 }
172
MXC_TPU_Cipher_DES_Encrypt(const char * plaintext,const char * iv,const char * key,mxc_tpu_modesel_t mode,unsigned int data_size,char * outptr)173 int MXC_TPU_Cipher_DES_Encrypt(const char *plaintext, const char *iv, const char *key,
174 mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
175 {
176 return MXC_TPU_RevA_Cipher_DES_Encrypt(plaintext, iv, key, mode, data_size, outptr);
177 }
178
MXC_TPU_Cipher_DES_Decrypt(const char * ciphertext,const char * iv,const char * key,mxc_tpu_modesel_t mode,unsigned int data_size,char * outptr)179 int MXC_TPU_Cipher_DES_Decrypt(const char *ciphertext, const char *iv, const char *key,
180 mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
181 {
182 return MXC_TPU_RevA_Cipher_DES_Decrypt(ciphertext, iv, key, mode, data_size, outptr);
183 }
184
MXC_TPU_Cipher_TDES_Encrypt(const char * plaintext,const char * iv,const char * key,mxc_tpu_modesel_t mode,unsigned int data_size,char * outptr)185 int MXC_TPU_Cipher_TDES_Encrypt(const char *plaintext, const char *iv, const char *key,
186 mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
187 {
188 return MXC_TPU_RevA_Cipher_TDES_Encrypt(plaintext, iv, key, mode, data_size, outptr);
189 }
190
MXC_TPU_Cipher_TDES_Decrypt(const char * ciphertext,const char * iv,const char * key,mxc_tpu_modesel_t mode,unsigned int data_size,char * outptr)191 int MXC_TPU_Cipher_TDES_Decrypt(const char *ciphertext, const char *iv, const char *key,
192 mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
193 {
194 return MXC_TPU_RevA_Cipher_TDES_Decrypt(ciphertext, iv, key, mode, data_size, outptr);
195 }
196
MXC_TPU_Cipher_AES_Encrypt(const char * plaintext,const char * iv,const char * key,mxc_tpu_ciphersel_t cipher,mxc_tpu_modesel_t mode,unsigned int data_size,char * outptr)197 int MXC_TPU_Cipher_AES_Encrypt(const char *plaintext, const char *iv, const char *key,
198 mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode,
199 unsigned int data_size, char *outptr)
200 {
201 return MXC_TPU_RevA_Cipher_AES_Encrypt(plaintext, iv, key, cipher, mode, data_size, outptr);
202 }
203
MXC_TPU_Cipher_AES_Decrypt(const char * ciphertext,const char * iv,const char * key,mxc_tpu_ciphersel_t cipher,mxc_tpu_modesel_t mode,unsigned int data_size,char * outptr)204 int MXC_TPU_Cipher_AES_Decrypt(const char *ciphertext, const char *iv, const char *key,
205 mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode,
206 unsigned int data_size, char *outptr)
207 {
208 return MXC_TPU_RevA_Cipher_AES_Decrypt(ciphertext, iv, key, cipher, mode, data_size, outptr);
209 }
210
211 /* ************************************************************************* */
212 /* Hash functions */
213 /* ************************************************************************* */
214
MXC_TPU_Hash_Get_Block_Size_SHA(mxc_tpu_hashfunsel_t func)215 unsigned int MXC_TPU_Hash_Get_Block_Size_SHA(mxc_tpu_hashfunsel_t func)
216 {
217 // Block size in bytes indexed by hash function
218 switch (func) {
219 case MXC_TPU_HASH_DIS:
220 return 0;
221 case MXC_TPU_HASH_SHA1:
222 return 64;
223 case MXC_TPU_HASH_SHA224:
224 return 64;
225 case MXC_TPU_HASH_SHA256:
226 return 64;
227 case MXC_TPU_HASH_SHA384:
228 return 128;
229 case MXC_TPU_HASH_SHA512:
230 return 128;
231 }
232 // if returns this bad param was passed in or disable.
233 return 0;
234 }
235
MXC_TPU_Hash_Get_Dgst_Size(mxc_tpu_hashfunsel_t func)236 unsigned int MXC_TPU_Hash_Get_Dgst_Size(mxc_tpu_hashfunsel_t func)
237 {
238 // Digest length in bytes indexed by hash function
239 switch (func) {
240 case MXC_TPU_HASH_DIS:
241 return 0;
242 case MXC_TPU_HASH_SHA1:
243 return 20;
244 case MXC_TPU_HASH_SHA224:
245 return 28;
246 case MXC_TPU_HASH_SHA256:
247 return 32;
248 case MXC_TPU_HASH_SHA384:
249 return 48;
250 case MXC_TPU_HASH_SHA512:
251 return 64;
252 }
253 // if returns this bad param was passed in or disable.
254 return 0;
255 }
256
MXC_TPU_Hash_SHA_Size(unsigned int * blocks,unsigned int * length,unsigned int * lbyte,mxc_tpu_hashfunsel_t fun)257 void MXC_TPU_Hash_SHA_Size(unsigned int *blocks, unsigned int *length, unsigned int *lbyte,
258 mxc_tpu_hashfunsel_t fun)
259 {
260 MXC_TPU_RevA_Hash_SHA_Size(blocks, length, lbyte, fun);
261 }
262
MXC_TPU_Hash_Config(mxc_tpu_hashfunsel_t func)263 int MXC_TPU_Hash_Config(mxc_tpu_hashfunsel_t func)
264 {
265 return MXC_TPU_RevA_Hash_Config((mxc_tpu_reva_regs_t *)MXC_TPU, func);
266 }
267
MXC_TPU_Hash_SHA(const char * msg,mxc_tpu_hashfunsel_t fun,unsigned int byteLen,char * digest)268 int MXC_TPU_Hash_SHA(const char *msg, mxc_tpu_hashfunsel_t fun, unsigned int byteLen, char *digest)
269 {
270 return MXC_TPU_RevA_Hash_SHA((mxc_tpu_reva_regs_t *)MXC_TPU, msg, fun, byteLen, digest);
271 }
272
273 /* ************************************************************************* */
274 /* True Random Number Generator (TRNG) functions */
275 /* ************************************************************************* */
276
MXC_TPU_TRNG_Read8BIT(mxc_trng_regs_t * trng)277 uint8_t MXC_TPU_TRNG_Read8BIT(mxc_trng_regs_t *trng)
278 {
279 return MXC_TPU_RevA_TRNG_Read8BIT((mxc_trng_revc_regs_t *)trng);
280 }
281
MXC_TPU_TRNG_Read16BIT(mxc_trng_regs_t * trng)282 uint16_t MXC_TPU_TRNG_Read16BIT(mxc_trng_regs_t *trng)
283 {
284 return MXC_TPU_RevA_TRNG_Read16BIT((mxc_trng_revc_regs_t *)trng);
285 }
286
MXC_TPU_TRNG_Read32BIT(mxc_trng_regs_t * trng)287 uint32_t MXC_TPU_TRNG_Read32BIT(mxc_trng_regs_t *trng)
288 {
289 return MXC_TPU_RevA_TRNG_Read32BIT((mxc_trng_revc_regs_t *)trng);
290 }
291
MXC_TPU_TRNG_Read(mxc_trng_regs_t * trng,uint8_t * data,int len)292 void MXC_TPU_TRNG_Read(mxc_trng_regs_t *trng, uint8_t *data, int len)
293 {
294 MXC_TPU_RevA_TRNG_Read((mxc_trng_revc_regs_t *)trng, data, len);
295 }
296
MXC_TPU_TRNG_Generate_AES(mxc_trng_regs_t * trng)297 void MXC_TPU_TRNG_Generate_AES(mxc_trng_regs_t *trng)
298 {
299 MXC_TPU_RevA_TRNG_Generate_AES((mxc_trng_revc_regs_t *)trng);
300 }
301
302 /* ************************************************************************* */
303 /* Modular Arithmetic Accelerator (MAA) functions */
304 /* ************************************************************************* */
305
MXC_TPU_MAA_Mem_Clear(void)306 void MXC_TPU_MAA_Mem_Clear(void)
307 {
308 MXC_TPU_RevA_MAA_Mem_Clear();
309 }
310
MXC_TPU_MAA_Reset(void)311 void MXC_TPU_MAA_Reset(void)
312 {
313 MXC_TPU_RevA_MAA_Reset((mxc_tpu_reva_regs_t *)MXC_TPU);
314 }
315
MXC_TPU_MAA_Init(unsigned int size)316 int MXC_TPU_MAA_Init(unsigned int size)
317 {
318 return MXC_TPU_RevA_MAA_Init((mxc_tpu_reva_regs_t *)MXC_TPU, size);
319 }
320
MXC_TPU_MAA_Shutdown(void)321 int MXC_TPU_MAA_Shutdown(void)
322 {
323 return MXC_TPU_Shutdown(MXC_SYS_PERIPH_CLOCK_TPU);
324 }
325
MXC_TPU_MAA_Compute(mxc_tpu_maa_clcsel_t clc,char * multiplier,char * multiplicand,char * exp,char * mod,int * result,unsigned int len)326 int MXC_TPU_MAA_Compute(mxc_tpu_maa_clcsel_t clc, char *multiplier, char *multiplicand, char *exp,
327 char *mod, int *result, unsigned int len)
328 {
329 return MXC_TPU_RevA_MAA_Compute((mxc_tpu_reva_regs_t *)MXC_TPU, clc, multiplier, multiplicand,
330 exp, mod, result, len);
331 }
332