1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>TMR0</name> 5 <description>32-bit reloadable timer that can be used for timing and event counting.</description> 6 <groupName>Timers</groupName> 7 <baseAddress>0x40010000</baseAddress> 8 <addressBlock> 9 <offset>0x00</offset> 10 <size>0x1000</size> 11 <usage>registers</usage> 12 </addressBlock> 13 <interrupt> 14 <name>TMR0</name> 15 <description>TMR0 IRQ</description> 16 <value>5</value> 17 </interrupt> 18 <registers> 19 <register> 20 <name>CNT</name> 21 <description>Count. This register stores the current timer count.</description> 22 <addressOffset>0x00</addressOffset> 23 <resetValue>0x00000001</resetValue> 24 </register> 25 <register> 26 <name>CMP</name> 27 <description>Compare. This register stores the compare value, which is used to set the maximum count value to initiate a reload of the timer to 0x0001.</description> 28 <addressOffset>0x04</addressOffset> 29 <resetValue>0x0000FFFF</resetValue> 30 </register> 31 <register> 32 <name>PWM</name> 33 <description>PWM. This register stores the value that is compared to the current timer count.</description> 34 <addressOffset>0x08</addressOffset> 35 </register> 36 <register> 37 <name>INTR</name> 38 <description>Clear Interrupt. Writing a value (0 or 1) to a bit in this register clears the associated interrupt.</description> 39 <addressOffset>0x0C</addressOffset> 40 <modifiedWriteValues>oneToClear</modifiedWriteValues> 41 <fields> 42 <field> 43 <name>IRQ</name> 44 <description>Clear Interrupt.</description> 45 <bitOffset>0</bitOffset> 46 <bitWidth>1</bitWidth> 47 </field> 48 </fields> 49 </register> 50 <register> 51 <name>CN</name> 52 <description>Timer Control Register.</description> 53 <addressOffset>0x10</addressOffset> 54 <fields> 55 <field> 56 <name>TMODE</name> 57 <description>Timer Mode.</description> 58 <bitOffset>0</bitOffset> 59 <bitWidth>3</bitWidth> 60 <enumeratedValues> 61 <enumeratedValue> 62 <name>oneShot</name> 63 <description>One Shot Mode.</description> 64 <value>0</value> 65 </enumeratedValue> 66 <enumeratedValue> 67 <name>continuous</name> 68 <description>Continuous Mode.</description> 69 <value>1</value> 70 </enumeratedValue> 71 <enumeratedValue> 72 <name>counter</name> 73 <description>Counter Mode.</description> 74 <value>2</value> 75 </enumeratedValue> 76 <enumeratedValue> 77 <name>pwm</name> 78 <description>PWM Mode.</description> 79 <value>3</value> 80 </enumeratedValue> 81 <enumeratedValue> 82 <name>capture</name> 83 <description>Capture Mode.</description> 84 <value>4</value> 85 </enumeratedValue> 86 <enumeratedValue> 87 <name>compare</name> 88 <description>Compare Mode.</description> 89 <value>5</value> 90 </enumeratedValue> 91 <enumeratedValue> 92 <name>gated</name> 93 <description>Gated Mode.</description> 94 <value>6</value> 95 </enumeratedValue> 96 <enumeratedValue> 97 <name>captureCompare</name> 98 <description>Capture/Compare Mode.</description> 99 <value>7</value> 100 </enumeratedValue> 101 </enumeratedValues> 102 </field> 103 <field> 104 <name>PRES</name> 105 <description>Prescaler. Set the Timer's prescaler value. The prescaler divides the PCLK input to the timer and sets the Timer's Count Clock, F_CNT_CLK = PCLK (HZ) /prescaler. The Timer's prescaler setting is a 4-bit value with pres3:pres[2:0].</description> 106 <bitOffset>3</bitOffset> 107 <bitWidth>3</bitWidth> 108 <enumeratedValues> 109 <enumeratedValue> 110 <name>div1</name> 111 <description>Divide by 1.</description> 112 <value>0</value> 113 </enumeratedValue> 114 <enumeratedValue> 115 <name>div2</name> 116 <description>Divide by 2.</description> 117 <value>1</value> 118 </enumeratedValue> 119 <enumeratedValue> 120 <name>div4</name> 121 <description>Divide by 4.</description> 122 <value>2</value> 123 </enumeratedValue> 124 <enumeratedValue> 125 <name>div8</name> 126 <description>Divide by 8.</description> 127 <value>3</value> 128 </enumeratedValue> 129 <enumeratedValue> 130 <name>div16</name> 131 <description>Divide by 16.</description> 132 <value>4</value> 133 </enumeratedValue> 134 <enumeratedValue> 135 <name>div32</name> 136 <description>Divide by 32.</description> 137 <value>5</value> 138 </enumeratedValue> 139 <enumeratedValue> 140 <name>div64</name> 141 <description>Divide by 64.</description> 142 <value>6</value> 143 </enumeratedValue> 144 <enumeratedValue> 145 <name>div128</name> 146 <description>Divide by 128.</description> 147 <value>7</value> 148 </enumeratedValue> 149 </enumeratedValues> 150 </field> 151 <field> 152 <name>TPOL</name> 153 <description>Timer input/output polarity bit.</description> 154 <bitOffset>6</bitOffset> 155 <bitWidth>1</bitWidth> 156 <enumeratedValues> 157 <enumeratedValue> 158 <name>activeHi</name> 159 <description>Active High.</description> 160 <value>0</value> 161 </enumeratedValue> 162 <enumeratedValue> 163 <name>activeLo</name> 164 <description>Active Low.</description> 165 <value>1</value> 166 </enumeratedValue> 167 </enumeratedValues> 168 </field> 169 <field> 170 <name>TEN</name> 171 <description>Timer Enable.</description> 172 <bitOffset>7</bitOffset> 173 <bitWidth>1</bitWidth> 174 <enumeratedValues> 175 <enumeratedValue> 176 <name>dis</name> 177 <description>Disable.</description> 178 <value>0</value> 179 </enumeratedValue> 180 <enumeratedValue> 181 <name>en</name> 182 <description>Enable.</description> 183 <value>1</value> 184 </enumeratedValue> 185 </enumeratedValues> 186 </field> 187 <field> 188 <name>PRES3</name> 189 <description>MSB of prescaler value.</description> 190 <bitOffset>8</bitOffset> 191 <bitWidth>1</bitWidth> 192 </field> 193 <field> 194 <name>PWMSYNC</name> 195 <description>Timer PWM Synchronization Mode Enable.</description> 196 <bitOffset>9</bitOffset> 197 <bitWidth>1</bitWidth> 198 <enumeratedValues> 199 <enumeratedValue> 200 <name>dis</name> 201 <description>Disable.</description> 202 <value>0</value> 203 </enumeratedValue> 204 <enumeratedValue> 205 <name>en</name> 206 <description>Enable.</description> 207 <value>1</value> 208 </enumeratedValue> 209 </enumeratedValues> 210 </field> 211 <field> 212 <name>NOLHPOL</name> 213 <description>Timer PWM output 0A polarity bit.</description> 214 <bitOffset>10</bitOffset> 215 <bitWidth>1</bitWidth> 216 <enumeratedValues> 217 <enumeratedValue> 218 <name>dis</name> 219 <description>Disable.</description> 220 <value>0</value> 221 </enumeratedValue> 222 <enumeratedValue> 223 <name>en</name> 224 <description>Enable.</description> 225 <value>1</value> 226 </enumeratedValue> 227 </enumeratedValues> 228 </field> 229 <field> 230 <name>NOLLPOL</name> 231 <description>Timer PWM output 0A' polarity bit.</description> 232 <bitOffset>11</bitOffset> 233 <bitWidth>1</bitWidth> 234 <enumeratedValues> 235 <enumeratedValue> 236 <name>dis</name> 237 <description>Disable.</description> 238 <value>0</value> 239 </enumeratedValue> 240 <enumeratedValue> 241 <name>en</name> 242 <description>Enable.</description> 243 <value>1</value> 244 </enumeratedValue> 245 </enumeratedValues> 246 </field> 247 <field> 248 <name>PWMCKBD</name> 249 <description>Timer PWM output 0A Mode Disable.</description> 250 <bitOffset>12</bitOffset> 251 <bitWidth>1</bitWidth> 252 <enumeratedValues> 253 <enumeratedValue> 254 <name>dis</name> 255 <description>Disable.</description> 256 <value>1</value> 257 </enumeratedValue> 258 <enumeratedValue> 259 <name>en</name> 260 <description>Enable.</description> 261 <value>0</value> 262 </enumeratedValue> 263 </enumeratedValues> 264 </field> 265 </fields> 266 </register> 267 <register> 268 <name>NOLCMP</name> 269 <description>Timer Non-Overlapping Compare Register.</description> 270 <addressOffset>0x14</addressOffset> 271 <fields> 272 <field> 273 <name>NOLLCMP</name> 274 <description>Non-overlapping Low Compare. The 8-bit timer count value of non-overlapping time between falling edge of PWM output 0A and next rising edge of PWM output 0A'.</description> 275 <bitOffset>0</bitOffset> 276 <bitWidth>8</bitWidth> 277 </field> 278 <field> 279 <name>NOLHCMP</name> 280 <description>Non-overlapping High Compare. The 8-bit timer count value of non-overlapping time between falling edge of PWM output 0A' and next rising edge of PWM output 0A.</description> 281 <bitOffset>8</bitOffset> 282 <bitWidth>8</bitWidth> 283 </field> 284 </fields> 285 </register> 286 </registers> 287 </peripheral> 288<!-- TMR0: 32-bit reloadable timer Port 0 --> 289</device> 290
