1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "tmr.h"
22 #include "tmr_revb.h"
23 #include "tmr_common.h"
24 #include "lpgcr_regs.h"
25 #include "stdbool.h"
26
MXC_TMR_Init(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg,bool init_pins)27 int MXC_TMR_Init(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg, bool init_pins)
28 {
29 uint8_t tmr_id;
30 uint8_t clockSource = MXC_TMR_CLK0;
31
32 if (cfg == NULL) {
33 return E_NULL_PTR;
34 }
35
36 tmr_id = MXC_TMR_GET_IDX(tmr);
37 MXC_ASSERT(tmr_id >= 0);
38
39 switch (cfg->clock) {
40 case MXC_TMR_ISO_CLK:
41 if (tmr_id > 3) { // Timers 4-5 do not support this clock source
42 return E_NOT_SUPPORTED;
43 }
44
45 clockSource = MXC_TMR_CLK1;
46 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ISO);
47 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, ISO_FREQ);
48 break;
49
50 case MXC_TMR_IBRO_CLK:
51 if (tmr_id > 3) { // Timers 4-5
52 clockSource = MXC_TMR_CLK0;
53 } else if (tmr_id < 4) { // Timers 0-3
54 clockSource = MXC_TMR_CLK2;
55 }
56
57 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO);
58 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, IBRO_FREQ);
59 break;
60
61 case MXC_TMR_ERFO_CLK:
62 if (tmr_id > 3) { // Timers 4-5 do not support this clock source
63 return E_NOT_SUPPORTED;
64 }
65
66 clockSource = MXC_TMR_CLK3;
67 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO);
68 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, ERFO_FREQ);
69 break;
70
71 case MXC_TMR_ERTCO_CLK:
72 if (tmr_id == 4) {
73 clockSource = MXC_TMR_CLK1;
74 } else { // Timers 5 do not support this clock source
75 return E_NOT_SUPPORTED;
76 }
77
78 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERTCO);
79 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, ERTCO_FREQ);
80 break;
81
82 case MXC_TMR_INRO_CLK:
83 if (tmr_id < 4) { // Timers 0-3 do not support this clock source
84 return E_NOT_SUPPORTED;
85 }
86
87 clockSource = MXC_TMR_CLK2;
88 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_INRO);
89 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, INRO_FREQ);
90 break;
91
92 case MXC_TMR_EXT_CLK:
93 if (tmr_id < 3) { // GPIO3[5]
94 clockSource = MXC_TMR_CLK3;
95 } else {
96 return E_NOT_SUPPORTED;
97 }
98
99 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_EXTCLK);
100 break;
101
102 default:
103 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, PeripheralClock);
104 break;
105 }
106
107 #ifndef MSDK_NO_GPIO_CLK_INIT
108 //enable peripheral clock and configure gpio pins
109 switch (tmr_id) {
110 case 0:
111 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TMR0);
112 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR0);
113
114 if (init_pins) {
115 if (cfg->bitMode != MXC_TMR_BIT_MODE_16B) {
116 MXC_GPIO_Config(&gpio_cfg_tmr0);
117 } else {
118 MXC_GPIO_Config(&gpio_cfg_tmr0b);
119 }
120 }
121
122 break;
123
124 case 1:
125 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TMR1);
126 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR1);
127
128 if (init_pins) {
129 if (cfg->bitMode != MXC_TMR_BIT_MODE_16B) {
130 MXC_GPIO_Config(&gpio_cfg_tmr1);
131 } else {
132 MXC_GPIO_Config(&gpio_cfg_tmr1b);
133 }
134 }
135
136 break;
137
138 case 2:
139 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TMR2);
140 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR2);
141
142 if (init_pins) {
143 if (cfg->bitMode != MXC_TMR_BIT_MODE_16B) {
144 MXC_GPIO_Config(&gpio_cfg_tmr2);
145 } else {
146 MXC_GPIO_Config(&gpio_cfg_tmr2b);
147 }
148 }
149
150 break;
151
152 case 3:
153 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TMR3);
154 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR3);
155
156 if (init_pins) {
157 if (cfg->bitMode != MXC_TMR_BIT_MODE_16B) {
158 MXC_GPIO_Config(&gpio_cfg_tmr3);
159 } else {
160 MXC_GPIO_Config(&gpio_cfg_tmr3b);
161 }
162 }
163
164 break;
165
166 case 4:
167 MXC_GPIO_Config(&gpio_cfg_tmr4);
168 MXC_SYS_Reset_Periph(MXC_SYS_RESET_TMR4);
169 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR4);
170 break;
171
172 case 5:
173 MXC_GPIO_Config(&gpio_cfg_tmr5);
174 MXC_SYS_Reset_Periph(MXC_SYS_RESET_TMR5);
175 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR5);
176 break;
177 }
178 #else
179 (void)init_pins;
180 #endif
181
182 return MXC_TMR_RevB_Init((mxc_tmr_revb_regs_t *)tmr, cfg, clockSource);
183 }
184
MXC_TMR_Shutdown(mxc_tmr_regs_t * tmr)185 void MXC_TMR_Shutdown(mxc_tmr_regs_t *tmr)
186 {
187 MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0);
188
189 MXC_TMR_RevB_Shutdown((mxc_tmr_revb_regs_t *)tmr);
190
191 // System settigns
192 //diasble peripheral clock
193 if (tmr == MXC_TMR0) {
194 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR0);
195 }
196
197 if (tmr == MXC_TMR1) {
198 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR1);
199 }
200
201 if (tmr == MXC_TMR2) {
202 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR2);
203 }
204
205 if (tmr == MXC_TMR3) {
206 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR3);
207 }
208
209 if (tmr == MXC_TMR4) {
210 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR4);
211 }
212
213 if (tmr == MXC_TMR5) {
214 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR5);
215 }
216 }
217
MXC_TMR_Start(mxc_tmr_regs_t * tmr)218 void MXC_TMR_Start(mxc_tmr_regs_t *tmr)
219 {
220 MXC_TMR_RevB_Start((mxc_tmr_revb_regs_t *)tmr);
221 }
222
MXC_TMR_Stop(mxc_tmr_regs_t * tmr)223 void MXC_TMR_Stop(mxc_tmr_regs_t *tmr)
224 {
225 MXC_TMR_RevB_Stop((mxc_tmr_revb_regs_t *)tmr);
226 }
227
MXC_TMR_SetPWM(mxc_tmr_regs_t * tmr,uint32_t pwm)228 int MXC_TMR_SetPWM(mxc_tmr_regs_t *tmr, uint32_t pwm)
229 {
230 return MXC_TMR_RevB_SetPWM((mxc_tmr_revb_regs_t *)tmr, pwm);
231 }
232
MXC_TMR_GetCompare(mxc_tmr_regs_t * tmr)233 uint32_t MXC_TMR_GetCompare(mxc_tmr_regs_t *tmr)
234 {
235 return MXC_TMR_RevB_GetCompare((mxc_tmr_revb_regs_t *)tmr);
236 }
237
MXC_TMR_GetCapture(mxc_tmr_regs_t * tmr)238 uint32_t MXC_TMR_GetCapture(mxc_tmr_regs_t *tmr)
239 {
240 return MXC_TMR_RevB_GetCapture((mxc_tmr_revb_regs_t *)tmr);
241 }
242
MXC_TMR_GetPeriod(mxc_tmr_regs_t * tmr,mxc_tmr_clock_t clock,uint32_t prescalar,uint32_t frequency)243 uint32_t MXC_TMR_GetPeriod(mxc_tmr_regs_t *tmr, mxc_tmr_clock_t clock, uint32_t prescalar,
244 uint32_t frequency)
245 {
246 uint32_t clockFrequency = PeripheralClock;
247 uint8_t tmr_id = MXC_TMR_GET_IDX(tmr);
248
249 MXC_ASSERT(tmr_id >= 0);
250
251 if (tmr_id > 3) {
252 switch (clock) {
253 case MXC_TMR_IBRO_CLK:
254 clockFrequency = IBRO_FREQ;
255 break;
256
257 case MXC_TMR_ERTCO_CLK:
258 clockFrequency = ERTCO_FREQ;
259 break;
260
261 case MXC_TMR_INRO_CLK:
262 clockFrequency = INRO_FREQ;
263 break;
264
265 default:
266 return 0;
267 break;
268 }
269 } else {
270 switch (clock) {
271 case MXC_TMR_APB_CLK:
272 clockFrequency = PeripheralClock;
273 break;
274
275 case MXC_TMR_ISO_CLK:
276 clockFrequency = ISO_FREQ;
277 break;
278
279 case MXC_TMR_IBRO_CLK:
280 clockFrequency = IBRO_FREQ;
281 break;
282
283 case MXC_TMR_ERFO_CLK:
284 clockFrequency = ERFO_FREQ;
285 break;
286
287 default:
288 break;
289 }
290 }
291
292 return MXC_TMR_RevB_GetPeriod((mxc_tmr_revb_regs_t *)tmr, clockFrequency, prescalar, frequency);
293 }
294
MXC_TMR_GetCount(mxc_tmr_regs_t * tmr)295 uint32_t MXC_TMR_GetCount(mxc_tmr_regs_t *tmr)
296 {
297 return MXC_TMR_RevB_GetCount((mxc_tmr_revb_regs_t *)tmr);
298 }
299
MXC_TMR_ClearFlags(mxc_tmr_regs_t * tmr)300 void MXC_TMR_ClearFlags(mxc_tmr_regs_t *tmr)
301 {
302 MXC_TMR_RevB_ClearFlags((mxc_tmr_revb_regs_t *)tmr);
303 }
304
MXC_TMR_GetFlags(mxc_tmr_regs_t * tmr)305 uint32_t MXC_TMR_GetFlags(mxc_tmr_regs_t *tmr)
306 {
307 return MXC_TMR_RevB_GetFlags((mxc_tmr_revb_regs_t *)tmr);
308 }
309
MXC_TMR_EnableInt(mxc_tmr_regs_t * tmr)310 void MXC_TMR_EnableInt(mxc_tmr_regs_t *tmr)
311 {
312 MXC_TMR_RevB_EnableInt((mxc_tmr_revb_regs_t *)tmr);
313 }
314
MXC_TMR_DisableInt(mxc_tmr_regs_t * tmr)315 void MXC_TMR_DisableInt(mxc_tmr_regs_t *tmr)
316 {
317 MXC_TMR_RevB_DisableInt((mxc_tmr_revb_regs_t *)tmr);
318 }
319
MXC_TMR_EnableWakeup(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg)320 void MXC_TMR_EnableWakeup(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
321 {
322 MXC_TMR_RevB_EnableWakeup((mxc_tmr_revb_regs_t *)tmr, cfg);
323 }
324
MXC_TMR_DisableWakeup(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg)325 void MXC_TMR_DisableWakeup(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
326 {
327 MXC_TMR_RevB_DisableWakeup((mxc_tmr_revb_regs_t *)tmr, cfg);
328 }
329
MXC_TMR_SetCompare(mxc_tmr_regs_t * tmr,uint32_t cmp_cnt)330 void MXC_TMR_SetCompare(mxc_tmr_regs_t *tmr, uint32_t cmp_cnt)
331 {
332 MXC_TMR_RevB_SetCompare((mxc_tmr_revb_regs_t *)tmr, cmp_cnt);
333 }
334
MXC_TMR_SetCount(mxc_tmr_regs_t * tmr,uint32_t cnt)335 void MXC_TMR_SetCount(mxc_tmr_regs_t *tmr, uint32_t cnt)
336 {
337 MXC_TMR_RevB_SetCount((mxc_tmr_revb_regs_t *)tmr, cnt);
338 }
339
MXC_TMR_Delay(mxc_tmr_regs_t * tmr,uint32_t us)340 void MXC_TMR_Delay(mxc_tmr_regs_t *tmr, uint32_t us)
341 {
342 MXC_TMR_Common_Delay(tmr, us);
343 }
344
MXC_TMR_TO_Start(mxc_tmr_regs_t * tmr,uint32_t us)345 void MXC_TMR_TO_Start(mxc_tmr_regs_t *tmr, uint32_t us)
346 {
347 MXC_TMR_RevB_TO_Start((mxc_tmr_revb_regs_t *)tmr, us);
348 }
349
MXC_TMR_TO_Check(mxc_tmr_regs_t * tmr)350 int MXC_TMR_TO_Check(mxc_tmr_regs_t *tmr)
351 {
352 return MXC_TMR_Common_TO_Check(tmr);
353 }
354
MXC_TMR_TO_Stop(mxc_tmr_regs_t * tmr)355 void MXC_TMR_TO_Stop(mxc_tmr_regs_t *tmr)
356 {
357 MXC_TMR_Common_TO_Stop(tmr);
358 }
359
MXC_TMR_TO_Clear(mxc_tmr_regs_t * tmr)360 void MXC_TMR_TO_Clear(mxc_tmr_regs_t *tmr)
361 {
362 MXC_TMR_Common_TO_Clear(tmr);
363 }
364
MXC_TMR_TO_Elapsed(mxc_tmr_regs_t * tmr)365 unsigned int MXC_TMR_TO_Elapsed(mxc_tmr_regs_t *tmr)
366 {
367 return MXC_TMR_Common_TO_Elapsed(tmr);
368 }
369
MXC_TMR_TO_Remaining(mxc_tmr_regs_t * tmr)370 unsigned int MXC_TMR_TO_Remaining(mxc_tmr_regs_t *tmr)
371 {
372 return MXC_TMR_Common_TO_Remaining(tmr);
373 }
374
MXC_TMR_SW_Start(mxc_tmr_regs_t * tmr)375 void MXC_TMR_SW_Start(mxc_tmr_regs_t *tmr)
376 {
377 MXC_TMR_Common_SW_Start(tmr);
378 }
379
MXC_TMR_SW_Stop(mxc_tmr_regs_t * tmr)380 unsigned int MXC_TMR_SW_Stop(mxc_tmr_regs_t *tmr)
381 {
382 return MXC_TMR_Common_SW_Stop(tmr);
383 }
384
MXC_TMR_GetTime(mxc_tmr_regs_t * tmr,uint32_t ticks,uint32_t * time,mxc_tmr_unit_t * units)385 int MXC_TMR_GetTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, mxc_tmr_unit_t *units)
386 {
387 return MXC_TMR_RevB_GetTime((mxc_tmr_revb_regs_t *)tmr, ticks, time, units);
388 }
389
MXC_TMR_GetTicks(mxc_tmr_regs_t * tmr,uint32_t time,mxc_tmr_unit_t units,uint32_t * ticks)390 int MXC_TMR_GetTicks(mxc_tmr_regs_t *tmr, uint32_t time, mxc_tmr_unit_t units, uint32_t *ticks)
391 {
392 return MXC_TMR_RevB_GetTicks((mxc_tmr_revb_regs_t *)tmr, time, units, ticks);
393 }
394
