1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "tmr.h"
22 #include "tmr_reva.h"
23 #include "tmr_common.h"
24
MXC_TMR_Init(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg)25 void MXC_TMR_Init(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
26 {
27 #ifndef MSDK_NO_GPIO_CLK_INIT
28 int tmr_id = MXC_TMR_GET_IDX(tmr);
29 MXC_ASSERT(tmr_id >= 0);
30
31 //enable peripheral clock and configure gpio pins
32 switch (tmr_id) {
33 case 0:
34 MXC_SYS_Reset_Periph(MXC_SYS_RESET_TMR0);
35 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR0);
36 MXC_GPIO_Config(&gpio_cfg_tmr0);
37 break;
38
39 case 1:
40 MXC_SYS_Reset_Periph(MXC_SYS_RESET_TMR1);
41 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR1);
42 MXC_GPIO_Config(&gpio_cfg_tmr1);
43 break;
44
45 case 2:
46 MXC_SYS_Reset_Periph(MXC_SYS_RESET_TMR2);
47 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR2);
48 MXC_GPIO_Config(&gpio_cfg_tmr2);
49 break;
50
51 case 3:
52 MXC_SYS_Reset_Periph(MXC_SYS_RESET_TMR3);
53 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR3);
54 MXC_GPIO_Config(&gpio_cfg_tmr3);
55 break;
56 }
57 #endif
58
59 MXC_TMR_RevA_Init((mxc_tmr_reva_regs_t *)tmr, cfg);
60 }
61
MXC_TMR_Shutdown(mxc_tmr_regs_t * tmr)62 void MXC_TMR_Shutdown(mxc_tmr_regs_t *tmr)
63 {
64 int tmr_id = MXC_TMR_GET_IDX(tmr);
65 MXC_ASSERT(tmr_id >= 0);
66
67 MXC_TMR_RevA_Shutdown((mxc_tmr_reva_regs_t *)tmr);
68
69 // System settigns
70 // disable peripheral clock
71 switch (tmr_id) {
72 case 0:
73 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR0);
74 break;
75
76 case 1:
77 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR1);
78 break;
79
80 case 2:
81 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR2);
82 break;
83
84 case 3:
85 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR3);
86 break;
87 }
88 }
89
MXC_TMR_Start(mxc_tmr_regs_t * tmr)90 void MXC_TMR_Start(mxc_tmr_regs_t *tmr)
91 {
92 MXC_TMR_RevA_Start((mxc_tmr_reva_regs_t *)tmr);
93 }
94
MXC_TMR_Stop(mxc_tmr_regs_t * tmr)95 void MXC_TMR_Stop(mxc_tmr_regs_t *tmr)
96 {
97 MXC_TMR_RevA_Stop((mxc_tmr_reva_regs_t *)tmr);
98 }
99
MXC_TMR_SetPWM(mxc_tmr_regs_t * tmr,uint32_t pwm)100 int MXC_TMR_SetPWM(mxc_tmr_regs_t *tmr, uint32_t pwm)
101 {
102 return MXC_TMR_RevA_SetPWM((mxc_tmr_reva_regs_t *)tmr, pwm);
103 }
104
MXC_TMR_GetCompare(mxc_tmr_regs_t * tmr)105 uint32_t MXC_TMR_GetCompare(mxc_tmr_regs_t *tmr)
106 {
107 return MXC_TMR_RevA_GetCompare((mxc_tmr_reva_regs_t *)tmr);
108 }
109
MXC_TMR_GetCapture(mxc_tmr_regs_t * tmr)110 uint32_t MXC_TMR_GetCapture(mxc_tmr_regs_t *tmr)
111 {
112 return MXC_TMR_RevA_GetCapture((mxc_tmr_reva_regs_t *)tmr);
113 }
114
MXC_TMR_GetCount(mxc_tmr_regs_t * tmr)115 uint32_t MXC_TMR_GetCount(mxc_tmr_regs_t *tmr)
116 {
117 return MXC_TMR_RevA_GetCount((mxc_tmr_reva_regs_t *)tmr);
118 }
119
MXC_TMR_ClearFlags(mxc_tmr_regs_t * tmr)120 void MXC_TMR_ClearFlags(mxc_tmr_regs_t *tmr)
121 {
122 MXC_TMR_RevA_ClearFlags((mxc_tmr_reva_regs_t *)tmr);
123 }
124
MXC_TMR_GetFlags(mxc_tmr_regs_t * tmr)125 uint32_t MXC_TMR_GetFlags(mxc_tmr_regs_t *tmr)
126 {
127 return MXC_TMR_RevA_GetFlags((mxc_tmr_reva_regs_t *)tmr);
128 }
129
MXC_TMR_SetCompare(mxc_tmr_regs_t * tmr,uint32_t cmp_cnt)130 void MXC_TMR_SetCompare(mxc_tmr_regs_t *tmr, uint32_t cmp_cnt)
131 {
132 MXC_TMR_RevA_SetCompare((mxc_tmr_reva_regs_t *)tmr, cmp_cnt);
133 }
134
MXC_TMR_SetCount(mxc_tmr_regs_t * tmr,uint32_t cnt)135 void MXC_TMR_SetCount(mxc_tmr_regs_t *tmr, uint32_t cnt)
136 {
137 MXC_TMR_RevA_SetCount((mxc_tmr_reva_regs_t *)tmr, cnt);
138 }
139
MXC_TMR_Delay(mxc_tmr_regs_t * tmr,uint32_t us)140 void MXC_TMR_Delay(mxc_tmr_regs_t *tmr, uint32_t us)
141 {
142 MXC_TMR_Common_Delay(tmr, us);
143 }
144
MXC_TMR_TO_Start(mxc_tmr_regs_t * tmr,uint32_t us)145 void MXC_TMR_TO_Start(mxc_tmr_regs_t *tmr, uint32_t us)
146 {
147 MXC_TMR_RevA_TO_Start((mxc_tmr_reva_regs_t *)tmr, us);
148 }
149
MXC_TMR_TO_Check(mxc_tmr_regs_t * tmr)150 int MXC_TMR_TO_Check(mxc_tmr_regs_t *tmr)
151 {
152 return MXC_TMR_Common_TO_Check(tmr);
153 }
154
MXC_TMR_TO_Stop(mxc_tmr_regs_t * tmr)155 void MXC_TMR_TO_Stop(mxc_tmr_regs_t *tmr)
156 {
157 MXC_TMR_Common_TO_Stop(tmr);
158 }
159
MXC_TMR_TO_Clear(mxc_tmr_regs_t * tmr)160 void MXC_TMR_TO_Clear(mxc_tmr_regs_t *tmr)
161 {
162 MXC_TMR_Common_TO_Clear(tmr);
163 }
164
MXC_TMR_TO_Elapsed(mxc_tmr_regs_t * tmr)165 unsigned int MXC_TMR_TO_Elapsed(mxc_tmr_regs_t *tmr)
166 {
167 return MXC_TMR_Common_TO_Elapsed(tmr);
168 }
169
MXC_TMR_TO_Remaining(mxc_tmr_regs_t * tmr)170 unsigned int MXC_TMR_TO_Remaining(mxc_tmr_regs_t *tmr)
171 {
172 return MXC_TMR_Common_TO_Remaining(tmr);
173 }
174
MXC_TMR_SW_Start(mxc_tmr_regs_t * tmr)175 void MXC_TMR_SW_Start(mxc_tmr_regs_t *tmr)
176 {
177 return MXC_TMR_Common_SW_Start(tmr);
178 }
179
MXC_TMR_SW_Stop(mxc_tmr_regs_t * tmr)180 unsigned int MXC_TMR_SW_Stop(mxc_tmr_regs_t *tmr)
181 {
182 return MXC_TMR_Common_SW_Stop(tmr);
183 }
184
MXC_TMR_GetTime(mxc_tmr_regs_t * tmr,uint32_t ticks,uint32_t * time,mxc_tmr_unit_t * units)185 int MXC_TMR_GetTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, mxc_tmr_unit_t *units)
186 {
187 return MXC_TMR_RevA_GetTime((mxc_tmr_reva_regs_t *)tmr, ticks, time, units);
188 }
189
