1<?xml version="1.0" encoding="utf-8" standalone="no"?>
2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd">
3 <peripheral>
4  <name>GCFR</name>
5  <description>Global Control Function Register.</description>
6  <baseAddress>0x40005800</baseAddress>
7  <addressBlock>
8   <offset>0x00</offset>
9   <size>0x400</size>
10   <usage>registers</usage>
11  </addressBlock>
12  <registers>
13   <register>
14    <name>REG0</name>
15    <description>Register 0.</description>
16    <addressOffset>0x00</addressOffset>
17    <access>read-write</access>
18    <fields>
19     <field>
20      <name>cnnx16_0_pwr_en</name>
21      <description>CNNx16_0 Power Domain Enable</description>
22      <bitOffset>0</bitOffset>
23      <bitWidth>1</bitWidth>
24     </field>
25     <field>
26      <name>cnnx16_1_pwr_en</name>
27      <description>CNNx16_1 Power Domain Enable</description>
28      <bitOffset>1</bitOffset>
29      <bitWidth>1</bitWidth>
30     </field>
31     <field>
32      <name>cnnx16_2_pwr_en</name>
33      <description>CNNx16_2 Power Domain Enable</description>
34      <bitOffset>2</bitOffset>
35      <bitWidth>1</bitWidth>
36     </field>
37     <field>
38      <name>cnnx16_3_pwr_en</name>
39      <description>CNNx16_3 Power Domain Enable</description>
40      <bitOffset>3</bitOffset>
41      <bitWidth>1</bitWidth>
42     </field>
43    </fields>
44   </register>
45   <register>
46    <name>REG1</name>
47    <description>Register 1.</description>
48    <addressOffset>0x04</addressOffset>
49    <access>read-write</access>
50    <fields>
51     <field>
52      <name>cnnx16_0_ram_en</name>
53      <description>CNNx16_0 RAM Power Enable</description>
54      <bitOffset>0</bitOffset>
55      <bitWidth>1</bitWidth>
56     </field>
57     <field>
58      <name>cnnx16_1_ram_en</name>
59      <description>CNNx16_1 RAM Power Enable</description>
60      <bitOffset>1</bitOffset>
61      <bitWidth>1</bitWidth>
62     </field>
63     <field>
64      <name>cnnx16_2_ram_en</name>
65      <description>CNNx16_2 RAM Power Enable</description>
66      <bitOffset>2</bitOffset>
67      <bitWidth>1</bitWidth>
68     </field>
69     <field>
70      <name>cnnx16_3_ram_en</name>
71      <description>CNNx16_3 RAM Power Enable</description>
72      <bitOffset>3</bitOffset>
73      <bitWidth>1</bitWidth>
74     </field>
75    </fields>
76   </register>
77   <register>
78    <name>REG2</name>
79    <description>Register 2.</description>
80    <addressOffset>0x08</addressOffset>
81    <access>read-write</access>
82    <fields>
83     <field>
84      <name>cnnx16_0_iso</name>
85      <description>CNNx16_0 Power Domain Isolation</description>
86      <bitOffset>0</bitOffset>
87      <bitWidth>1</bitWidth>
88     </field>
89     <field>
90      <name>cnnx16_1_iso</name>
91      <description>CNNx16_1 Power Domain Isolation</description>
92      <bitOffset>1</bitOffset>
93      <bitWidth>1</bitWidth>
94     </field>
95     <field>
96      <name>cnnx16_2_iso</name>
97      <description>CNNx16_2 Power Domain Isolation</description>
98      <bitOffset>2</bitOffset>
99      <bitWidth>1</bitWidth>
100     </field>
101     <field>
102      <name>cnnx16_3_iso</name>
103      <description>CNNx16_3 Power Domain Isolation</description>
104      <bitOffset>3</bitOffset>
105      <bitWidth>1</bitWidth>
106     </field>
107    </fields>
108   </register>
109   <register>
110    <name>REG3</name>
111    <description>Register 3.</description>
112    <addressOffset>0x0C</addressOffset>
113    <access>read-write</access>
114    <fields>
115     <field>
116      <name>cnnx16_0_rst</name>
117      <description>CNNx16_0 Power Domain Reset</description>
118      <bitOffset>0</bitOffset>
119      <bitWidth>1</bitWidth>
120     </field>
121     <field>
122      <name>cnnx16_1_rst</name>
123      <description>CNNx16_1 Power Domain Reset</description>
124      <bitOffset>1</bitOffset>
125      <bitWidth>1</bitWidth>
126     </field>
127     <field>
128      <name>cnnx16_2_rst</name>
129      <description>CNNx16_2 Power Domain Reset</description>
130      <bitOffset>2</bitOffset>
131      <bitWidth>1</bitWidth>
132     </field>
133     <field>
134      <name>cnnx16_3_rst</name>
135      <description>CNNx16_3 Power Domain Reset</description>
136      <bitOffset>3</bitOffset>
137      <bitWidth>1</bitWidth>
138     </field>
139    </fields>
140   </register>
141  </registers>
142 </peripheral>
143</device>
144