1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 #include "srcc.h"
22 #include "srcc_reva.h"
23 #include "gcr_regs.h"
24 #include "mxc_device.h"
25 
MXC_SRCC_ID(mxc_srcc_cache_id_t id)26 uint32_t MXC_SRCC_ID(mxc_srcc_cache_id_t id)
27 {
28     return MXC_SRCC_RevA_ID((mxc_srcc_reva_regs_t *)MXC_SRCC, id);
29 }
30 
MXC_SRCC_CacheSize(void)31 uint32_t MXC_SRCC_CacheSize(void)
32 {
33     return MXC_SRCC_RevA_CacheSize((mxc_srcc_reva_regs_t *)MXC_SRCC);
34 }
35 
MXC_SRCC_MemSize(void)36 uint32_t MXC_SRCC_MemSize(void)
37 {
38     return MXC_SRCC_RevA_MemSize((mxc_srcc_reva_regs_t *)MXC_SRCC);
39 }
40 
MXC_SRCC_Enable(void)41 void MXC_SRCC_Enable(void)
42 {
43     MXC_GCR->sysctrl &= ~MXC_F_GCR_SYSCTRL_SRCC_DIS;
44     MXC_SRCC_RevA_Enable((mxc_srcc_reva_regs_t *)MXC_SRCC);
45 }
46 
MXC_SRCC_Disable(void)47 void MXC_SRCC_Disable(void)
48 {
49     MXC_SRCC_RevA_Disable((mxc_srcc_reva_regs_t *)MXC_SRCC);
50     MXC_GCR->sysctrl |= MXC_F_GCR_SYSCTRL_SRCC_DIS;
51 }
52 
MXC_SRCC_Flush(void)53 void MXC_SRCC_Flush(void)
54 {
55     MXC_GCR->sysctrl |= MXC_F_GCR_SYSCTRL_ICC0_FLUSH;
56 }
MXC_SRCC_WriteAllocateEnable(void)57 void MXC_SRCC_WriteAllocateEnable(void)
58 {
59     MXC_SRCC_RevA_WriteAllocateEnable((mxc_srcc_reva_regs_t *)MXC_SRCC);
60 }
61 
MXC_SRCC_WriteAllocateDisable(void)62 void MXC_SRCC_WriteAllocateDisable(void)
63 {
64     MXC_SRCC_RevA_WriteAllocateDisable((mxc_srcc_reva_regs_t *)MXC_SRCC);
65 }
66 
MXC_SRCC_CriticalWordFirstEnable(void)67 void MXC_SRCC_CriticalWordFirstEnable(void) //cwfst_dis
68 {
69     MXC_SRCC_RevA_CriticalWordFirstEnable((mxc_srcc_reva_regs_t *)MXC_SRCC);
70 }
71 
MXC_SRCC_CriticalWordFirstDisable(void)72 void MXC_SRCC_CriticalWordFirstDisable(void) //cwfst_dis
73 {
74     MXC_SRCC_RevA_CriticalWordFirstDisable((mxc_srcc_reva_regs_t *)MXC_SRCC);
75 }
76 
MXC_SRCC_Ready(void)77 uint32_t MXC_SRCC_Ready(void)
78 {
79     return MXC_SRCC_RevA_Ready((mxc_srcc_reva_regs_t *)MXC_SRCC);
80 }
81