1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>SPIXFC_FIFO</name> 5 <description>SPI XiP Master Controller FIFO.</description> 6 <baseAddress>0x400BC000</baseAddress> 7 <addressBlock> 8 <offset>0</offset> 9 <size>0x1000</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <registers> 13 <register> 14 <name>TX_8</name> 15 <description>SPI TX FIFO 8-Bit Write</description> 16 <addressOffset>0x00</addressOffset> 17 <size>8</size> 18 <dataType>uint8_t</dataType> 19 </register> 20 <register> 21 <name>TX_16</name> 22 <description>SPI TX FIFO 16-Bit Write</description> 23 <alternateRegister>TX_8</alternateRegister> 24 <addressOffset>0x00</addressOffset> 25 <size>16</size> 26 <dataType>uint16_t</dataType> 27 </register> 28 <register> 29 <name>TX_32</name> 30 <description>SPI TX FIFO 32-Bit Write</description> 31 <alternateRegister>TX_8</alternateRegister> 32 <addressOffset>0x00</addressOffset> 33 <size>32</size> 34 <dataType>uint32_t</dataType> 35 </register> 36 <register> 37 <name>RX_8</name> 38 <description>SPI RX FIFO 8-Bit Access</description> 39 <addressOffset>0x04</addressOffset> 40 <size>8</size> 41 <dataType>uint8_t</dataType> 42 </register> 43 <register> 44 <name>RX_16</name> 45 <description>SPI RX FIFO 16-Bit Access</description> 46 <alternateRegister>RX_8</alternateRegister> 47 <addressOffset>0x04</addressOffset> 48 <size>16</size> 49 <dataType>uint16_t</dataType> 50 </register> 51 <register> 52 <name>RX_32</name> 53 <description>SPI RX FIFO 32-Bit Access</description> 54 <alternateRegister>RX_8</alternateRegister> 55 <addressOffset>0x04</addressOffset> 56 <size>32</size> 57 <dataType>uint32_t</dataType> 58 </register> 59 </registers> 60 </peripheral> 61<!-- SPIXC_FIFO: SPI XiP Master Controller FIFO --> 62</device> 63