1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>SIMO</name> 5 <description>Single Inductor Multiple Output Switching Converter</description> 6 <baseAddress>0x40004400</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x400</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <registers> 13 <register> 14 <name>VREGO_A</name> 15 <description>Buck Voltage Regulator A Control Register</description> 16 <addressOffset>0x0004</addressOffset> 17 <access>read-write</access> 18 <fields> 19 <field> 20 <name>VSETA</name> 21 <description>Regulator Output Voltage Setting</description> 22 <bitOffset>0</bitOffset> 23 <bitWidth>7</bitWidth> 24 </field> 25 <field> 26 <name>RANGEA</name> 27 <description>Regulator Output Range Set</description> 28 <bitOffset>7</bitOffset> 29 <bitWidth>1</bitWidth> 30 <enumeratedValues> 31 <enumeratedValue> 32 <name>low</name> 33 <description>Low output voltage range</description> 34 <value>0</value> 35 </enumeratedValue> 36 <enumeratedValue> 37 <name>high</name> 38 <description>High output voltage range</description> 39 <value>1</value> 40 </enumeratedValue> 41 </enumeratedValues> 42 </field> 43 </fields> 44 </register> 45 <register> 46 <name>VREGO_B</name> 47 <description>Buck Voltage Regulator B Control Register</description> 48 <addressOffset>0x0008</addressOffset> 49 <access>read-write</access> 50 <fields> 51 <field> 52 <name>VSETB</name> 53 <description>Regulator Output Voltage Setting</description> 54 <bitOffset>0</bitOffset> 55 <bitWidth>7</bitWidth> 56 </field> 57 <field> 58 <name>RANGEB</name> 59 <description>Regulator Output Range Set</description> 60 <bitOffset>7</bitOffset> 61 <bitWidth>1</bitWidth> 62 <enumeratedValues> 63 <enumeratedValue> 64 <name>low</name> 65 <description>Low output voltage range</description> 66 <value>0</value> 67 </enumeratedValue> 68 <enumeratedValue> 69 <name>high</name> 70 <description>High output voltage range</description> 71 <value>1</value> 72 </enumeratedValue> 73 </enumeratedValues> 74 </field> 75 </fields> 76 </register> 77 <register> 78 <name>VREGO_C</name> 79 <description>Buck Voltage Regulator C Control Register</description> 80 <addressOffset>0x000C</addressOffset> 81 <access>read-write</access> 82 <fields> 83 <field> 84 <name>VSETC</name> 85 <description>Regulator Output Voltage Setting</description> 86 <bitOffset>0</bitOffset> 87 <bitWidth>7</bitWidth> 88 </field> 89 <field> 90 <name>RANGEC</name> 91 <description>Regulator Output Range Set</description> 92 <bitOffset>7</bitOffset> 93 <bitWidth>1</bitWidth> 94 <enumeratedValues> 95 <enumeratedValue> 96 <name>low</name> 97 <description>Low output voltage range</description> 98 <value>0</value> 99 </enumeratedValue> 100 <enumeratedValue> 101 <name>high</name> 102 <description>High output voltage range</description> 103 <value>1</value> 104 </enumeratedValue> 105 </enumeratedValues> 106 </field> 107 </fields> 108 </register> 109 <register> 110 <name>VREGO_D</name> 111 <description>Buck Voltage Regulator D Control Register</description> 112 <addressOffset>0x0010</addressOffset> 113 <access>read-write</access> 114 <fields> 115 <field> 116 <name>VSETD</name> 117 <description>Regulator Output Voltage Setting</description> 118 <bitOffset>0</bitOffset> 119 <bitWidth>7</bitWidth> 120 </field> 121 <field> 122 <name>RANGED</name> 123 <description>Regulator Output Range Set</description> 124 <bitOffset>7</bitOffset> 125 <bitWidth>1</bitWidth> 126 <enumeratedValues> 127 <enumeratedValue> 128 <name>low</name> 129 <description>Low output voltage range</description> 130 <value>0</value> 131 </enumeratedValue> 132 <enumeratedValue> 133 <name>high</name> 134 <description>High output voltage range</description> 135 <value>1</value> 136 </enumeratedValue> 137 </enumeratedValues> 138 </field> 139 </fields> 140 </register> 141 <register> 142 <name>IPKA</name> 143 <description>High Side FET Peak Current VREGO_A/VREGO_B Register</description> 144 <addressOffset>0x0014</addressOffset> 145 <access>read-write</access> 146 <fields> 147 <field> 148 <name>IPKSETA</name> 149 <description>Voltage Regulator Peak Current Setting</description> 150 <bitOffset>0</bitOffset> 151 <bitWidth>4</bitWidth> 152 </field> 153 <field> 154 <name>IPKSETB</name> 155 <description>Voltage Regulator Peak Current Setting</description> 156 <bitOffset>4</bitOffset> 157 <bitWidth>4</bitWidth> 158 </field> 159 </fields> 160 </register> 161 <register> 162 <name>IPKB</name> 163 <description>High Side FET Peak Current VREGO_C/VREGO_D Register</description> 164 <addressOffset>0x0018</addressOffset> 165 <access>read-write</access> 166 <fields> 167 <field> 168 <name>IPKSETC</name> 169 <description>Voltage Regulator Peak Current Setting</description> 170 <bitOffset>0</bitOffset> 171 <bitWidth>4</bitWidth> 172 </field> 173 <field> 174 <name>IPKSETD</name> 175 <description>Voltage Regulator Peak Current Setting</description> 176 <bitOffset>4</bitOffset> 177 <bitWidth>4</bitWidth> 178 </field> 179 </fields> 180 </register> 181 <register> 182 <name>MAXTON</name> 183 <description>Maximum High Side FET Time On Register</description> 184 <addressOffset>0x001C</addressOffset> 185 <access>read-write</access> 186 <fields> 187 <field> 188 <name>TONSET</name> 189 <description>Sets the maximum on time for the high side FET, each increment represents 500ns</description> 190 <bitOffset>0</bitOffset> 191 <bitWidth>4</bitWidth> 192 </field> 193 </fields> 194 </register> 195 <register> 196 <name>ILOAD_A</name> 197 <description>Buck Cycle Count VREGO_A Register</description> 198 <addressOffset>0x0020</addressOffset> 199 <access>read-only</access> 200 <fields> 201 <field> 202 <name>ILOADA</name> 203 <description>Number of buck cycles that occur within the cycle clock</description> 204 <bitOffset>0</bitOffset> 205 <bitWidth>8</bitWidth> 206 </field> 207 </fields> 208 </register> 209 <register> 210 <name>ILOAD_B</name> 211 <description>Buck Cycle Count VREGO_B Register</description> 212 <addressOffset>0x0024</addressOffset> 213 <access>read-only</access> 214 <fields> 215 <field> 216 <name>ILOADB</name> 217 <description>Number of buck cycles that occur within the cycle clock</description> 218 <bitOffset>0</bitOffset> 219 <bitWidth>8</bitWidth> 220 </field> 221 </fields> 222 </register> 223 <register> 224 <name>ILOAD_C</name> 225 <description>Buck Cycle Count VREGO_C Register</description> 226 <addressOffset>0x0028</addressOffset> 227 <access>read-only</access> 228 <fields> 229 <field> 230 <name>ILOADC</name> 231 <description>Number of buck cycles that occur within the cycle clock</description> 232 <bitOffset>0</bitOffset> 233 <bitWidth>8</bitWidth> 234 </field> 235 </fields> 236 </register> 237 <register> 238 <name>ILOAD_D</name> 239 <description>Buck Cycle Count VREGO_D Register</description> 240 <addressOffset>0x002C</addressOffset> 241 <access>read-only</access> 242 <fields> 243 <field> 244 <name>ILOADD</name> 245 <description>Number of buck cycles that occur within the cycle clock</description> 246 <bitOffset>0</bitOffset> 247 <bitWidth>8</bitWidth> 248 </field> 249 </fields> 250 </register> 251 <register> 252 <name>BUCK_ALERT_THR_A</name> 253 <description>Buck Cycle Count Alert VERGO_A Register</description> 254 <addressOffset>0x0030</addressOffset> 255 <access>read-write</access> 256 <fields> 257 <field> 258 <name>BUCKTHRA</name> 259 <description>Threshold for ILOADA to generate the BUCK_ALERT</description> 260 <bitOffset>0</bitOffset> 261 <bitWidth>8</bitWidth> 262 </field> 263 </fields> 264 </register> 265 <register> 266 <name>BUCK_ALERT_THR_B</name> 267 <description>Buck Cycle Count Alert VERGO_B Register</description> 268 <addressOffset>0x0034</addressOffset> 269 <access>read-write</access> 270 <fields> 271 <field> 272 <name>BUCKTHRB</name> 273 <description>Threshold for ILOADB to generate the BUCK_ALERT</description> 274 <bitOffset>0</bitOffset> 275 <bitWidth>8</bitWidth> 276 </field> 277 </fields> 278 </register> 279 <register> 280 <name>BUCK_ALERT_THR_C</name> 281 <description>Buck Cycle Count Alert VERGO_C Register</description> 282 <addressOffset>0x0038</addressOffset> 283 <access>read-write</access> 284 <fields> 285 <field> 286 <name>BUCKTHRC</name> 287 <description>Threshold for ILOADC to generate the BUCK_ALERT</description> 288 <bitOffset>0</bitOffset> 289 <bitWidth>8</bitWidth> 290 </field> 291 </fields> 292 </register> 293 <register> 294 <name>BUCK_ALERT_THR_D</name> 295 <description>Buck Cycle Count Alert VERGO_D Register</description> 296 <addressOffset>0x003C</addressOffset> 297 <access>read-write</access> 298 <fields> 299 <field> 300 <name>BUCKTHRD</name> 301 <description>Threshold for ILOADD to generate the BUCK_ALERT</description> 302 <bitOffset>0</bitOffset> 303 <bitWidth>8</bitWidth> 304 </field> 305 </fields> 306 </register> 307 <register> 308 <name>BUCK_OUT_READY</name> 309 <description>Buck Regulator Output Ready Register</description> 310 <addressOffset>0x0040</addressOffset> 311 <access>read-only</access> 312 <fields> 313 <field> 314 <name>BUCKOUTRDYA</name> 315 <description>When set, indicates that the output voltage has reached its regulated value</description> 316 <bitOffset>0</bitOffset> 317 <bitWidth>1</bitWidth> 318 <enumeratedValues> 319 <enumeratedValue> 320 <name>notrdy</name> 321 <description>Output voltage not in range</description> 322 <value>0</value> 323 </enumeratedValue> 324 <enumeratedValue> 325 <name>rdy</name> 326 <description>Output voltage in range</description> 327 <value>1</value> 328 </enumeratedValue> 329 </enumeratedValues> 330 </field> 331 <field derivedFrom="BUCKOUTRDYA"> 332 <name>BUCKOUTRDYB</name> 333 <description>When set, indicates that the output voltage has reached its regulated value</description> 334 <bitOffset>1</bitOffset> 335 <bitWidth>1</bitWidth> 336 </field> 337 <field derivedFrom="BUCKOUTRDYA"> 338 <name>BUCKOUTRDYC</name> 339 <description>When set, indicates that the output voltage has reached its regulated value</description> 340 <bitOffset>2</bitOffset> 341 <bitWidth>1</bitWidth> 342 </field> 343 <field derivedFrom="BUCKOUTRDYA"> 344 <name>BUCKOUTRDYD</name> 345 <description>When set, indicates that the output voltage has reached its regulated value</description> 346 <bitOffset>3</bitOffset> 347 <bitWidth>1</bitWidth> 348 </field> 349 </fields> 350 </register> 351 <register> 352 <name>ZERO_CROSS_CAL_A</name> 353 <description>Zero Cross Calibration VERGO_A Register</description> 354 <addressOffset>0x0044</addressOffset> 355 <access>read-only</access> 356 <fields> 357 <field> 358 <name>ZXCALA</name> 359 <description>Zero Cross Calibrartion Value VREGO_A</description> 360 <bitOffset>0</bitOffset> 361 <bitWidth>4</bitWidth> 362 </field> 363 </fields> 364 </register> 365 <register> 366 <name>ZERO_CROSS_CAL_B</name> 367 <description>Zero Cross Calibration VERGO_B Register</description> 368 <addressOffset>0x0048</addressOffset> 369 <access>read-only</access> 370 <fields> 371 <field> 372 <name>ZXCALB</name> 373 <description>Zero Cross Calibrartion Value VREGO_B</description> 374 <bitOffset>0</bitOffset> 375 <bitWidth>4</bitWidth> 376 </field> 377 </fields> 378 </register> 379 <register> 380 <name>ZERO_CROSS_CAL_C</name> 381 <description>Zero Cross Calibration VERGO_C Register</description> 382 <addressOffset>0x004C</addressOffset> 383 <access>read-only</access> 384 <fields> 385 <field> 386 <name>ZXCALC</name> 387 <description>Zero Cross Calibrartion Value VREGO_C</description> 388 <bitOffset>0</bitOffset> 389 <bitWidth>4</bitWidth> 390 </field> 391 </fields> 392 </register> 393 <register> 394 <name>ZERO_CROSS_CAL_D</name> 395 <description>Zero Cross Calibration VERGO_D Register</description> 396 <addressOffset>0x0050</addressOffset> 397 <access>read-only</access> 398 <fields> 399 <field> 400 <name>ZXCALD</name> 401 <description>Zero Cross Calibrartion Value VREGO_D</description> 402 <bitOffset>0</bitOffset> 403 <bitWidth>4</bitWidth> 404 </field> 405 </fields> 406 </register> 407 </registers> 408 </peripheral> 409<!-- SIMO: SIMO Registers--> 410</device>
