1<?xml version="1.0" encoding="utf-8" standalone="no"?>
2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd">
3 <peripheral>
4<!-- SFE -->
5  <name>SFE</name>
6  <description>Serial Flash Emulator.</description>
7  <baseAddress>0x400A0000</baseAddress>
8  <addressBlock>
9   <offset>0x00</offset>
10   <size>0x1000</size>
11   <usage>registers</usage>
12  </addressBlock>
13  <registers>
14   <register>
15    <name>CFG</name>
16    <description>SFE Configuration Register.</description>
17    <addressOffset>0x0400</addressOffset>
18    <size>32</size>
19    <fields>
20     <field>
21      <name>DRLE</name>
22      <description>Data Rise Launch Edge Enable.</description>
23      <bitOffset>0</bitOffset>
24      <bitWidth>1</bitWidth>
25     </field>
26     <field>
27      <name>FLOCK</name>
28      <description>Flash Lock.</description>
29      <bitOffset>15</bitOffset>
30      <bitWidth>1</bitWidth>
31     </field>
32     <field>
33      <name>RD_EN</name>
34      <description>RAM Read Enable.</description>
35      <bitOffset>16</bitOffset>
36      <bitWidth>1</bitWidth>
37     </field>
38     <field>
39      <name>WR_EN</name>
40      <description>RAM Write Enable.</description>
41      <bitOffset>17</bitOffset>
42      <bitWidth>1</bitWidth>
43     </field>
44     <field>
45      <name>RRLOCK</name>
46      <description>RAM Read Lock.</description>
47      <bitOffset>22</bitOffset>
48      <bitWidth>1</bitWidth>
49     </field>
50     <field>
51      <name>RWLOCK</name>
52      <description>RAM Write Lock.</description>
53      <bitOffset>23</bitOffset>
54      <bitWidth>1</bitWidth>
55     </field>
56    </fields>
57   </register>
58   <register>
59    <name>HFSA</name>
60    <description>SFE Host Flash Start Address Register.</description>
61    <addressOffset>0x0408</addressOffset>
62    <fields>
63     <field>
64      <name>HFSA</name>
65      <description> Serial Flash Host Flash Start Address.</description>
66      <bitOffset>10</bitOffset>
67      <bitWidth>22</bitWidth>
68     </field>
69    </fields>
70   </register>
71   <register>
72    <name>HRSA</name>
73    <description>SFE Host RAM Start Address Register.</description>
74    <addressOffset>0x040C</addressOffset>
75    <fields>
76     <field>
77      <name>HRSA</name>
78      <description> Serial Flash Host RAM Start Address.</description>
79      <bitOffset>10</bitOffset>
80      <bitWidth>22</bitWidth>
81     </field>
82    </fields>
83   </register>
84   <register>
85    <name>SFDP_SBA</name>
86    <description>SFE Discoverable Parameter System Base Register.</description>
87    <addressOffset>0x0410</addressOffset>
88    <fields>
89     <field>
90      <name>SFDP_SBA</name>
91      <description> SFDP upper 24 bits System Base Address.</description>
92      <bitOffset>8</bitOffset>
93      <bitWidth>24</bitWidth>
94     </field>
95    </fields>
96   </register>
97   <register>
98    <name>FLASH_SBA</name>
99    <description>Flash System Base Address Register.</description>
100    <addressOffset>0x0414</addressOffset>
101    <fields>
102     <field>
103      <name>FLASH_SBA</name>
104      <description> FLASH upper 22 bits System Base Address.</description>
105      <bitOffset>10</bitOffset>
106      <bitWidth>22</bitWidth>
107     </field>
108    </fields>
109   </register>
110   <register>
111    <name>FLASH_STA</name>
112    <description>Flash System Top Address Register.</description>
113    <addressOffset>0x0418</addressOffset>
114    <fields>
115     <field>
116      <name>FLASH_STA</name>
117      <description> FLASH upper 22 bits System Top Address.</description>
118      <bitOffset>10</bitOffset>
119      <bitWidth>22</bitWidth>
120     </field>
121    </fields>
122   </register>
123   <register>
124    <name>RAM_SBA</name>
125    <description>RAM System Base Address Register.</description>
126    <addressOffset>0x041C</addressOffset>
127    <fields>
128     <field>
129      <name>RAM_SBA</name>
130      <description> RAM upper 22 bits System Base Address.</description>
131      <bitOffset>10</bitOffset>
132      <bitWidth>22</bitWidth>
133     </field>
134    </fields>
135   </register>
136   <register>
137    <name>RAM_STA</name>
138    <description>RAM System Top Address Register.</description>
139    <addressOffset>0x0420</addressOffset>
140    <fields>
141     <field>
142      <name>RAM_STA</name>
143      <description> RAM upper 22 bits System Top Address.</description>
144      <bitOffset>10</bitOffset>
145      <bitWidth>22</bitWidth>
146     </field>
147    </fields>
148   </register>
149  </registers>
150 </peripheral>
151<!-- AES -->
152</device>
153