1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>SDHC</name> 5 <description>SDHC/SDIO Controller</description> 6 <baseAddress>0x40037000</baseAddress> 7 <addressBlock> 8 <offset>0</offset> 9 <size>0x1000</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <interrupt> 13 <name>SDHC</name> 14 <value>66</value> 15 </interrupt> 16 <registers> 17 <register> 18 <name>SDMA</name> 19 <description>SDMA System Address / Argument 2.</description> 20 <addressOffset>0x00</addressOffset> 21 <size>32</size> 22 <fields> 23 <field> 24 <name>ADDR</name> 25 <description>SDMA System Address / Argument 2 of Auto CMD23.</description> 26 <bitOffset>0</bitOffset> 27 <bitWidth>32</bitWidth> 28 </field> 29 </fields> 30 </register> 31 <register> 32 <name>BLK_SIZE</name> 33 <description>Block Size.</description> 34 <addressOffset>0x04</addressOffset> 35 <size>16</size> 36 <fields> 37 <field> 38 <name>TRANS</name> 39 <description>Transfer Block Size.</description> 40 <bitOffset>0</bitOffset> 41 <bitWidth>12</bitWidth> 42 </field> 43 <field> 44 <name>HOST_BUF</name> 45 <description>Host SDMA Buffer Boundary.</description> 46 <bitOffset>12</bitOffset> 47 <bitWidth>3</bitWidth> 48 <enumeratedValues> 49 <enumeratedValue> 50 <name>4KB</name> 51 <value>0</value> 52 </enumeratedValue> 53 <enumeratedValue> 54 <name>8KB</name> 55 <value>1</value> 56 </enumeratedValue> 57 <enumeratedValue> 58 <name>16KB</name> 59 <value>2</value> 60 </enumeratedValue> 61 <enumeratedValue> 62 <name>32KB</name> 63 <value>3</value> 64 </enumeratedValue> 65 <enumeratedValue> 66 <name>64KB</name> 67 <value>4</value> 68 </enumeratedValue> 69 <enumeratedValue> 70 <name>128KB</name> 71 <value>5</value> 72 </enumeratedValue> 73 <enumeratedValue> 74 <name>256KB</name> 75 <value>6</value> 76 </enumeratedValue> 77 <enumeratedValue> 78 <name>512KB</name> 79 <value>7</value> 80 </enumeratedValue> 81 </enumeratedValues> 82 </field> 83 </fields> 84 </register> 85 <register> 86 <name>BLK_CNT</name> 87 <description>Block Count.</description> 88 <addressOffset>0x06</addressOffset> 89 <size>16</size> 90 <fields> 91 <field> 92 <name>COUNT</name> 93 <description>Blocks Count For Current Transfer.</description> 94 <bitOffset>0</bitOffset> 95 <bitWidth>16</bitWidth> 96 </field> 97 </fields> 98 </register> 99 <register> 100 <name>ARG_1</name> 101 <description>Argument 1.</description> 102 <addressOffset>0x08</addressOffset> 103 <size>32</size> 104 <fields> 105 <field> 106 <name>CMD</name> 107 <description>Command Argument 1.</description> 108 <bitOffset>0</bitOffset> 109 <bitWidth>32</bitWidth> 110 </field> 111 </fields> 112 </register> 113 <register> 114 <name>TRANS</name> 115 <description>Transfer Mode.</description> 116 <addressOffset>0x0C</addressOffset> 117 <size>16</size> 118 <fields> 119 <field> 120 <name>DMA_EN</name> 121 <description>DMA Enable.</description> 122 <bitOffset>0</bitOffset> 123 <bitWidth>1</bitWidth> 124 <enumeratedValues> 125 <enumeratedValue> 126 <name>dis</name> 127 <value>0</value> 128 </enumeratedValue> 129 <enumeratedValue> 130 <name>en</name> 131 <value>1</value> 132 </enumeratedValue> 133 </enumeratedValues> 134 </field> 135 <field> 136 <name>BLK_CNT_EN</name> 137 <description>Block Count Enable.</description> 138 <bitOffset>1</bitOffset> 139 <bitWidth>1</bitWidth> 140 <enumeratedValues> 141 <enumeratedValue> 142 <name>dis</name> 143 <value>0</value> 144 </enumeratedValue> 145 <enumeratedValue> 146 <name>en</name> 147 <value>1</value> 148 </enumeratedValue> 149 </enumeratedValues> 150 </field> 151 <field> 152 <name>AUTO_CMD_EN</name> 153 <description>Auto CMD Enable.</description> 154 <bitOffset>2</bitOffset> 155 <bitWidth>2</bitWidth> 156 <enumeratedValues> 157 <enumeratedValue> 158 <name>disable</name> 159 <value>0</value> 160 </enumeratedValue> 161 <enumeratedValue> 162 <name>cmd12</name> 163 <value>1</value> 164 </enumeratedValue> 165 <enumeratedValue> 166 <name>cmd23</name> 167 <value>2</value> 168 </enumeratedValue> 169 </enumeratedValues> 170 </field> 171 <field> 172 <name>READ_WRITE</name> 173 <description>Data Transfer Direction Select.</description> 174 <bitOffset>4</bitOffset> 175 <bitWidth>1</bitWidth> 176 <enumeratedValues> 177 <enumeratedValue> 178 <name>write</name> 179 <value>0</value> 180 </enumeratedValue> 181 <enumeratedValue> 182 <name>read</name> 183 <value>1</value> 184 </enumeratedValue> 185 </enumeratedValues> 186 </field> 187 <field> 188 <name>MULTI</name> 189 <description>Multi / Single Block Select.</description> 190 <bitOffset>5</bitOffset> 191 <bitWidth>1</bitWidth> 192 <enumeratedValues> 193 <enumeratedValue> 194 <name>multi</name> 195 <value>1</value> 196 </enumeratedValue> 197 <enumeratedValue> 198 <name>single</name> 199 <value>0</value> 200 </enumeratedValue> 201 </enumeratedValues> 202 </field> 203 </fields> 204 </register> 205 <register> 206 <name>CMD</name> 207 <description>Command.</description> 208 <addressOffset>0x0E</addressOffset> 209 <size>16</size> 210 <fields> 211 <field> 212 <name>RESP_TYPE</name> 213 <description>Response Type Select.</description> 214 <bitOffset>0</bitOffset> 215 <bitWidth>2</bitWidth> 216 <enumeratedValues> 217 <enumeratedValue> 218 <name>none</name> 219 <value>0</value> 220 </enumeratedValue> 221 <enumeratedValue> 222 <name>resp136</name> 223 <value>1</value> 224 </enumeratedValue> 225 <enumeratedValue> 226 <name>resp48</name> 227 <value>2</value> 228 </enumeratedValue> 229 <enumeratedValue> 230 <name>resp48_busy</name> 231 <value>3</value> 232 </enumeratedValue> 233 </enumeratedValues> 234 </field> 235 <field> 236 <name>CRC_CHK_EN</name> 237 <description>Command CRC Check Enable.</description> 238 <bitOffset>3</bitOffset> 239 <bitWidth>1</bitWidth> 240 <enumeratedValues> 241 <enumeratedValue> 242 <name>en</name> 243 <value>1</value> 244 </enumeratedValue> 245 <enumeratedValue> 246 <name>dis</name> 247 <value>0</value> 248 </enumeratedValue> 249 </enumeratedValues> 250 </field> 251 <field> 252 <name>IDX_CHK_EN</name> 253 <description>Command Index Check Enable.</description> 254 <bitOffset>4</bitOffset> 255 <bitWidth>1</bitWidth> 256 <enumeratedValues> 257 <enumeratedValue> 258 <name>en</name> 259 <value>1</value> 260 </enumeratedValue> 261 <enumeratedValue> 262 <name>dis</name> 263 <value>0</value> 264 </enumeratedValue> 265 </enumeratedValues> 266 </field> 267 <field> 268 <name>DATA_PRES_SEL</name> 269 <description>Data Present Select.</description> 270 <bitOffset>5</bitOffset> 271 <bitWidth>1</bitWidth> 272 </field> 273 <field> 274 <name>TYPE</name> 275 <description>Command Type.</description> 276 <bitOffset>6</bitOffset> 277 <bitWidth>2</bitWidth> 278 <enumeratedValues> 279 <enumeratedValue> 280 <name>normal</name> 281 <value>0</value> 282 </enumeratedValue> 283 <enumeratedValue> 284 <name>suspend</name> 285 <value>1</value> 286 </enumeratedValue> 287 <enumeratedValue> 288 <name>resume</name> 289 <value>2</value> 290 </enumeratedValue> 291 <enumeratedValue> 292 <name>abort</name> 293 <value>3</value> 294 </enumeratedValue> 295 </enumeratedValues> 296 </field> 297 <field> 298 <name>IDX</name> 299 <description>Command Index.</description> 300 <bitOffset>8</bitOffset> 301 <bitWidth>6</bitWidth> 302 </field> 303 </fields> 304 </register> 305 <register> 306 <dim>8</dim> 307 <dimIncrement>2</dimIncrement> 308 <name>RESP[%s]</name> 309 <description>Response 0 Register 0-15.</description> 310 <addressOffset>0x010</addressOffset> 311 <size>16</size> 312 <fields> 313 <field> 314 <name>CMD_RESP</name> 315 <description>Command Response.</description> 316 <bitOffset>0</bitOffset> 317 <bitWidth>16</bitWidth> 318 </field> 319 </fields> 320 </register> 321 <register> 322 <name>BUFFER</name> 323 <description>Buffer Data Port.</description> 324 <addressOffset>0x20</addressOffset> 325 <size>32</size> 326 <fields> 327 <field> 328 <name>DATA</name> 329 <description>Buffer Data.</description> 330 <bitOffset>0</bitOffset> 331 <bitWidth>32</bitWidth> 332 </field> 333 </fields> 334 </register> 335 <register> 336 <name>PRESENT</name> 337 <description>Present State.</description> 338 <addressOffset>0x024</addressOffset> 339 <size>32</size> 340 <access>read-only</access> 341 <fields> 342 <field> 343 <name>CMD_COMP</name> 344 <description>Command Inhibit (CMD).</description> 345 <bitOffset>0</bitOffset> 346 <bitWidth>1</bitWidth> 347 <access>read-only</access> 348 </field> 349 <field> 350 <name>DAT</name> 351 <description>Command Inhibit (DAT).</description> 352 <bitOffset>1</bitOffset> 353 <bitWidth>1</bitWidth> 354 <access>read-only</access> 355 </field> 356 <field> 357 <name>DAT_LINE_ACTIVE</name> 358 <description>DAT Line Active.</description> 359 <bitOffset>2</bitOffset> 360 <bitWidth>1</bitWidth> 361 <access>read-only</access> 362 </field> 363 <field> 364 <name>RETUNING</name> 365 <description>Re-Tuning Request.</description> 366 <bitOffset>3</bitOffset> 367 <bitWidth>1</bitWidth> 368 <access>read-only</access> 369 </field> 370 <field> 371 <name>WRITE_TRANSFER</name> 372 <description>Write Transfer Active.</description> 373 <bitOffset>8</bitOffset> 374 <bitWidth>1</bitWidth> 375 <access>read-only</access> 376 </field> 377 <field> 378 <name>READ_TRANSFER</name> 379 <description>Read Transfer Active.</description> 380 <bitOffset>9</bitOffset> 381 <bitWidth>1</bitWidth> 382 <access>read-only</access> 383 </field> 384 <field> 385 <name>BUFFER_WRITE</name> 386 <description>Buffer Write Enable.</description> 387 <bitOffset>10</bitOffset> 388 <bitWidth>1</bitWidth> 389 <access>read-only</access> 390 </field> 391 <field> 392 <name>BUFFER_READ</name> 393 <description>Buffer Read Enable.</description> 394 <bitOffset>11</bitOffset> 395 <bitWidth>1</bitWidth> 396 <access>read-only</access> 397 </field> 398 <field> 399 <name>CARD_INSERTED</name> 400 <description>Card Inserted.</description> 401 <bitOffset>16</bitOffset> 402 <bitWidth>1</bitWidth> 403 <access>read-only</access> 404 </field> 405 <field> 406 <name>CARD_STATE</name> 407 <description>Card State Stable.</description> 408 <bitOffset>17</bitOffset> 409 <bitWidth>1</bitWidth> 410 <access>read-only</access> 411 </field> 412 <field> 413 <name>CARD_DETECT</name> 414 <description>Card Detect Pin Level.</description> 415 <bitOffset>18</bitOffset> 416 <bitWidth>1</bitWidth> 417 <access>read-only</access> 418 </field> 419 <field> 420 <name>WP</name> 421 <description>Write Protect Switch Pin Level.</description> 422 <bitOffset>19</bitOffset> 423 <bitWidth>1</bitWidth> 424 <access>read-only</access> 425 </field> 426 <field> 427 <name>DAT_SIGNAL_LEVEL</name> 428 <description>DAT[3:0] Line Signal Level.</description> 429 <bitOffset>20</bitOffset> 430 <bitWidth>4</bitWidth> 431 </field> 432 <field> 433 <name>CMD_SIGNAL_LEVEL</name> 434 <description>CMD Line Signal Level.</description> 435 <bitOffset>24</bitOffset> 436 <bitWidth>1</bitWidth> 437 </field> 438 </fields> 439 </register> 440 <register> 441 <name>HOST_CN_1</name> 442 <description>Host Control 1.</description> 443 <addressOffset>0x028</addressOffset> 444 <size>8</size> 445 <fields> 446 <field> 447 <name>LED_CN</name> 448 <description>LED Control.</description> 449 <bitOffset>0</bitOffset> 450 <bitWidth>1</bitWidth> 451 </field> 452 <field> 453 <name>DATA_TRANSFER_WIDTH</name> 454 <description>Data Transfer Width.</description> 455 <bitOffset>1</bitOffset> 456 <bitWidth>1</bitWidth> 457 </field> 458 <field> 459 <name>HS_EN</name> 460 <description>High Speed Enable.</description> 461 <bitOffset>2</bitOffset> 462 <bitWidth>1</bitWidth> 463 </field> 464 <field> 465 <name>DMA_SELECT</name> 466 <description>DMA Select.</description> 467 <bitOffset>3</bitOffset> 468 <bitWidth>2</bitWidth> 469 </field> 470 <field> 471 <name>EXT_DATA_TRANSFER_WIDTH</name> 472 <description>Extended Data Transfer Width.</description> 473 <bitOffset>5</bitOffset> 474 <bitWidth>1</bitWidth> 475 </field> 476 <field> 477 <name>CARD_DETECT_TEST</name> 478 <description>Card Detect Test Level.</description> 479 <bitOffset>6</bitOffset> 480 <bitWidth>1</bitWidth> 481 </field> 482 <field> 483 <name>CARD_DETECT_SIGNAL</name> 484 <description>Card Detect Signal Selection.</description> 485 <bitOffset>7</bitOffset> 486 <bitWidth>1</bitWidth> 487 </field> 488 </fields> 489 </register> 490 <register> 491 <name>PWR</name> 492 <description>Power Control.</description> 493 <addressOffset>0x029</addressOffset> 494 <size>8</size> 495 <fields> 496 <field> 497 <name>BUS_POWER</name> 498 <description>SD Bus Power.</description> 499 <bitOffset>0</bitOffset> 500 <bitWidth>1</bitWidth> 501 </field> 502 <field> 503 <name>BUS_VOLT_SEL</name> 504 <description>SD Bus Voltage Select.</description> 505 <bitOffset>1</bitOffset> 506 <bitWidth>3</bitWidth> 507 <enumeratedValues> 508 <enumeratedValue> 509 <name>1v8_typ</name> 510 <value>5</value> 511 </enumeratedValue> 512 <enumeratedValue> 513 <name>3v_typ</name> 514 <value>6</value> 515 </enumeratedValue> 516 <enumeratedValue> 517 <name>3v3_typ</name> 518 <value>7</value> 519 </enumeratedValue> 520 </enumeratedValues> 521 </field> 522 </fields> 523 </register> 524 <register> 525 <name>BLK_GAP</name> 526 <description>Block Gap Control.</description> 527 <addressOffset>0x02A</addressOffset> 528 <size>8</size> 529 <fields> 530 <field> 531 <name>STOP</name> 532 <description>Stop At Block Gap Request.</description> 533 <bitOffset>0</bitOffset> 534 <bitWidth>1</bitWidth> 535 </field> 536 <field> 537 <name>CONT</name> 538 <description>Continue Request.</description> 539 <bitOffset>1</bitOffset> 540 <bitWidth>1</bitWidth> 541 </field> 542 <field> 543 <name>READ_WAIT</name> 544 <description>Read Wait Control.</description> 545 <bitOffset>2</bitOffset> 546 <bitWidth>1</bitWidth> 547 </field> 548 <field> 549 <name>INTR</name> 550 <description>Interrupt At Block Gap.</description> 551 <bitOffset>3</bitOffset> 552 <bitWidth>1</bitWidth> 553 </field> 554 </fields> 555 </register> 556 <register> 557 <name>WAKEUP</name> 558 <description>Wakeup Control.</description> 559 <addressOffset>0x02B</addressOffset> 560 <size>8</size> 561 <fields> 562 <field> 563 <name>CARD_INT</name> 564 <description>Wakeup Event Enable On Card Interrupt.</description> 565 <bitOffset>0</bitOffset> 566 <bitWidth>1</bitWidth> 567 </field> 568 <field> 569 <name>CARD_INS</name> 570 <description>Wakeup Event Enable On SD Card Insertion.</description> 571 <bitOffset>1</bitOffset> 572 <bitWidth>1</bitWidth> 573 </field> 574 <field> 575 <name>CARD_REM</name> 576 <description>Wakeup Event Enable On SD Card Removal.</description> 577 <bitOffset>2</bitOffset> 578 <bitWidth>1</bitWidth> 579 </field> 580 </fields> 581 </register> 582 <register> 583 <name>CLK_CN</name> 584 <description>Clock Control.</description> 585 <addressOffset>0x02C</addressOffset> 586 <size>16</size> 587 <fields> 588 <field> 589 <name>INTERNAL_CLK_EN</name> 590 <description>Internal Clock Enable.</description> 591 <bitOffset>0</bitOffset> 592 <bitWidth>1</bitWidth> 593 </field> 594 <field> 595 <name>INTERNAL_CLK_STABLE</name> 596 <description>Internal Clock Stable.</description> 597 <bitOffset>1</bitOffset> 598 <bitWidth>1</bitWidth> 599 <access>read-only</access> 600 </field> 601 <field> 602 <name>SD_CLK_EN</name> 603 <description>SD Clock Enable.</description> 604 <bitOffset>2</bitOffset> 605 <bitWidth>1</bitWidth> 606 </field> 607 <field> 608 <name>CLK_GEN_SEL</name> 609 <description>Clock Generator Select.</description> 610 <bitOffset>5</bitOffset> 611 <bitWidth>1</bitWidth> 612 <access>read-only</access> 613 </field> 614 <field> 615 <name>UPPER_SDCLK_FREQ_SEL</name> 616 <description>Upper Bits of SDCLK Frequency Select.</description> 617 <bitOffset>6</bitOffset> 618 <bitWidth>2</bitWidth> 619 </field> 620 <field> 621 <name>SDCLK_FREQ_SEL</name> 622 <description>SDCLK Frequency Select.</description> 623 <bitOffset>8</bitOffset> 624 <bitWidth>8</bitWidth> 625 </field> 626 </fields> 627 </register> 628 <register> 629 <name>TO</name> 630 <description>Timeout Control.</description> 631 <addressOffset>0x02E</addressOffset> 632 <size>8</size> 633 <fields> 634 <field> 635 <name>DATA_COUNT_VALUE</name> 636 <description>Data Timeout Counter Value.</description> 637 <bitOffset>0</bitOffset> 638 <bitWidth>4</bitWidth> 639 <enumeratedValues> 640 <enumeratedValue> 641 <name>2POW13</name> 642 <value>0</value> 643 </enumeratedValue> 644 <enumeratedValue> 645 <name>2POW14</name> 646 <value>1</value> 647 </enumeratedValue> 648 <enumeratedValue> 649 <name>2POW15</name> 650 <value>2</value> 651 </enumeratedValue> 652 <enumeratedValue> 653 <name>2POW16</name> 654 <value>3</value> 655 </enumeratedValue> 656 <enumeratedValue> 657 <name>2POW17</name> 658 <value>4</value> 659 </enumeratedValue> 660 <enumeratedValue> 661 <name>2POW18</name> 662 <value>5</value> 663 </enumeratedValue> 664 <enumeratedValue> 665 <name>2POW19</name> 666 <value>6</value> 667 </enumeratedValue> 668 <enumeratedValue> 669 <name>2POW20</name> 670 <value>7</value> 671 </enumeratedValue> 672 <enumeratedValue> 673 <name>2POW21</name> 674 <value>8</value> 675 </enumeratedValue> 676 <enumeratedValue> 677 <name>2POW22</name> 678 <value>9</value> 679 </enumeratedValue> 680 <enumeratedValue> 681 <name>2POW23</name> 682 <value>10</value> 683 </enumeratedValue> 684 <enumeratedValue> 685 <name>2POW24</name> 686 <value>11</value> 687 </enumeratedValue> 688 <enumeratedValue> 689 <name>2POW25</name> 690 <value>12</value> 691 </enumeratedValue> 692 <enumeratedValue> 693 <name>2POW26</name> 694 <value>13</value> 695 </enumeratedValue> 696 <enumeratedValue> 697 <name>2POW27</name> 698 <value>14</value> 699 </enumeratedValue> 700 </enumeratedValues> 701 </field> 702 </fields> 703 </register> 704 <register> 705 <name>SW_RESET</name> 706 <description>Software Reset.</description> 707 <addressOffset>0x02F</addressOffset> 708 <size>8</size> 709 <fields> 710 <field> 711 <name>RESET_ALL</name> 712 <description>Software Reset For All.</description> 713 <bitOffset>0</bitOffset> 714 <bitWidth>1</bitWidth> 715 </field> 716 <field> 717 <name>RESET_CMD</name> 718 <description>Software Reset For CMD Line.</description> 719 <bitOffset>1</bitOffset> 720 <bitWidth>1</bitWidth> 721 </field> 722 <field> 723 <name>RESET_DAT</name> 724 <description>Software Reset For DAT Line.</description> 725 <bitOffset>2</bitOffset> 726 <bitWidth>1</bitWidth> 727 </field> 728 </fields> 729 </register> 730 <register> 731 <name>INT_STAT</name> 732 <description>Normal Interrupt Status.</description> 733 <addressOffset>0x030</addressOffset> 734 <size>16</size> 735 <fields> 736 <field> 737 <name>CMD_COMP</name> 738 <description>Command Complete.</description> 739 <bitOffset>0</bitOffset> 740 <bitWidth>1</bitWidth> 741 </field> 742 <field> 743 <name>TRANS_COMP</name> 744 <description>Transfer Complete.</description> 745 <bitOffset>1</bitOffset> 746 <bitWidth>1</bitWidth> 747 </field> 748 <field> 749 <name>BLK_GAP_EVENT</name> 750 <description>Block Gap Event.</description> 751 <bitOffset>2</bitOffset> 752 <bitWidth>1</bitWidth> 753 </field> 754 <field> 755 <name>DMA</name> 756 <description>DMA Interrupt.</description> 757 <bitOffset>3</bitOffset> 758 <bitWidth>1</bitWidth> 759 </field> 760 <field> 761 <name>BUFF_WR_READY</name> 762 <description>Buffer Write Ready.</description> 763 <bitOffset>4</bitOffset> 764 <bitWidth>1</bitWidth> 765 </field> 766 <field> 767 <name>BUFF_RD_READY</name> 768 <description>Buffer Read Ready.</description> 769 <bitOffset>5</bitOffset> 770 <bitWidth>1</bitWidth> 771 </field> 772 <field> 773 <name>CARD_INSERTION</name> 774 <description>Card Insertion.</description> 775 <bitOffset>6</bitOffset> 776 <bitWidth>1</bitWidth> 777 </field> 778 <field> 779 <name>CARD_REMOVAL</name> 780 <description>Card Removal.</description> 781 <bitOffset>7</bitOffset> 782 <bitWidth>1</bitWidth> 783 </field> 784 <field> 785 <name>CARD_INTR</name> 786 <description>Card Interrupt.</description> 787 <bitOffset>8</bitOffset> 788 <bitWidth>1</bitWidth> 789 </field> 790 <field> 791 <name>RETUNING</name> 792 <description>Re-Tuning Event.</description> 793 <bitOffset>12</bitOffset> 794 <bitWidth>1</bitWidth> 795 </field> 796 <field> 797 <name>ERR_INTR</name> 798 <description>Error Interrupt.</description> 799 <bitOffset>15</bitOffset> 800 <bitWidth>1</bitWidth> 801 </field> 802 </fields> 803 </register> 804 <register> 805 <name>ER_INT_STAT</name> 806 <description>Error Interrupt Status.</description> 807 <addressOffset>0x032</addressOffset> 808 <size>16</size> 809 <fields> 810 <field> 811 <name>CMD_TO</name> 812 <description>Command Timeout Error.</description> 813 <bitOffset>0</bitOffset> 814 <bitWidth>1</bitWidth> 815 </field> 816 <field> 817 <name>CMD_CRC</name> 818 <description>Command CRC Error.</description> 819 <bitOffset>1</bitOffset> 820 <bitWidth>1</bitWidth> 821 </field> 822 <field> 823 <name>CMD_END_BIT</name> 824 <description>Command End Bit Error.</description> 825 <bitOffset>2</bitOffset> 826 <bitWidth>1</bitWidth> 827 </field> 828 <field> 829 <name>CMD_IDX</name> 830 <description>Command Index Error.</description> 831 <bitOffset>3</bitOffset> 832 <bitWidth>1</bitWidth> 833 </field> 834 <field> 835 <name>DATA_TO</name> 836 <description>Data Timeout Error.</description> 837 <bitOffset>4</bitOffset> 838 <bitWidth>1</bitWidth> 839 </field> 840 <field> 841 <name>DATA_CRC</name> 842 <description>Data CRC Error.</description> 843 <bitOffset>5</bitOffset> 844 <bitWidth>1</bitWidth> 845 </field> 846 <field> 847 <name>DATA_END_BIT</name> 848 <description>Data End Bit Error.</description> 849 <bitOffset>6</bitOffset> 850 <bitWidth>1</bitWidth> 851 </field> 852 <field> 853 <name>CURRENT_LIMIT</name> 854 <description>Current Limit Error.</description> 855 <bitOffset>7</bitOffset> 856 <bitWidth>1</bitWidth> 857 </field> 858 <field> 859 <name>AUTO_CMD_12</name> 860 <description>Auto CMD Error.</description> 861 <bitOffset>8</bitOffset> 862 <bitWidth>1</bitWidth> 863 </field> 864 <field> 865 <name>ADMA</name> 866 <description>ADMA Error.</description> 867 <bitOffset>9</bitOffset> 868 <bitWidth>1</bitWidth> 869 </field> 870 <field> 871 <name>DMA</name> 872 <description>DMA Error.</description> 873 <bitOffset>12</bitOffset> 874 <bitWidth>1</bitWidth> 875 </field> 876 </fields> 877 </register> 878 <register> 879 <name>INT_EN</name> 880 <description>Normal Interrupt Status Enable.</description> 881 <addressOffset>0x034</addressOffset> 882 <size>16</size> 883 <fields> 884 <field> 885 <name>CMD_COMP</name> 886 <description>Command Complete Status Enable.</description> 887 <bitOffset>0</bitOffset> 888 <bitWidth>1</bitWidth> 889 </field> 890 <field> 891 <name>TRANS_COMP</name> 892 <description>Transfer Complete Status Enable.</description> 893 <bitOffset>1</bitOffset> 894 <bitWidth>1</bitWidth> 895 </field> 896 <field> 897 <name>BLK_GAP</name> 898 <description>Block Gap Event Status Enable.</description> 899 <bitOffset>2</bitOffset> 900 <bitWidth>1</bitWidth> 901 </field> 902 <field> 903 <name>DMA</name> 904 <description>DMA Interrupt Status Enable.</description> 905 <bitOffset>3</bitOffset> 906 <bitWidth>1</bitWidth> 907 </field> 908 <field> 909 <name>BUFFER_WR</name> 910 <description>Buffer Write Ready Status Enable.</description> 911 <bitOffset>4</bitOffset> 912 <bitWidth>1</bitWidth> 913 </field> 914 <field> 915 <name>BUFFER_RD</name> 916 <description>Buffer Read Ready Status Enable.</description> 917 <bitOffset>5</bitOffset> 918 <bitWidth>1</bitWidth> 919 </field> 920 <field> 921 <name>CARD_INSERT</name> 922 <description>Card Insertion Status Enable.</description> 923 <bitOffset>6</bitOffset> 924 <bitWidth>1</bitWidth> 925 </field> 926 <field> 927 <name>CARD_REMOVAL</name> 928 <description>Card Removal Status Enable.</description> 929 <bitOffset>7</bitOffset> 930 <bitWidth>1</bitWidth> 931 </field> 932 <field> 933 <name>CARD_INT</name> 934 <description>Card Interrupt Status Enable.</description> 935 <bitOffset>8</bitOffset> 936 <bitWidth>1</bitWidth> 937 </field> 938 <field> 939 <name>RETUNING</name> 940 <description>Re-Tuning Event Status Enable.</description> 941 <bitOffset>12</bitOffset> 942 <bitWidth>1</bitWidth> 943 </field> 944 </fields> 945 </register> 946 <register> 947 <name>ER_INT_EN</name> 948 <description>Error Interrupt Status Enable.</description> 949 <addressOffset>0x36</addressOffset> 950 <size>16</size> 951 <fields> 952 <field> 953 <name>CMD_TO</name> 954 <description>Command Timeout Error Status Enable.</description> 955 <bitOffset>0</bitOffset> 956 <bitWidth>1</bitWidth> 957 </field> 958 <field> 959 <name>CMD_CRC</name> 960 <description>Command CRC Error Status Enable.</description> 961 <bitOffset>1</bitOffset> 962 <bitWidth>1</bitWidth> 963 </field> 964 <field> 965 <name>CMD_END_BIT</name> 966 <description>Command End Bit Error Status Enable.</description> 967 <bitOffset>2</bitOffset> 968 <bitWidth>1</bitWidth> 969 </field> 970 <field> 971 <name>CMD_IDX</name> 972 <description>Command Index Error Status Enable.</description> 973 <bitOffset>3</bitOffset> 974 <bitWidth>1</bitWidth> 975 </field> 976 <field> 977 <name>DATA_TO</name> 978 <description>Data Timeout Error Status Enable.</description> 979 <bitOffset>4</bitOffset> 980 <bitWidth>1</bitWidth> 981 </field> 982 <field> 983 <name>DATA_CRC</name> 984 <description>Data CRC Error Status Enable.</description> 985 <bitOffset>5</bitOffset> 986 <bitWidth>1</bitWidth> 987 </field> 988 <field> 989 <name>DATA_END_BIT</name> 990 <description>Data End Bit Error Status Enable.</description> 991 <bitOffset>6</bitOffset> 992 <bitWidth>1</bitWidth> 993 </field> 994 <field> 995 <name>AUTO_CMD_12</name> 996 <description>Auto CMD Error Status Enable.</description> 997 <bitOffset>8</bitOffset> 998 <bitWidth>1</bitWidth> 999 </field> 1000 <field> 1001 <name>ADMA</name> 1002 <description>ADMA Error Status Enable.</description> 1003 <bitOffset>9</bitOffset> 1004 <bitWidth>1</bitWidth> 1005 </field> 1006 <field> 1007 <name>TUNING</name> 1008 <description>Tuning Error Status Enable.</description> 1009 <bitOffset>10</bitOffset> 1010 <bitWidth>1</bitWidth> 1011 </field> 1012 <field> 1013 <name>VENDOR</name> 1014 <description>Vendor Specific Error Status Enable.</description> 1015 <bitOffset>12</bitOffset> 1016 <bitWidth>1</bitWidth> 1017 </field> 1018 </fields> 1019 </register> 1020 <register> 1021 <name>INT_SIGNAL</name> 1022 <description>Normal Interrupt Signal Enable.</description> 1023 <addressOffset>0x038</addressOffset> 1024 <size>16</size> 1025 <fields> 1026 <field> 1027 <name>CMD_COMP</name> 1028 <description>Command Complete Signal Enable.</description> 1029 <bitOffset>0</bitOffset> 1030 <bitWidth>1</bitWidth> 1031 </field> 1032 <field> 1033 <name>TRANS_COMP</name> 1034 <description>Transfer Complete Signal Enable.</description> 1035 <bitOffset>1</bitOffset> 1036 <bitWidth>1</bitWidth> 1037 </field> 1038 <field> 1039 <name>BLK_GAP</name> 1040 <description>Block Gap Event Signal Enable.</description> 1041 <bitOffset>2</bitOffset> 1042 <bitWidth>1</bitWidth> 1043 </field> 1044 <field> 1045 <name>DMA</name> 1046 <description>DMA Interrupt Signal Enable.</description> 1047 <bitOffset>3</bitOffset> 1048 <bitWidth>1</bitWidth> 1049 </field> 1050 <field> 1051 <name>BUFFER_WR</name> 1052 <description>Buffer Write Ready Signal Enable.</description> 1053 <bitOffset>4</bitOffset> 1054 <bitWidth>1</bitWidth> 1055 </field> 1056 <field> 1057 <name>BUFFER_RD</name> 1058 <description>Buffer Read Ready Signal Enable.</description> 1059 <bitOffset>5</bitOffset> 1060 <bitWidth>1</bitWidth> 1061 </field> 1062 <field> 1063 <name>CARD_INSERT</name> 1064 <description>Card Insertion Signal Enable.</description> 1065 <bitOffset>6</bitOffset> 1066 <bitWidth>1</bitWidth> 1067 </field> 1068 <field> 1069 <name>CARD_REMOVAL</name> 1070 <description>Card Removal Signal Enable.</description> 1071 <bitOffset>7</bitOffset> 1072 <bitWidth>1</bitWidth> 1073 </field> 1074 <field> 1075 <name>CARD_INT</name> 1076 <description>Card Interrupt Signal Enable.</description> 1077 <bitOffset>8</bitOffset> 1078 <bitWidth>1</bitWidth> 1079 </field> 1080 <field> 1081 <name>RETUNING</name> 1082 <description>Re-Tuning Event Signal Enable.</description> 1083 <bitOffset>12</bitOffset> 1084 <bitWidth>1</bitWidth> 1085 </field> 1086 </fields> 1087 </register> 1088 <register> 1089 <name>ER_INT_SIGNAL</name> 1090 <description>Error Interrupt Signal Enable.</description> 1091 <addressOffset>0x03A</addressOffset> 1092 <size>16</size> 1093 <fields> 1094 <field> 1095 <name>CMD_TO</name> 1096 <description>Command Timeout Error Signal Enable.</description> 1097 <bitOffset>0</bitOffset> 1098 <bitWidth>1</bitWidth> 1099 </field> 1100 <field> 1101 <name>CMD_CRC</name> 1102 <description>Command CRC Error Signal Enable.</description> 1103 <bitOffset>1</bitOffset> 1104 <bitWidth>1</bitWidth> 1105 </field> 1106 <field> 1107 <name>CMD_END_BIT</name> 1108 <description>Command End Bit Error Signal Enable.</description> 1109 <bitOffset>2</bitOffset> 1110 <bitWidth>1</bitWidth> 1111 </field> 1112 <field> 1113 <name>CMD_IDX</name> 1114 <description>Command Index Error Signal Enable.</description> 1115 <bitOffset>3</bitOffset> 1116 <bitWidth>1</bitWidth> 1117 </field> 1118 <field> 1119 <name>DATA_TO</name> 1120 <description>Data Timeout Error Signal Enable.</description> 1121 <bitOffset>4</bitOffset> 1122 <bitWidth>1</bitWidth> 1123 </field> 1124 <field> 1125 <name>DATA_CRC</name> 1126 <description>Data CRC Error Signal Enable.</description> 1127 <bitOffset>5</bitOffset> 1128 <bitWidth>1</bitWidth> 1129 </field> 1130 <field> 1131 <name>DATA_END_BIT</name> 1132 <description>Data End Bit Error Signal Enable.</description> 1133 <bitOffset>6</bitOffset> 1134 <bitWidth>1</bitWidth> 1135 </field> 1136 <field> 1137 <name>CURRENT_LIMIT</name> 1138 <description>Current Limit Error Signal Enable.</description> 1139 <bitOffset>7</bitOffset> 1140 <bitWidth>1</bitWidth> 1141 </field> 1142 <field> 1143 <name>AUTO_CMD_12</name> 1144 <description>Auto CMD Error Signal Enable.</description> 1145 <bitOffset>8</bitOffset> 1146 <bitWidth>1</bitWidth> 1147 </field> 1148 <field> 1149 <name>ADMA</name> 1150 <description>ADMA Error Signal Enable.</description> 1151 <bitOffset>9</bitOffset> 1152 <bitWidth>1</bitWidth> 1153 </field> 1154 <field> 1155 <name>TUNING</name> 1156 <description>Tuning Error Signal Enable.</description> 1157 <bitOffset>10</bitOffset> 1158 <bitWidth>1</bitWidth> 1159 </field> 1160 <field> 1161 <name>TAR_RESP</name> 1162 <description>Target Response Error Signal Enable.</description> 1163 <bitOffset>12</bitOffset> 1164 <bitWidth>1</bitWidth> 1165 </field> 1166 </fields> 1167 </register> 1168 <register> 1169 <name>AUTO_CMD_ER</name> 1170 <description>Auto CMD Error Status.</description> 1171 <addressOffset>0x03C</addressOffset> 1172 <size>16</size> 1173 <fields> 1174 <field> 1175 <name>NOT_EXCUTED</name> 1176 <description>Auto CMD12 Not Executed.</description> 1177 <bitOffset>0</bitOffset> 1178 <bitWidth>1</bitWidth> 1179 </field> 1180 <field> 1181 <name>TO</name> 1182 <description>Auto CMD Timeout Error.</description> 1183 <bitOffset>1</bitOffset> 1184 <bitWidth>1</bitWidth> 1185 </field> 1186 <field> 1187 <name>CRC</name> 1188 <description>Auto CMD CRC Error.</description> 1189 <bitOffset>2</bitOffset> 1190 <bitWidth>1</bitWidth> 1191 </field> 1192 <field> 1193 <name>END_BIT</name> 1194 <description>Auto CMD End Bit Error.</description> 1195 <bitOffset>3</bitOffset> 1196 <bitWidth>1</bitWidth> 1197 </field> 1198 <field> 1199 <name>INDEX</name> 1200 <description>Auto CMD Index Error.</description> 1201 <bitOffset>4</bitOffset> 1202 <bitWidth>1</bitWidth> 1203 </field> 1204 <field> 1205 <name>NOT_ISSUED</name> 1206 <description>Command Not Issued By Auto CMD12 Error.</description> 1207 <bitOffset>7</bitOffset> 1208 <bitWidth>1</bitWidth> 1209 </field> 1210 </fields> 1211 </register> 1212 <register> 1213 <name>HOST_CN_2</name> 1214 <description>Host Control 2.</description> 1215 <addressOffset>0x03E</addressOffset> 1216 <size>16</size> 1217 <fields> 1218 <field> 1219 <name>UHS</name> 1220 <description>UHS Mode Select.</description> 1221 <bitOffset>0</bitOffset> 1222 <bitWidth>3</bitWidth> 1223 <enumeratedValues> 1224 <enumeratedValue> 1225 <name>sdr12</name> 1226 <value>0</value> 1227 </enumeratedValue> 1228 <enumeratedValue> 1229 <name>sdr25</name> 1230 <value>1</value> 1231 </enumeratedValue> 1232 <enumeratedValue> 1233 <name>sdr50</name> 1234 <value>2</value> 1235 </enumeratedValue> 1236 <enumeratedValue> 1237 <name>ddr50</name> 1238 <value>4</value> 1239 </enumeratedValue> 1240 </enumeratedValues> 1241 </field> 1242 <field> 1243 <name>1_8V_SIGNAL</name> 1244 <description>1.8V Signaling Enable.</description> 1245 <bitOffset>3</bitOffset> 1246 <bitWidth>1</bitWidth> 1247 </field> 1248 <field> 1249 <name>DRIVER_STRENGTH</name> 1250 <description>Driver Strength Select.</description> 1251 <bitOffset>4</bitOffset> 1252 <bitWidth>2</bitWidth> 1253 <enumeratedValues> 1254 <enumeratedValue> 1255 <name>typeB</name> 1256 <value>0</value> 1257 </enumeratedValue> 1258 <enumeratedValue> 1259 <name>typeA</name> 1260 <value>1</value> 1261 </enumeratedValue> 1262 <enumeratedValue> 1263 <name>typeC</name> 1264 <value>2</value> 1265 </enumeratedValue> 1266 <enumeratedValue> 1267 <name>typrD</name> 1268 <value>3</value> 1269 </enumeratedValue> 1270 </enumeratedValues> 1271 </field> 1272 <field> 1273 <name>EXCUTE</name> 1274 <description>Execute Tuning.</description> 1275 <bitOffset>6</bitOffset> 1276 <bitWidth>1</bitWidth> 1277 </field> 1278 <field> 1279 <name>SAMPLING_CLK</name> 1280 <description>Sampling Clock Select.</description> 1281 <bitOffset>7</bitOffset> 1282 <bitWidth>1</bitWidth> 1283 </field> 1284 <field> 1285 <name>ASYNCH_INT</name> 1286 <description>Asynchronous Interrupt Enable.</description> 1287 <bitOffset>14</bitOffset> 1288 <bitWidth>1</bitWidth> 1289 </field> 1290 <field> 1291 <name>PRESET_VAL_EN</name> 1292 <description>Preset Value Enable.</description> 1293 <bitOffset>15</bitOffset> 1294 <bitWidth>1</bitWidth> 1295 </field> 1296 </fields> 1297 </register> 1298 <register> 1299 <name>CFG_0</name> 1300 <description>Capabilities 0-31.</description> 1301 <addressOffset>0x040</addressOffset> 1302 <size>32</size> 1303 <access>read-only</access> 1304 <fields> 1305 <field> 1306 <name>TO_FREQ</name> 1307 <description>Timeout Clock Frequency.</description> 1308 <bitOffset>0</bitOffset> 1309 <bitWidth>6</bitWidth> 1310 <access>read-only</access> 1311 <enumeratedValues> 1312 <enumeratedValue> 1313 <name>1mhz</name> 1314 <value>1</value> 1315 </enumeratedValue> 1316 </enumeratedValues> 1317 </field> 1318 <field> 1319 <name>CLK_UNIT</name> 1320 <description>Timeout Clock Unit.</description> 1321 <bitOffset>7</bitOffset> 1322 <bitWidth>1</bitWidth> 1323 <access>read-only</access> 1324 </field> 1325 <field> 1326 <name>CLK_FREQ</name> 1327 <description>Base Clock Frequency For SD Clock.</description> 1328 <bitOffset>8</bitOffset> 1329 <bitWidth>8</bitWidth> 1330 <access>read-only</access> 1331 </field> 1332 <field> 1333 <name>MAX_BLK_LEN</name> 1334 <description>Max Block Length.</description> 1335 <bitOffset>16</bitOffset> 1336 <bitWidth>2</bitWidth> 1337 <access>read-only</access> 1338 <enumeratedValues> 1339 <enumeratedValue> 1340 <name>2048_bytes</name> 1341 <value>2</value> 1342 </enumeratedValue> 1343 </enumeratedValues> 1344 </field> 1345 <field> 1346 <name>8_BIT</name> 1347 <description>8-bit Support for Embedded Device.</description> 1348 <bitOffset>18</bitOffset> 1349 <bitWidth>1</bitWidth> 1350 <access>read-only</access> 1351 </field> 1352 <field> 1353 <name>ADMA2</name> 1354 <description>ADMA2 Support.</description> 1355 <bitOffset>19</bitOffset> 1356 <bitWidth>1</bitWidth> 1357 <access>read-only</access> 1358 </field> 1359 <field> 1360 <name>HS</name> 1361 <description>High Speed Support.</description> 1362 <bitOffset>21</bitOffset> 1363 <bitWidth>1</bitWidth> 1364 <access>read-only</access> 1365 </field> 1366 <field> 1367 <name>SDMA</name> 1368 <description>SDMA Support.</description> 1369 <bitOffset>22</bitOffset> 1370 <bitWidth>1</bitWidth> 1371 <access>read-only</access> 1372 </field> 1373 <field> 1374 <name>SUSPEND</name> 1375 <description>Suspend/Resume Support.</description> 1376 <bitOffset>23</bitOffset> 1377 <bitWidth>1</bitWidth> 1378 <access>read-only</access> 1379 </field> 1380 <field> 1381 <name>3_3V</name> 1382 <description>Voltage Support 3.3V.</description> 1383 <bitOffset>24</bitOffset> 1384 <bitWidth>1</bitWidth> 1385 <access>read-only</access> 1386 </field> 1387 <field> 1388 <name>3_0V</name> 1389 <description>Voltage Support 3.0V.</description> 1390 <bitOffset>25</bitOffset> 1391 <bitWidth>1</bitWidth> 1392 <access>read-only</access> 1393 </field> 1394 <field> 1395 <name>1_8V</name> 1396 <description>Voltage Support 1.8V.</description> 1397 <bitOffset>26</bitOffset> 1398 <bitWidth>1</bitWidth> 1399 <access>read-only</access> 1400 </field> 1401 <field> 1402 <name>64_BIT_SYS_BUS</name> 1403 <description>64-bit System Bus Support.</description> 1404 <bitOffset>28</bitOffset> 1405 <bitWidth>1</bitWidth> 1406 <access>read-only</access> 1407 </field> 1408 <field> 1409 <name>ASYNC_INT</name> 1410 <description>Asynchronous Interrupt Support.</description> 1411 <bitOffset>29</bitOffset> 1412 <bitWidth>1</bitWidth> 1413 <access>read-only</access> 1414 </field> 1415 <field> 1416 <name>SLOT_TYPE</name> 1417 <description>Slot Type.</description> 1418 <bitOffset>30</bitOffset> 1419 <bitWidth>2</bitWidth> 1420 <access>read-only</access> 1421 </field> 1422 </fields> 1423 </register> 1424 <register> 1425 <name>CFG_1</name> 1426 <description>Capabilities 32-63.</description> 1427 <addressOffset>0x044</addressOffset> 1428 <size>32</size> 1429 <access>read-only</access> 1430 <fields> 1431 <field> 1432 <name>SDR50</name> 1433 <description>SDR50 Support.</description> 1434 <bitOffset>0</bitOffset> 1435 <bitWidth>1</bitWidth> 1436 <access>read-only</access> 1437 </field> 1438 <field> 1439 <name>SDR104</name> 1440 <description>SDR104 Support.</description> 1441 <bitOffset>1</bitOffset> 1442 <bitWidth>0</bitWidth> 1443 <access>read-only</access> 1444 </field> 1445 <field> 1446 <name>DDR50</name> 1447 <description>DDR50 Support.</description> 1448 <bitOffset>2</bitOffset> 1449 <bitWidth>1</bitWidth> 1450 <access>read-only</access> 1451 </field> 1452 <field> 1453 <name>DRIVER_A</name> 1454 <description>Driver Type A Support.</description> 1455 <bitOffset>4</bitOffset> 1456 <bitWidth>1</bitWidth> 1457 <access>read-only</access> 1458 </field> 1459 <field> 1460 <name>DRIVER_C</name> 1461 <description>Driver Type C Support.</description> 1462 <bitOffset>5</bitOffset> 1463 <bitWidth>1</bitWidth> 1464 <access>read-only</access> 1465 </field> 1466 <field> 1467 <name>DRIVER_D</name> 1468 <description>Driver Type D Support.</description> 1469 <bitOffset>6</bitOffset> 1470 <bitWidth>1</bitWidth> 1471 <access>read-only</access> 1472 </field> 1473 <field> 1474 <name>TIMER_CNT_TUNING</name> 1475 <description>Timer Count for Re-Tuning.</description> 1476 <bitOffset>8</bitOffset> 1477 <bitWidth>4</bitWidth> 1478 <access>read-only</access> 1479 <enumeratedValues> 1480 <enumeratedValue> 1481 <name>dis</name> 1482 <value>0</value> 1483 </enumeratedValue> 1484 <enumeratedValue> 1485 <name>1sec</name> 1486 <value>1</value> 1487 </enumeratedValue> 1488 <enumeratedValue> 1489 <name>2sec</name> 1490 <value>2</value> 1491 </enumeratedValue> 1492 <enumeratedValue> 1493 <name>4sec</name> 1494 <value>3</value> 1495 </enumeratedValue> 1496 <enumeratedValue> 1497 <name>8sec</name> 1498 <value>4</value> 1499 </enumeratedValue> 1500 <enumeratedValue> 1501 <name>16sec</name> 1502 <value>5</value> 1503 </enumeratedValue> 1504 <enumeratedValue> 1505 <name>32sec</name> 1506 <value>6</value> 1507 </enumeratedValue> 1508 <enumeratedValue> 1509 <name>64sec</name> 1510 <value>7</value> 1511 </enumeratedValue> 1512 <enumeratedValue> 1513 <name>128sec</name> 1514 <value>8</value> 1515 </enumeratedValue> 1516 <enumeratedValue> 1517 <name>256sec</name> 1518 <value>9</value> 1519 </enumeratedValue> 1520 <enumeratedValue> 1521 <name>512sec</name> 1522 <value>10</value> 1523 </enumeratedValue> 1524 <enumeratedValue> 1525 <name>1024sec</name> 1526 <value>11</value> 1527 </enumeratedValue> 1528 </enumeratedValues> 1529 </field> 1530 <field> 1531 <name>TUNING_SDR50</name> 1532 <description>Use Tuning for SDR50.</description> 1533 <bitOffset>13</bitOffset> 1534 <bitWidth>1</bitWidth> 1535 <access>read-only</access> 1536 </field> 1537 <field> 1538 <name>RETUNING</name> 1539 <description>Re-Tuning Modes.</description> 1540 <bitOffset>14</bitOffset> 1541 <bitWidth>2</bitWidth> 1542 <access>read-only</access> 1543 </field> 1544 <field> 1545 <name>CLK_MULTI</name> 1546 <description>Clock Multiplier.</description> 1547 <bitOffset>16</bitOffset> 1548 <bitWidth>8</bitWidth> 1549 <access>read-only</access> 1550 </field> 1551 </fields> 1552 </register> 1553 <register> 1554 <name>MAX_CURR_CFG</name> 1555 <description>Maximum Current Capabilities.</description> 1556 <addressOffset>0x048</addressOffset> 1557 <size>32</size> 1558 <access>read-only</access> 1559 <fields> 1560 <field> 1561 <name>3_3V</name> 1562 <description>Maximum Current for 3.3V.</description> 1563 <bitOffset>0</bitOffset> 1564 <bitWidth>8</bitWidth> 1565 <access>read-only</access> 1566 </field> 1567 <field> 1568 <name>3_0V</name> 1569 <description>Maximum Current for 3.0V.</description> 1570 <bitOffset>8</bitOffset> 1571 <bitWidth>8</bitWidth> 1572 <access>read-only</access> 1573 </field> 1574 <field> 1575 <name>1_8V</name> 1576 <description>Maximum Current for 1.8V.</description> 1577 <bitOffset>16</bitOffset> 1578 <bitWidth>8</bitWidth> 1579 <access>read-only</access> 1580 </field> 1581 </fields> 1582 </register> 1583 <register> 1584 <name>FORCE_CMD</name> 1585 <description>Force Event for Auto CMD Error Status.</description> 1586 <addressOffset>0x050</addressOffset> 1587 <size>16</size> 1588 <access>write-only</access> 1589 <fields> 1590 <field> 1591 <name>NOT_EXCU</name> 1592 <description>Force Event for Auto CMD12 Not Executed.</description> 1593 <bitOffset>0</bitOffset> 1594 <bitWidth>1</bitWidth> 1595 <access>write-only</access> 1596 </field> 1597 <field> 1598 <name>TO</name> 1599 <description>Force Event for Auto CMD Timeout Error.</description> 1600 <bitOffset>1</bitOffset> 1601 <bitWidth>1</bitWidth> 1602 <access>write-only</access> 1603 </field> 1604 <field> 1605 <name>CRC</name> 1606 <description>Force Event for Auto CMD CRC Error.</description> 1607 <bitOffset>2</bitOffset> 1608 <bitWidth>1</bitWidth> 1609 <access>write-only</access> 1610 </field> 1611 <field> 1612 <name>END_BIT</name> 1613 <description>Force Event for Auto CMD End Bit Error.</description> 1614 <bitOffset>3</bitOffset> 1615 <bitWidth>1</bitWidth> 1616 <access>write-only</access> 1617 </field> 1618 <field> 1619 <name>INDEX</name> 1620 <description>Force Event for Auto CMD Index Error.</description> 1621 <bitOffset>4</bitOffset> 1622 <bitWidth>1</bitWidth> 1623 <access>write-only</access> 1624 </field> 1625 <field> 1626 <name>NOT_ISSUED</name> 1627 <description>Force Event for Command Not Issued By Auto CMD12 Error.</description> 1628 <bitOffset>7</bitOffset> 1629 <bitWidth>1</bitWidth> 1630 <access>write-only</access> 1631 </field> 1632 </fields> 1633 </register> 1634 <register> 1635 <name>FORCE_EVENT_INT_STAT</name> 1636 <description>Force Event for Error Interrupt Status.</description> 1637 <addressOffset>0x052</addressOffset> 1638 <size>16</size> 1639 <fields> 1640 <field> 1641 <name>CMD_TO</name> 1642 <description>Force Event for Command Timeout Error.</description> 1643 <bitOffset>0</bitOffset> 1644 <bitWidth>1</bitWidth> 1645 <access>read-only</access> 1646 </field> 1647 <field> 1648 <name>CMD_CRC</name> 1649 <description>Force Event for Command CRC Error.</description> 1650 <bitOffset>1</bitOffset> 1651 <bitWidth>1</bitWidth> 1652 <access>read-only</access> 1653 </field> 1654 <field> 1655 <name>CMD_END_BIT</name> 1656 <description>Force Event for Command End Bit Error.</description> 1657 <bitOffset>2</bitOffset> 1658 <bitWidth>1</bitWidth> 1659 <access>read-only</access> 1660 </field> 1661 <field> 1662 <name>CMD_INDEX</name> 1663 <description>Force Event for Command Index Error.</description> 1664 <bitOffset>3</bitOffset> 1665 <bitWidth>1</bitWidth> 1666 <access>read-only</access> 1667 </field> 1668 <field> 1669 <name>DATA_TO</name> 1670 <description>Force Event for Data Timeout Error.</description> 1671 <bitOffset>4</bitOffset> 1672 <bitWidth>1</bitWidth> 1673 <access>read-only</access> 1674 </field> 1675 <field> 1676 <name>DATA_CRC</name> 1677 <description>Force Event for Data CRC Error.</description> 1678 <bitOffset>5</bitOffset> 1679 <bitWidth>1</bitWidth> 1680 <access>read-only</access> 1681 </field> 1682 <field> 1683 <name>DATA_END_BIT</name> 1684 <description>Force Event for Data End Bit Error.</description> 1685 <bitOffset>6</bitOffset> 1686 <bitWidth>1</bitWidth> 1687 <access>read-only</access> 1688 </field> 1689 <field> 1690 <name>CURR_LIMIT</name> 1691 <description>Force Event for Current Limit Error.</description> 1692 <bitOffset>7</bitOffset> 1693 <bitWidth>1</bitWidth> 1694 <access>read-only</access> 1695 </field> 1696 <field> 1697 <name>AUTO_CMD</name> 1698 <description>Force Event for Auto CMD Error.</description> 1699 <bitOffset>8</bitOffset> 1700 <bitWidth>1</bitWidth> 1701 <access>read-only</access> 1702 </field> 1703 <field> 1704 <name>ADMA</name> 1705 <description>Force Event for ADMA Error.</description> 1706 <bitOffset>9</bitOffset> 1707 <bitWidth>1</bitWidth> 1708 </field> 1709 <field> 1710 <name>STAT_VENDOR</name> 1711 <description>Force Event for Vendor Specific Error Status.</description> 1712 <bitOffset>12</bitOffset> 1713 <bitWidth>4</bitWidth> 1714 <access>write-only</access> 1715 </field> 1716 </fields> 1717 </register> 1718 <register> 1719 <name>ADMA_ER</name> 1720 <description>ADMA Error Status.</description> 1721 <addressOffset>0x054</addressOffset> 1722 <size>8</size> 1723 <fields> 1724 <field> 1725 <name>STATE</name> 1726 <description>ADMA Error State.</description> 1727 <bitOffset>0</bitOffset> 1728 <bitWidth>2</bitWidth> 1729 </field> 1730 <field> 1731 <name>LEN_MISMATCH</name> 1732 <description>ADMA Length Mismatch Error.</description> 1733 <bitOffset>2</bitOffset> 1734 <bitWidth>1</bitWidth> 1735 </field> 1736 </fields> 1737 </register> 1738 <register> 1739 <name>ADMA_ADDR_0</name> 1740 <description>ADMA System Address 0-31.</description> 1741 <addressOffset>0x058</addressOffset> 1742 <size>32</size> 1743 <fields> 1744 <field> 1745 <name>ADDR</name> 1746 <description>ADMA System Address Part 1 (part 2 is ADMA_ADDR_1).</description> 1747 <bitOffset>0</bitOffset> 1748 <bitWidth>32</bitWidth> 1749 </field> 1750 </fields> 1751 </register> 1752 <register> 1753 <name>ADMA_ADDR_1</name> 1754 <description>ADMA System Address 32-63.</description> 1755 <addressOffset>0x05C</addressOffset> 1756 <size>32</size> 1757 <fields> 1758 <field> 1759 <name>ADDR</name> 1760 <description>ADMA System Address Part 1 (part 2 is ADMA_ADDR_1).</description> 1761 <bitOffset>0</bitOffset> 1762 <bitWidth>32</bitWidth> 1763 </field> 1764 </fields> 1765 </register> 1766 <register> 1767 <name>PRESET_0</name> 1768 <description>Preset Value for Initialization.</description> 1769 <addressOffset>0x060</addressOffset> 1770 <size>16</size> 1771 <access>read-only</access> 1772 <fields> 1773 <field> 1774 <name>SDCLK_FREQ</name> 1775 <description>SDCLK Frequency Select Value.</description> 1776 <bitOffset>0</bitOffset> 1777 <bitWidth>10</bitWidth> 1778 <access>read-only</access> 1779 </field> 1780 <field> 1781 <name>CLK_GEN</name> 1782 <description>Clock Generator Select Value.</description> 1783 <bitOffset>10</bitOffset> 1784 <bitWidth>1</bitWidth> 1785 <access>read-only</access> 1786 </field> 1787 <field> 1788 <name>DRIVER_STRENGTH</name> 1789 <description>Driver Strength Select Value.</description> 1790 <bitOffset>14</bitOffset> 1791 <bitWidth>2</bitWidth> 1792 <access>read-only</access> 1793 <enumeratedValues> 1794 <enumeratedValue> 1795 <name>typeB</name> 1796 <value>0</value> 1797 </enumeratedValue> 1798 <enumeratedValue> 1799 <name>typeA</name> 1800 <value>1</value> 1801 </enumeratedValue> 1802 <enumeratedValue> 1803 <name>typeC</name> 1804 <value>2</value> 1805 </enumeratedValue> 1806 <enumeratedValue> 1807 <name>typeD</name> 1808 <value>3</value> 1809 </enumeratedValue> 1810 </enumeratedValues> 1811 </field> 1812 </fields> 1813 </register> 1814 <register> 1815 <name>PRESET_1</name> 1816 <description>Preset Value for Default Speed.</description> 1817 <addressOffset>0x062</addressOffset> 1818 <size>16</size> 1819 <access>read-only</access> 1820 <fields> 1821 <field> 1822 <name>SDCLK_FREQ</name> 1823 <description>SDCLK Frequency Select Value.</description> 1824 <bitOffset>0</bitOffset> 1825 <bitWidth>10</bitWidth> 1826 <access>read-only</access> 1827 </field> 1828 <field> 1829 <name>CLK_GEN</name> 1830 <description>Clock Generator Select Value.</description> 1831 <bitOffset>10</bitOffset> 1832 <bitWidth>1</bitWidth> 1833 <access>read-only</access> 1834 </field> 1835 <field> 1836 <name>DRIVER_STRENGTH</name> 1837 <description>Driver Strength Select Value.</description> 1838 <bitOffset>14</bitOffset> 1839 <bitWidth>2</bitWidth> 1840 <access>read-only</access> 1841 <enumeratedValues> 1842 <enumeratedValue> 1843 <name>typeB</name> 1844 <value>0</value> 1845 </enumeratedValue> 1846 <enumeratedValue> 1847 <name>typeA</name> 1848 <value>1</value> 1849 </enumeratedValue> 1850 <enumeratedValue> 1851 <name>typeC</name> 1852 <value>2</value> 1853 </enumeratedValue> 1854 <enumeratedValue> 1855 <name>typeD</name> 1856 <value>3</value> 1857 </enumeratedValue> 1858 </enumeratedValues> 1859 </field> 1860 </fields> 1861 </register> 1862 <register> 1863 <name>PRESET_2</name> 1864 <description>Preset Value for High Speed.</description> 1865 <addressOffset>0x064</addressOffset> 1866 <size>16</size> 1867 <access>read-only</access> 1868 <fields> 1869 <field> 1870 <name>SDCLK_FREQ</name> 1871 <description>SDCLK Frequency Select Value.</description> 1872 <bitOffset>0</bitOffset> 1873 <bitWidth>10</bitWidth> 1874 <access>read-only</access> 1875 </field> 1876 <field> 1877 <name>CLK_GEN</name> 1878 <description>Clock Generator Select Value.</description> 1879 <bitOffset>10</bitOffset> 1880 <bitWidth>1</bitWidth> 1881 <access>read-only</access> 1882 </field> 1883 <field> 1884 <name>DRIVER_STRENGTH</name> 1885 <description>Driver Strength Select Value.</description> 1886 <bitOffset>14</bitOffset> 1887 <bitWidth>2</bitWidth> 1888 <access>read-only</access> 1889 <enumeratedValues> 1890 <enumeratedValue> 1891 <name>typeB</name> 1892 <value>0</value> 1893 </enumeratedValue> 1894 <enumeratedValue> 1895 <name>typeA</name> 1896 <value>1</value> 1897 </enumeratedValue> 1898 <enumeratedValue> 1899 <name>typeC</name> 1900 <value>2</value> 1901 </enumeratedValue> 1902 <enumeratedValue> 1903 <name>typeD</name> 1904 <value>3</value> 1905 </enumeratedValue> 1906 </enumeratedValues> 1907 </field> 1908 </fields> 1909 </register> 1910 <register> 1911 <name>PRESET_3</name> 1912 <description>Preset Value for SDR12.</description> 1913 <addressOffset>0x066</addressOffset> 1914 <size>16</size> 1915 <access>read-only</access> 1916 <fields> 1917 <field> 1918 <name>SDCLK_FREQ</name> 1919 <description>SDCLK Frequency Select Value.</description> 1920 <bitOffset>0</bitOffset> 1921 <bitWidth>10</bitWidth> 1922 <access>read-only</access> 1923 </field> 1924 <field> 1925 <name>CLK_GEN</name> 1926 <description>Clock Generator Select Value.</description> 1927 <bitOffset>10</bitOffset> 1928 <bitWidth>1</bitWidth> 1929 <access>read-only</access> 1930 </field> 1931 <field> 1932 <name>DRIVER_STRENGTH</name> 1933 <description>Driver Strength Select Value.</description> 1934 <bitOffset>14</bitOffset> 1935 <bitWidth>2</bitWidth> 1936 <access>read-only</access> 1937 <enumeratedValues> 1938 <enumeratedValue> 1939 <name>typeB</name> 1940 <value>0</value> 1941 </enumeratedValue> 1942 <enumeratedValue> 1943 <name>typeA</name> 1944 <value>1</value> 1945 </enumeratedValue> 1946 <enumeratedValue> 1947 <name>typeC</name> 1948 <value>2</value> 1949 </enumeratedValue> 1950 <enumeratedValue> 1951 <name>typeD</name> 1952 <value>3</value> 1953 </enumeratedValue> 1954 </enumeratedValues> 1955 </field> 1956 </fields> 1957 </register> 1958 <register> 1959 <name>PRESET_4</name> 1960 <description>Preset Value for SDR25.</description> 1961 <addressOffset>0x068</addressOffset> 1962 <size>16</size> 1963 <access>read-only</access> 1964 <fields> 1965 <field> 1966 <name>SDCLK_FREQ</name> 1967 <description>SDCLK Frequency Select Value.</description> 1968 <bitOffset>0</bitOffset> 1969 <bitWidth>10</bitWidth> 1970 <access>read-only</access> 1971 </field> 1972 <field> 1973 <name>CLK_GEN</name> 1974 <description>Clock Generator Select Value.</description> 1975 <bitOffset>10</bitOffset> 1976 <bitWidth>1</bitWidth> 1977 <access>read-only</access> 1978 </field> 1979 <field> 1980 <name>DRIVER_STRENGTH</name> 1981 <description>Driver Strength Select Value.</description> 1982 <bitOffset>14</bitOffset> 1983 <bitWidth>2</bitWidth> 1984 <access>read-only</access> 1985 <enumeratedValues> 1986 <enumeratedValue> 1987 <name>typeB</name> 1988 <value>0</value> 1989 </enumeratedValue> 1990 <enumeratedValue> 1991 <name>typeA</name> 1992 <value>1</value> 1993 </enumeratedValue> 1994 <enumeratedValue> 1995 <name>typeC</name> 1996 <value>2</value> 1997 </enumeratedValue> 1998 <enumeratedValue> 1999 <name>typeD</name> 2000 <value>3</value> 2001 </enumeratedValue> 2002 </enumeratedValues> 2003 </field> 2004 </fields> 2005 </register> 2006 <register> 2007 <name>PRESET_5</name> 2008 <description>Preset Value for SDR50.</description> 2009 <addressOffset>0x06A</addressOffset> 2010 <size>16</size> 2011 <access>read-only</access> 2012 <fields> 2013 <field> 2014 <name>SDCLK_FREQ</name> 2015 <description>SDCLK Frequency Select Value.</description> 2016 <bitOffset>0</bitOffset> 2017 <bitWidth>10</bitWidth> 2018 <access>read-only</access> 2019 </field> 2020 <field> 2021 <name>CLK_GEN</name> 2022 <description>Clock Generator Select Value.</description> 2023 <bitOffset>10</bitOffset> 2024 <bitWidth>1</bitWidth> 2025 <access>read-only</access> 2026 </field> 2027 <field> 2028 <name>DRIVER_STRENGTH</name> 2029 <description>Driver Strength Select Value.</description> 2030 <bitOffset>14</bitOffset> 2031 <bitWidth>2</bitWidth> 2032 <access>read-only</access> 2033 <enumeratedValues> 2034 <enumeratedValue> 2035 <name>typeB</name> 2036 <value>0</value> 2037 </enumeratedValue> 2038 <enumeratedValue> 2039 <name>typeA</name> 2040 <value>1</value> 2041 </enumeratedValue> 2042 <enumeratedValue> 2043 <name>typeC</name> 2044 <value>2</value> 2045 </enumeratedValue> 2046 <enumeratedValue> 2047 <name>typeD</name> 2048 <value>3</value> 2049 </enumeratedValue> 2050 </enumeratedValues> 2051 </field> 2052 </fields> 2053 </register> 2054 <register> 2055 <name>PRESET_6</name> 2056 <description>Preset Value for SDR104.</description> 2057 <addressOffset>0x06C</addressOffset> 2058 <size>16</size> 2059 <access>read-only</access> 2060 <fields> 2061 <field> 2062 <name>SDCLK_FREQ</name> 2063 <description>SDCLK Frequency Select Value.</description> 2064 <bitOffset>0</bitOffset> 2065 <bitWidth>10</bitWidth> 2066 <access>read-only</access> 2067 </field> 2068 <field> 2069 <name>CLK_GEN</name> 2070 <description>Clock Generator Select Value.</description> 2071 <bitOffset>10</bitOffset> 2072 <bitWidth>1</bitWidth> 2073 <access>read-only</access> 2074 </field> 2075 <field> 2076 <name>DRIVER_STRENGTH</name> 2077 <description>Driver Strength Select Value.</description> 2078 <bitOffset>14</bitOffset> 2079 <bitWidth>2</bitWidth> 2080 <access>read-only</access> 2081 <enumeratedValues> 2082 <enumeratedValue> 2083 <name>typeB</name> 2084 <value>0</value> 2085 </enumeratedValue> 2086 <enumeratedValue> 2087 <name>typeA</name> 2088 <value>1</value> 2089 </enumeratedValue> 2090 <enumeratedValue> 2091 <name>typeC</name> 2092 <value>2</value> 2093 </enumeratedValue> 2094 <enumeratedValue> 2095 <name>typeD</name> 2096 <value>3</value> 2097 </enumeratedValue> 2098 </enumeratedValues> 2099 </field> 2100 </fields> 2101 </register> 2102 <register> 2103 <name>PRESET_7</name> 2104 <description>Preset Value for DDR50.</description> 2105 <addressOffset>0x06E</addressOffset> 2106 <size>16</size> 2107 <access>read-only</access> 2108 <fields> 2109 <field> 2110 <name>SDCLK_FREQ</name> 2111 <description>SDCLK Frequency Select Value.</description> 2112 <bitOffset>0</bitOffset> 2113 <bitWidth>10</bitWidth> 2114 <access>read-only</access> 2115 </field> 2116 <field> 2117 <name>CLK_GEN</name> 2118 <description>Clock Generator Select Value.</description> 2119 <bitOffset>10</bitOffset> 2120 <bitWidth>1</bitWidth> 2121 <access>read-only</access> 2122 </field> 2123 <field> 2124 <name>DRIVER_STRENGTH</name> 2125 <description>Driver Strength Select Value.</description> 2126 <bitOffset>14</bitOffset> 2127 <bitWidth>2</bitWidth> 2128 <access>read-only</access> 2129 <enumeratedValues> 2130 <enumeratedValue> 2131 <name>typeB</name> 2132 <value>0</value> 2133 </enumeratedValue> 2134 <enumeratedValue> 2135 <name>typeA</name> 2136 <value>1</value> 2137 </enumeratedValue> 2138 <enumeratedValue> 2139 <name>typeC</name> 2140 <value>2</value> 2141 </enumeratedValue> 2142 <enumeratedValue> 2143 <name>typeD</name> 2144 <value>3</value> 2145 </enumeratedValue> 2146 </enumeratedValues> 2147 </field> 2148 </fields> 2149 </register> 2150 <register> 2151 <name>SHARED_BUS</name> 2152 <description>SHARED_BUS.</description> 2153 <addressOffset>0x0E0</addressOffset> 2154 <size>32</size> 2155 </register> 2156 <register> 2157 <name>SLOT_INT</name> 2158 <description>Slot Interrupt Status.</description> 2159 <addressOffset>0x0FC</addressOffset> 2160 <size>16</size> 2161 <access>read-only</access> 2162 <fields> 2163 <field> 2164 <name>INT_SIGNALS</name> 2165 <description>Interrupt Signal For Each Slot.</description> 2166 <bitOffset>0</bitOffset> 2167 <bitWidth>1</bitWidth> 2168 <access>read-only</access> 2169 </field> 2170 </fields> 2171 </register> 2172 <register> 2173 <name>HOST_CN_VER</name> 2174 <description>Host Controller Version.</description> 2175 <addressOffset>0x0FE</addressOffset> 2176 <size>16</size> 2177 <fields> 2178 <field> 2179 <name>SPEC_VER</name> 2180 <description>Specification Version Number.</description> 2181 <bitOffset>0</bitOffset> 2182 <bitWidth>8</bitWidth> 2183 </field> 2184 <field> 2185 <name>VEND_VER</name> 2186 <description>Vendor Version Number.</description> 2187 <bitOffset>8</bitOffset> 2188 <bitWidth>8</bitWidth> 2189 </field> 2190 </fields> 2191 </register> 2192 </registers> 2193 </peripheral> 2194<!-- SDHC: 2195 SD Card Controller --> 2196</device> 2197
