1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 #include "mxc_device.h"
22 #include "rtc_regs.h"
23 #include "rtc.h"
24 #include "mxc_sys.h"
25 #include "mxc_delay.h"
26 #include "gpio_regs.h"
27 #include "mxc_errors.h"
28 #include "mcr_regs.h"
29 #include "rtc_reva.h"
30 #include "tmr.h"
31 #include "trimsir_regs.h"
32 
33 #define SUBSECOND_MSEC_0 200
34 #define SEARCH_STEPS 7
35 #define SEARCH_TARGET 0x30d400 /* 1/2 of 32 MHz periods in 32.768 kHz */
36 
37 #define RTCX1x_MASK 0x1F /* 5 bits */
38 #define RTCX2x_MASK 0x1F /* 5 bits */
39 
40 #define NOM_32K_FREQ 32768
41 #define TICKS_PER_RTC 122
42 
43 /* Converts a time in milleseconds to the equivalent RSSA register value. */
44 #define MSEC_TO_RSSA(x) (unsigned int)(0x100000000ULL - ((x * 4096) / 1000))
45 
46 /********************************************/
47 /* Maxim Function Mapping                   */
48 /********************************************/
49 
MXC_RTC_EnableInt(uint32_t mask)50 int MXC_RTC_EnableInt(uint32_t mask)
51 {
52     return MXC_RTC_RevA_EnableInt((mxc_rtc_reva_regs_t *)MXC_RTC, mask);
53 }
54 
MXC_RTC_DisableInt(uint32_t mask)55 int MXC_RTC_DisableInt(uint32_t mask)
56 {
57     return MXC_RTC_RevA_DisableInt((mxc_rtc_reva_regs_t *)MXC_RTC, mask);
58 }
59 
MXC_RTC_SetTimeofdayAlarm(uint32_t ras)60 int MXC_RTC_SetTimeofdayAlarm(uint32_t ras)
61 {
62     return MXC_RTC_RevA_SetTimeofdayAlarm((mxc_rtc_reva_regs_t *)MXC_RTC, ras);
63 }
64 
MXC_RTC_SetSubsecondAlarm(uint32_t rssa)65 int MXC_RTC_SetSubsecondAlarm(uint32_t rssa)
66 {
67     return MXC_RTC_RevA_SetSubsecondAlarm((mxc_rtc_reva_regs_t *)MXC_RTC, rssa);
68 }
69 
MXC_RTC_Start(void)70 int MXC_RTC_Start(void)
71 {
72     return MXC_RTC_RevA_Start((mxc_rtc_reva_regs_t *)MXC_RTC);
73 }
74 
MXC_RTC_Stop(void)75 int MXC_RTC_Stop(void)
76 {
77     return MXC_RTC_RevA_Stop((mxc_rtc_reva_regs_t *)MXC_RTC);
78 }
79 
MXC_RTC_Init(uint32_t sec,uint16_t ssec)80 int MXC_RTC_Init(uint32_t sec, uint16_t ssec)
81 {
82     MXC_GCR->clkctrl |= MXC_F_GCR_CLKCTRL_ERTCO_EN;
83 
84     return MXC_RTC_RevA_Init((mxc_rtc_reva_regs_t *)MXC_RTC, sec, (ssec & MXC_F_RTC_SSEC_SSEC));
85 }
86 
MXC_RTC_SquareWaveStart(mxc_rtc_freq_sel_t ft)87 int MXC_RTC_SquareWaveStart(mxc_rtc_freq_sel_t ft)
88 {
89     MXC_GPIO_Config(&gpio_cfg_rtcsqw);
90     MXC_MCR->outen |= MXC_F_MCR_OUTEN_SQWOUT_EN;
91 
92     return MXC_RTC_RevA_SquareWave((mxc_rtc_reva_regs_t *)MXC_RTC, MXC_RTC_REVA_SQUARE_WAVE_ENABLED,
93                                    ft);
94 }
95 
MXC_RTC_SquareWaveStop(void)96 int MXC_RTC_SquareWaveStop(void)
97 {
98     MXC_MCR->outen &= ~(MXC_F_MCR_OUTEN_SQWOUT_EN);
99 
100     return MXC_RTC_RevA_SquareWave((mxc_rtc_reva_regs_t *)MXC_RTC,
101                                    MXC_RTC_REVA_SQUARE_WAVE_DISABLED, 0);
102 }
103 
MXC_RTC_Trim(int8_t trm)104 int MXC_RTC_Trim(int8_t trm)
105 {
106     return MXC_RTC_RevA_Trim((mxc_rtc_reva_regs_t *)MXC_RTC, trm);
107 }
108 
MXC_RTC_GetFlags(void)109 int MXC_RTC_GetFlags(void)
110 {
111     return MXC_RTC_RevA_GetFlags((mxc_rtc_reva_regs_t *)MXC_RTC);
112 }
113 
MXC_RTC_ClearFlags(int flags)114 int MXC_RTC_ClearFlags(int flags)
115 {
116     return MXC_RTC_RevA_ClearFlags((mxc_rtc_reva_regs_t *)MXC_RTC, flags);
117 }
118 
MXC_RTC_GetSubSecond(void)119 int MXC_RTC_GetSubSecond(void)
120 {
121     return MXC_RTC_RevA_GetSubSecond((mxc_rtc_reva_regs_t *)MXC_RTC);
122 }
123 
MXC_RTC_GetSecond(void)124 int MXC_RTC_GetSecond(void)
125 {
126     return MXC_RTC_RevA_GetSecond((mxc_rtc_reva_regs_t *)MXC_RTC);
127 }
128 
MXC_RTC_GetSubSeconds(uint32_t * ssec)129 int MXC_RTC_GetSubSeconds(uint32_t *ssec)
130 {
131     MXC_RTC->ctrl &= ~MXC_F_RTC_CTRL_RDY; // Ensure valid data is in SSEC register
132     while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) {}
133 
134     return MXC_RTC_RevA_GetSubSeconds((mxc_rtc_reva_regs_t *)MXC_RTC, ssec);
135 }
136 
MXC_RTC_GetSeconds(uint32_t * sec)137 int MXC_RTC_GetSeconds(uint32_t *sec)
138 {
139     MXC_RTC->ctrl &= ~MXC_F_RTC_CTRL_RDY; // Ensure valid data is in SEC register
140     while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_RDY)) {}
141 
142     return MXC_RTC_RevA_GetSeconds((mxc_rtc_reva_regs_t *)MXC_RTC, sec);
143 }
144 
MXC_RTC_GetTime(uint32_t * sec,uint32_t * subsec)145 int MXC_RTC_GetTime(uint32_t *sec, uint32_t *subsec)
146 {
147     return MXC_RTC_RevA_GetTime((mxc_rtc_reva_regs_t *)MXC_RTC, sec, subsec);
148 }
149 
MXC_RTC_GetBusyFlag(void)150 int MXC_RTC_GetBusyFlag(void)
151 {
152     return MXC_RTC_RevA_GetBusyFlag((mxc_rtc_reva_regs_t *)MXC_RTC);
153 }
154 
MXC_RTC_TrimCrystal(void)155 int MXC_RTC_TrimCrystal(void)
156 {
157 #if TARGET_NUM == 78000
158     /* MAX78000 does not have the ERFO clock which the Trim function requires */
159     return E_NOT_SUPPORTED;
160 #endif
161 
162     unsigned int search_step, elapsed;
163     unsigned int upper, lower, trim, oldtrim, bestTrim, bestElapsed, bestElapsedDiff;
164     unsigned int freq = NOM_32K_FREQ;
165     int retval;
166 
167     /* Determine starting point for internal load capacitors */
168     upper = RTCX1x_MASK;
169     lower = 0;
170     trim = (upper + lower) / 2;
171 
172     /* Initialize best trim variables */
173     bestTrim = trim;
174     bestElapsed = bestElapsedDiff = SEARCH_TARGET;
175 
176     /* Init timer to count 32 MHz periods */
177     mxc_tmr_cfg_t tmr_cfg;
178     tmr_cfg.pres = MXC_TMR_PRES_1;
179     tmr_cfg.mode = MXC_TMR_MODE_CONTINUOUS;
180     tmr_cfg.bitMode = MXC_TMR_BIT_MODE_32;
181     tmr_cfg.clock = MXC_TMR_APB_CLK;
182     tmr_cfg.cmp_cnt = 0xFFFFFFFF;
183     tmr_cfg.pol = 0;
184     MXC_TMR_Init(MXC_TMR3, &tmr_cfg, FALSE);
185 
186     /* Clear out any previous configuration */
187     MXC_RTC_DisableInt(MXC_F_RTC_CTRL_TOD_ALARM_IE | MXC_F_RTC_CTRL_SSEC_ALARM_IE |
188                        MXC_F_RTC_CTRL_RDY_IE);
189     MXC_RTC_ClearFlags(MXC_RTC_GetFlags());
190 
191     MXC_RTC->oscctrl &= ~(MXC_F_RTC_OSCCTRL_BYPASS | MXC_F_RTC_OSCCTRL_SQW_32K);
192 
193     /* Setup SSEC Alarm */
194     MXC_RTC_DisableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE);
195     retval = MXC_RTC_SetSubsecondAlarm(MSEC_TO_RSSA(SUBSECOND_MSEC_0));
196     if (retval != E_NO_ERROR) {
197         return retval;
198     }
199     MXC_RTC_EnableInt(MXC_F_RTC_CTRL_SSEC_ALARM_IE);
200 
201     /* Trim loop */
202     search_step = 0;
203     while (search_step < SEARCH_STEPS) {
204         /* Set new trim point */
205         oldtrim = trim;
206         trim = (lower + upper) / 2;
207         if ((search_step > 0) && (trim == oldtrim)) {
208             /* Found trim value */
209             break;
210         }
211 
212         /* Set the trim values */
213         MXC_SETFIELD(MXC_TRIMSIR->rtc, MXC_F_TRIMSIR_RTC_X1TRIM,
214                      (trim << MXC_F_TRIMSIR_RTC_X1TRIM_POS));
215         MXC_SETFIELD(MXC_TRIMSIR->rtc, MXC_F_TRIMSIR_RTC_X2TRIM,
216                      (trim << MXC_F_TRIMSIR_RTC_X2TRIM_POS));
217 
218         /* Sleep to settle new caps */
219         MXC_Delay(MXC_DELAY_MSEC(10));
220 
221         /* Start 200 msec sampling window */
222         MXC_TMR_Stop(MXC_TMR3);
223         MXC_TMR_SetCount(MXC_TMR3, 0);
224 
225         /* Wait for an RTC edge */
226         MXC_RTC_ClearFlags(MXC_RTC_GetFlags());
227         while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_SSEC_ALARM)) {}
228 
229         MXC_TMR_Start(MXC_TMR3);
230 
231         /* Wait for an RTC edge */
232         MXC_RTC_ClearFlags(MXC_RTC_GetFlags());
233         while (!(MXC_RTC->ctrl & MXC_F_RTC_CTRL_SSEC_ALARM)) {}
234 
235         /* Capture the TMR count and adjust for processing delay */
236         elapsed = MXC_TMR_GetCount(MXC_TMR3);
237         MXC_TMR_Stop(MXC_TMR3);
238         elapsed += 810;
239 
240         /* Binary search for optimal trim value */
241         if (elapsed > SEARCH_TARGET) {
242             /* Too slow */
243             upper = trim;
244 
245             /* Record best setting */
246             if ((elapsed - SEARCH_TARGET) <= bestElapsedDiff) {
247                 bestElapsedDiff = elapsed - SEARCH_TARGET;
248                 bestElapsed = elapsed;
249                 bestTrim = trim;
250             }
251         } else {
252             /* Too fast */
253             lower = trim;
254 
255             /* Record best setting */
256             if ((SEARCH_TARGET - elapsed) <= bestElapsedDiff) {
257                 bestElapsedDiff = SEARCH_TARGET - elapsed;
258                 bestElapsed = elapsed;
259                 bestTrim = trim;
260             }
261         }
262 
263         search_step++;
264     }
265 
266     /* Apply the closest trim setting */
267     MXC_SETFIELD(MXC_TRIMSIR->rtc, MXC_F_TRIMSIR_RTC_X1TRIM,
268                  (bestTrim << MXC_F_TRIMSIR_RTC_X1TRIM_POS));
269     MXC_SETFIELD(MXC_TRIMSIR->rtc, MXC_F_TRIMSIR_RTC_X2TRIM,
270                  (bestTrim << MXC_F_TRIMSIR_RTC_X2TRIM_POS));
271 
272     /* Adjust 32K freq if we can't get close enough to 32768 Hz */
273     if (bestElapsed >= SEARCH_TARGET) {
274         freq -= (((bestElapsed - SEARCH_TARGET) + (TICKS_PER_RTC / 2 - 1)) / TICKS_PER_RTC);
275     } else {
276         freq += (((SEARCH_TARGET - bestElapsed) + (TICKS_PER_RTC / 2 - 1)) / TICKS_PER_RTC);
277     }
278 
279     /* Clear hardware state */
280     MXC_TMR_Stop(MXC_TMR3);
281     MXC_TMR_Shutdown(MXC_TMR3);
282     MXC_RTC_ClearFlags(MXC_RTC_GetFlags());
283 
284     return freq;
285 }
286