1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>RPU</name> 5 <description>Resource Protection Unit</description> 6 <baseAddress>0x40002000</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x1000</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <registers> 13 <register> 14 <name>GCR</name> 15 <description>GCR RPU Register.</description> 16 <addressOffset>0x0000</addressOffset> 17 <fields> 18 <field> 19 <name>ACCESS</name> 20 <description>APB Slave Peripheral Access Disable.</description> 21 <bitOffset>0</bitOffset> 22 <bitWidth>32</bitWidth> 23 </field> 24 </fields> 25 </register> 26 <register> 27 <name>SIR</name> 28 <description>SIR RPU Register.</description> 29 <addressOffset>0x0004</addressOffset> 30 <fields> 31 <field> 32 <name>ACCESS</name> 33 <description>APB Slave Peripheral Access Disable.</description> 34 <bitOffset>0</bitOffset> 35 <bitWidth>32</bitWidth> 36 </field> 37 </fields> 38 </register> 39 <register> 40 <name>FCR</name> 41 <description>FCR RPU Register.</description> 42 <addressOffset>0x0008</addressOffset> 43 <fields> 44 <field> 45 <name>ACCESS</name> 46 <description>APB Slave Peripheral Access Disable.</description> 47 <bitOffset>0</bitOffset> 48 <bitWidth>32</bitWidth> 49 </field> 50 </fields> 51 </register> 52 <register> 53 <name>TPU</name> 54 <description>TPU RPU Register.</description> 55 <addressOffset>0x0010</addressOffset> 56 <fields> 57 <field> 58 <name>ACCESS</name> 59 <description>APB Slave Peripheral Access Disable.</description> 60 <bitOffset>0</bitOffset> 61 <bitWidth>32</bitWidth> 62 </field> 63 </fields> 64 </register> 65 <register> 66 <name>RPU</name> 67 <description>RPU Register.</description> 68 <addressOffset>0x0020</addressOffset> 69 <fields> 70 <field> 71 <name>ACCESS</name> 72 <description>APB Slave Peripheral Access Disable.</description> 73 <bitOffset>0</bitOffset> 74 <bitWidth>32</bitWidth> 75 </field> 76 </fields> 77 </register> 78 <register> 79 <name>WDT0</name> 80 <description>WDT0 RPU Register.</description> 81 <addressOffset>0x0030</addressOffset> 82 <fields> 83 <field> 84 <name>ACCESS</name> 85 <description>APB Slave Peripheral Access Disable.</description> 86 <bitOffset>0</bitOffset> 87 <bitWidth>32</bitWidth> 88 </field> 89 </fields> 90 </register> 91 <register> 92 <name>WDT1</name> 93 <description>WDT1 RPU Register.</description> 94 <addressOffset>0x0034</addressOffset> 95 <fields> 96 <field> 97 <name>ACCESS</name> 98 <description>APB Slave Peripheral Access Disable.</description> 99 <bitOffset>0</bitOffset> 100 <bitWidth>32</bitWidth> 101 </field> 102 </fields> 103 </register> 104 <register> 105 <name>WDT2</name> 106 <description>WDT2 RPU Register.</description> 107 <addressOffset>0x0038</addressOffset> 108 <fields> 109 <field> 110 <name>ACCESS</name> 111 <description>APB Slave Peripheral Access Disable.</description> 112 <bitOffset>0</bitOffset> 113 <bitWidth>32</bitWidth> 114 </field> 115 </fields> 116 </register> 117 <register> 118 <name>SMON</name> 119 <description>SMON RPU Register.</description> 120 <addressOffset>0x0040</addressOffset> 121 <fields> 122 <field> 123 <name>ACCESS</name> 124 <description>APB Slave Peripheral Access Disable.</description> 125 <bitOffset>0</bitOffset> 126 <bitWidth>32</bitWidth> 127 </field> 128 </fields> 129 </register> 130 <register> 131 <name>SIMO</name> 132 <description>SIMO RPU Register.</description> 133 <addressOffset>0x0044</addressOffset> 134 <fields> 135 <field> 136 <name>ACCESS</name> 137 <description>APB Slave Peripheral Access Disable.</description> 138 <bitOffset>0</bitOffset> 139 <bitWidth>32</bitWidth> 140 </field> 141 </fields> 142 </register> 143 <register> 144 <name>DVS</name> 145 <description>DVS RPU Register.</description> 146 <addressOffset>0x0048</addressOffset> 147 <fields> 148 <field> 149 <name>ACCESS</name> 150 <description>APB Slave Peripheral Access Disable.</description> 151 <bitOffset>0</bitOffset> 152 <bitWidth>32</bitWidth> 153 </field> 154 </fields> 155 </register> 156 <register> 157 <name>AES</name> 158 <description>AES RPU Register.</description> 159 <addressOffset>0x0050</addressOffset> 160 <fields> 161 <field> 162 <name>ACCESS</name> 163 <description>APB Slave Peripheral Access Disable.</description> 164 <bitOffset>0</bitOffset> 165 <bitWidth>32</bitWidth> 166 </field> 167 </fields> 168 </register> 169 <register> 170 <name>RTC</name> 171 <description>RTC RPU Register.</description> 172 <addressOffset>0x0060</addressOffset> 173 <fields> 174 <field> 175 <name>ACCESS</name> 176 <description>APB Slave Peripheral Access Disable.</description> 177 <bitOffset>0</bitOffset> 178 <bitWidth>32</bitWidth> 179 </field> 180 </fields> 181 </register> 182 <register> 183 <name>WUT</name> 184 <description>WUT RPU Register.</description> 185 <addressOffset>0x0064</addressOffset> 186 <fields> 187 <field> 188 <name>ACCESS</name> 189 <description>APB Slave Peripheral Access Disable.</description> 190 <bitOffset>0</bitOffset> 191 <bitWidth>32</bitWidth> 192 </field> 193 </fields> 194 </register> 195 <register> 196 <name>PWRSEQ</name> 197 <description>PWRSEQ RPU Register.</description> 198 <addressOffset>0x0068</addressOffset> 199 <fields> 200 <field> 201 <name>ACCESS</name> 202 <description>APB Slave Peripheral Access Disable.</description> 203 <bitOffset>0</bitOffset> 204 <bitWidth>32</bitWidth> 205 </field> 206 </fields> 207 </register> 208 <register> 209 <name>MCR</name> 210 <description>MCR RPU Register.</description> 211 <addressOffset>0x006C</addressOffset> 212 <fields> 213 <field> 214 <name>ACCESS</name> 215 <description>APB Slave Peripheral Access Disable.</description> 216 <bitOffset>0</bitOffset> 217 <bitWidth>32</bitWidth> 218 </field> 219 </fields> 220 </register> 221 <register> 222 <name>GPIO0</name> 223 <description>GPIO0 RPU Register.</description> 224 <addressOffset>0x0080</addressOffset> 225 <fields> 226 <field> 227 <name>ACCESS</name> 228 <description>APB Slave Peripheral Access Disable.</description> 229 <bitOffset>0</bitOffset> 230 <bitWidth>32</bitWidth> 231 </field> 232 </fields> 233 </register> 234 <register> 235 <name>GPIO1</name> 236 <description>GPIO1 RPU Register.</description> 237 <addressOffset>0x0090</addressOffset> 238 <fields> 239 <field> 240 <name>ACCESS</name> 241 <description>APB Slave Peripheral Access Disable.</description> 242 <bitOffset>0</bitOffset> 243 <bitWidth>32</bitWidth> 244 </field> 245 </fields> 246 </register> 247 <register> 248 <name>TMR0</name> 249 <description>TMR0 RPU Register.</description> 250 <addressOffset>0x0100</addressOffset> 251 <fields> 252 <field> 253 <name>ACCESS</name> 254 <description>APB Slave Peripheral Access Disable.</description> 255 <bitOffset>0</bitOffset> 256 <bitWidth>32</bitWidth> 257 </field> 258 </fields> 259 </register> 260 <register> 261 <name>TMR1</name> 262 <description>TMR1 RPU Register.</description> 263 <addressOffset>0x0110</addressOffset> 264 <fields> 265 <field> 266 <name>ACCESS</name> 267 <description>APB Slave Peripheral Access Disable.</description> 268 <bitOffset>0</bitOffset> 269 <bitWidth>32</bitWidth> 270 </field> 271 </fields> 272 </register> 273 <register> 274 <name>TMR2</name> 275 <description>TMR2 RPU Register.</description> 276 <addressOffset>0x0120</addressOffset> 277 <fields> 278 <field> 279 <name>ACCESS</name> 280 <description>APB Slave Peripheral Access Disable.</description> 281 <bitOffset>0</bitOffset> 282 <bitWidth>32</bitWidth> 283 </field> 284 </fields> 285 </register> 286 <register> 287 <name>TMR3</name> 288 <description>TMR3 RPU Register.</description> 289 <addressOffset>0x0130</addressOffset> 290 <fields> 291 <field> 292 <name>ACCESS</name> 293 <description>APB Slave Peripheral Access Disable.</description> 294 <bitOffset>0</bitOffset> 295 <bitWidth>32</bitWidth> 296 </field> 297 </fields> 298 </register> 299 <register> 300 <name>TMR4</name> 301 <description>TMR4 RPU Register.</description> 302 <addressOffset>0x0140</addressOffset> 303 <fields> 304 <field> 305 <name>ACCESS</name> 306 <description>APB Slave Peripheral Access Disable.</description> 307 <bitOffset>0</bitOffset> 308 <bitWidth>32</bitWidth> 309 </field> 310 </fields> 311 </register> 312 <register> 313 <name>TMR5</name> 314 <description>TMR5 RPU Register.</description> 315 <addressOffset>0x0150</addressOffset> 316 <fields> 317 <field> 318 <name>ACCESS</name> 319 <description>APB Slave Peripheral Access Disable.</description> 320 <bitOffset>0</bitOffset> 321 <bitWidth>32</bitWidth> 322 </field> 323 </fields> 324 </register> 325 <register> 326 <name>HTIMER0</name> 327 <description>HTIMER0 RPU Register.</description> 328 <addressOffset>0x01B0</addressOffset> 329 <fields> 330 <field> 331 <name>ACCESS</name> 332 <description>APB Slave Peripheral Access Disable.</description> 333 <bitOffset>0</bitOffset> 334 <bitWidth>32</bitWidth> 335 </field> 336 </fields> 337 </register> 338 <register> 339 <name>HTIMER1</name> 340 <description>HTIMER1 RPU Register.</description> 341 <addressOffset>0x01C0</addressOffset> 342 <fields> 343 <field> 344 <name>ACCESS</name> 345 <description>APB Slave Peripheral Access Disable.</description> 346 <bitOffset>0</bitOffset> 347 <bitWidth>32</bitWidth> 348 </field> 349 </fields> 350 </register> 351 <register> 352 <name>I2C0_BUS0</name> 353 <description>I2C0_BUS0 RPU Register.</description> 354 <addressOffset>0x01D0</addressOffset> 355 <fields> 356 <field> 357 <name>ACCESS</name> 358 <description>APB Slave Peripheral Access Disable.</description> 359 <bitOffset>0</bitOffset> 360 <bitWidth>32</bitWidth> 361 </field> 362 </fields> 363 </register> 364 <register> 365 <name>I2C1_BUS0</name> 366 <description>I2C1_BUS0 RPU Register.</description> 367 <addressOffset>0x01E0</addressOffset> 368 <fields> 369 <field> 370 <name>ACCESS</name> 371 <description>APB Slave Peripheral Access Disable.</description> 372 <bitOffset>0</bitOffset> 373 <bitWidth>32</bitWidth> 374 </field> 375 </fields> 376 </register> 377 <register> 378 <name>I2C2_BUS0</name> 379 <description>I2C2_BUS0 RPU Register.</description> 380 <addressOffset>0x01F0</addressOffset> 381 <fields> 382 <field> 383 <name>ACCESS</name> 384 <description>APB Slave Peripheral Access Disable.</description> 385 <bitOffset>0</bitOffset> 386 <bitWidth>32</bitWidth> 387 </field> 388 </fields> 389 </register> 390 <register> 391 <name>SPIXFM</name> 392 <description>SPIXFM RPU Register.</description> 393 <addressOffset>0x0260</addressOffset> 394 <fields> 395 <field> 396 <name>ACCESS</name> 397 <description>APB Slave Peripheral Access Disable.</description> 398 <bitOffset>0</bitOffset> 399 <bitWidth>32</bitWidth> 400 </field> 401 </fields> 402 </register> 403 <register> 404 <name>SPIXFC</name> 405 <description>SPIXFC RPU Register.</description> 406 <addressOffset>0x0270</addressOffset> 407 <fields> 408 <field> 409 <name>ACCESS</name> 410 <description>APB Slave Peripheral Access Disable.</description> 411 <bitOffset>0</bitOffset> 412 <bitWidth>32</bitWidth> 413 </field> 414 </fields> 415 </register> 416 <register> 417 <name>DMA0</name> 418 <description>DMA0 RPU Register.</description> 419 <addressOffset>0x0280</addressOffset> 420 <fields> 421 <field> 422 <name>ACCESS</name> 423 <description>APB Slave Peripheral Access Disable.</description> 424 <bitOffset>0</bitOffset> 425 <bitWidth>32</bitWidth> 426 </field> 427 </fields> 428 </register> 429 <register> 430 <name>FLC0</name> 431 <description>FLC0 RPU Register.</description> 432 <addressOffset>0x0290</addressOffset> 433 <fields> 434 <field> 435 <name>ACCESS</name> 436 <description>APB Slave Peripheral Access Disable.</description> 437 <bitOffset>0</bitOffset> 438 <bitWidth>32</bitWidth> 439 </field> 440 </fields> 441 </register> 442 <register> 443 <name>FLC1</name> 444 <description>FLC1 RPU Register.</description> 445 <addressOffset>0x0294</addressOffset> 446 <fields> 447 <field> 448 <name>ACCESS</name> 449 <description>APB Slave Peripheral Access Disable.</description> 450 <bitOffset>0</bitOffset> 451 <bitWidth>32</bitWidth> 452 </field> 453 </fields> 454 </register> 455 <register> 456 <name>ICC0</name> 457 <description>ICC0 RPU Register.</description> 458 <addressOffset>0x02A0</addressOffset> 459 <fields> 460 <field> 461 <name>ACCESS</name> 462 <description>APB Slave Peripheral Access Disable.</description> 463 <bitOffset>0</bitOffset> 464 <bitWidth>32</bitWidth> 465 </field> 466 </fields> 467 </register> 468 <register> 469 <name>ICC1</name> 470 <description>ICC1 RPU Register.</description> 471 <addressOffset>0x02A4</addressOffset> 472 <fields> 473 <field> 474 <name>ACCESS</name> 475 <description>APB Slave Peripheral Access Disable.</description> 476 <bitOffset>0</bitOffset> 477 <bitWidth>32</bitWidth> 478 </field> 479 </fields> 480 </register> 481 <register> 482 <name>SFCC</name> 483 <description>SFCC RPU Register.</description> 484 <addressOffset>0x02F0</addressOffset> 485 <fields> 486 <field> 487 <name>ACCESS</name> 488 <description>APB Slave Peripheral Access Disable.</description> 489 <bitOffset>0</bitOffset> 490 <bitWidth>32</bitWidth> 491 </field> 492 </fields> 493 </register> 494 <register> 495 <name>SRCC</name> 496 <description>SRCC RPU Register.</description> 497 <addressOffset>0x0330</addressOffset> 498 <fields> 499 <field> 500 <name>ACCESS</name> 501 <description>APB Slave Peripheral Access Disable.</description> 502 <bitOffset>0</bitOffset> 503 <bitWidth>32</bitWidth> 504 </field> 505 </fields> 506 </register> 507 <register> 508 <name>ADC</name> 509 <description>ADC RPU Register.</description> 510 <addressOffset>0x0340</addressOffset> 511 <fields> 512 <field> 513 <name>ACCESS</name> 514 <description>APB Slave Peripheral Access Disable.</description> 515 <bitOffset>0</bitOffset> 516 <bitWidth>32</bitWidth> 517 </field> 518 </fields> 519 </register> 520 <register> 521 <name>DMA1</name> 522 <description>DMA1 RPU Register.</description> 523 <addressOffset>0x0350</addressOffset> 524 <fields> 525 <field> 526 <name>ACCESS</name> 527 <description>APB Slave Peripheral Access Disable.</description> 528 <bitOffset>0</bitOffset> 529 <bitWidth>32</bitWidth> 530 </field> 531 </fields> 532 </register> 533 <register> 534 <name>SDMA</name> 535 <description>SDMA RPU Register.</description> 536 <addressOffset>0x0360</addressOffset> 537 <fields> 538 <field> 539 <name>ACCESS</name> 540 <description>APB Slave Peripheral Access Disable.</description> 541 <bitOffset>0</bitOffset> 542 <bitWidth>32</bitWidth> 543 </field> 544 </fields> 545 </register> 546 <register> 547 <name>SDHCCTRL</name> 548 <description>SD Host Controller (APB).</description> 549 <addressOffset>0x0370</addressOffset> 550 <fields> 551 <field> 552 <name>ACCESS</name> 553 <description>APB Slave Peripheral Access Disable.</description> 554 <bitOffset>0</bitOffset> 555 <bitWidth>32</bitWidth> 556 </field> 557 </fields> 558 </register> 559 <register> 560 <name>SPIXR</name> 561 <description>SPIXR RPU Register.</description> 562 <addressOffset>0x03A0</addressOffset> 563 <fields> 564 <field> 565 <name>ACCESS</name> 566 <description>APB Slave Peripheral Access Disable.</description> 567 <bitOffset>0</bitOffset> 568 <bitWidth>32</bitWidth> 569 </field> 570 </fields> 571 </register> 572 <register> 573 <name>PTG_BUS0</name> 574 <description>PTG_BUS0 RPU Register.</description> 575 <addressOffset>0x03C0</addressOffset> 576 <fields> 577 <field> 578 <name>ACCESS</name> 579 <description>APB Slave Peripheral Access Disable.</description> 580 <bitOffset>0</bitOffset> 581 <bitWidth>32</bitWidth> 582 </field> 583 </fields> 584 </register> 585 <register> 586 <name>OWM</name> 587 <description>OWM RPU Register.</description> 588 <addressOffset>0x03D0</addressOffset> 589 <fields> 590 <field> 591 <name>ACCESS</name> 592 <description>APB Slave Peripheral Access Disable.</description> 593 <bitOffset>0</bitOffset> 594 <bitWidth>32</bitWidth> 595 </field> 596 </fields> 597 </register> 598 <register> 599 <name>SEMA</name> 600 <description>SEMA RPU Register.</description> 601 <addressOffset>0x03E0</addressOffset> 602 <fields> 603 <field> 604 <name>ACCESS</name> 605 <description>APB Slave Peripheral Access Disable.</description> 606 <bitOffset>0</bitOffset> 607 <bitWidth>32</bitWidth> 608 </field> 609 </fields> 610 </register> 611 <register> 612 <name>UART0</name> 613 <description>UART0 RPU Register.</description> 614 <addressOffset>0x0420</addressOffset> 615 <fields> 616 <field> 617 <name>ACCESS</name> 618 <description>APB Slave Peripheral Access Disable.</description> 619 <bitOffset>0</bitOffset> 620 <bitWidth>32</bitWidth> 621 </field> 622 </fields> 623 </register> 624 <register> 625 <name>UART1</name> 626 <description>UART1 RPU Register.</description> 627 <addressOffset>0x0430</addressOffset> 628 <fields> 629 <field> 630 <name>ACCESS</name> 631 <description>APB Slave Peripheral Access Disable.</description> 632 <bitOffset>0</bitOffset> 633 <bitWidth>32</bitWidth> 634 </field> 635 </fields> 636 </register> 637 <register> 638 <name>UART2</name> 639 <description>UART2 RPU Register.</description> 640 <addressOffset>0x0440</addressOffset> 641 <fields> 642 <field> 643 <name>ACCESS</name> 644 <description>APB Slave Peripheral Access Disable.</description> 645 <bitOffset>0</bitOffset> 646 <bitWidth>32</bitWidth> 647 </field> 648 </fields> 649 </register> 650 <register> 651 <name>SPI1</name> 652 <description>SPI1 RPU Register.</description> 653 <addressOffset>0x0460</addressOffset> 654 <fields> 655 <field> 656 <name>ACCESS</name> 657 <description>APB Slave Peripheral Access Disable.</description> 658 <bitOffset>0</bitOffset> 659 <bitWidth>32</bitWidth> 660 </field> 661 </fields> 662 </register> 663 <register> 664 <name>SPI2</name> 665 <description>SPI2 RPU Register.</description> 666 <addressOffset>0x0470</addressOffset> 667 <fields> 668 <field> 669 <name>ACCESS</name> 670 <description>APB Slave Peripheral Access Disable.</description> 671 <bitOffset>0</bitOffset> 672 <bitWidth>32</bitWidth> 673 </field> 674 </fields> 675 </register> 676 <register> 677 <name>AUDIO</name> 678 <description>AUDIO RPU Register.</description> 679 <addressOffset>0x04C0</addressOffset> 680 <fields> 681 <field> 682 <name>ACCESS</name> 683 <description>APB Slave Peripheral Access Disable.</description> 684 <bitOffset>0</bitOffset> 685 <bitWidth>32</bitWidth> 686 </field> 687 </fields> 688 </register> 689 <register> 690 <name>TRNG</name> 691 <description>TRNG RPU Register.</description> 692 <addressOffset>0x04D0</addressOffset> 693 <fields> 694 <field> 695 <name>ACCESS</name> 696 <description>APB Slave Peripheral Access Disable.</description> 697 <bitOffset>0</bitOffset> 698 <bitWidth>32</bitWidth> 699 </field> 700 </fields> 701 </register> 702 <register> 703 <name>BTLE</name> 704 <description>BTLE RPU Register.</description> 705 <addressOffset>0x0500</addressOffset> 706 <fields> 707 <field> 708 <name>ACCESS</name> 709 <description>APB Slave Peripheral Access Disable.</description> 710 <bitOffset>0</bitOffset> 711 <bitWidth>32</bitWidth> 712 </field> 713 </fields> 714 </register> 715 <register> 716 <name>I2C0_BUS1</name> 717 <description>I2C0_BUS1 RPU Register.</description> 718 <addressOffset>0x11D0</addressOffset> 719 <fields> 720 <field> 721 <name>ACCESS</name> 722 <description>APB Slave Peripheral Access Disable.</description> 723 <bitOffset>0</bitOffset> 724 <bitWidth>32</bitWidth> 725 </field> 726 </fields> 727 </register> 728 <register> 729 <name>I2C1_BUS1</name> 730 <description>I2C1_BUS1 RPU Register.</description> 731 <addressOffset>0x11E0</addressOffset> 732 <fields> 733 <field> 734 <name>ACCESS</name> 735 <description>APB Slave Peripheral Access Disable.</description> 736 <bitOffset>0</bitOffset> 737 <bitWidth>32</bitWidth> 738 </field> 739 </fields> 740 </register> 741 <register> 742 <name>I2C2_BUS1</name> 743 <description>I2C2_BU1 RPU Register.</description> 744 <addressOffset>0x11F0</addressOffset> 745 <fields> 746 <field> 747 <name>ACCESS</name> 748 <description>APB Slave Peripheral Access Disable.</description> 749 <bitOffset>0</bitOffset> 750 <bitWidth>32</bitWidth> 751 </field> 752 </fields> 753 </register> 754 <register> 755 <name>PTG_BUS1</name> 756 <description>PTG_BUS1 RPU Register.</description> 757 <addressOffset>0x13C0</addressOffset> 758 <fields> 759 <field> 760 <name>ACCESS</name> 761 <description>APB Slave Peripheral Access Disable.</description> 762 <bitOffset>0</bitOffset> 763 <bitWidth>32</bitWidth> 764 </field> 765 </fields> 766 </register> 767 <register> 768 <name>USBHS</name> 769 <description>USBHS RPU Register.</description> 770 <addressOffset>0x0B10</addressOffset> 771 <fields> 772 <field> 773 <name>ACCESS</name> 774 <description>APB Slave Peripheral Access Disable.</description> 775 <bitOffset>0</bitOffset> 776 <bitWidth>32</bitWidth> 777 </field> 778 </fields> 779 </register> 780 <register> 781 <name>SDIO</name> 782 <description>SDIO/SDHC Target RPU Register.</description> 783 <addressOffset>0x0B60</addressOffset> 784 <fields> 785 <field> 786 <name>ACCESS</name> 787 <description>APB Slave Peripheral Access Disable.</description> 788 <bitOffset>0</bitOffset> 789 <bitWidth>32</bitWidth> 790 </field> 791 </fields> 792 </register> 793 <register> 794 <name>SPIXFM_FIFO</name> 795 <description>SPIXFM_FIFO RPU Register.</description> 796 <addressOffset>0x0BC0</addressOffset> 797 <fields> 798 <field> 799 <name>ACCESS</name> 800 <description>APB Slave Peripheral Access Disable.</description> 801 <bitOffset>0</bitOffset> 802 <bitWidth>32</bitWidth> 803 </field> 804 </fields> 805 </register> 806 <register> 807 <name>SPI0</name> 808 <description>SPI0 RPU Register.</description> 809 <addressOffset>0x0BE0</addressOffset> 810 <fields> 811 <field> 812 <name>ACCESS</name> 813 <description>APB Slave Peripheral Access Disable.</description> 814 <bitOffset>0</bitOffset> 815 <bitWidth>32</bitWidth> 816 </field> 817 </fields> 818 </register> 819 <register> 820 <name>SYSRAM0</name> 821 <description>SYSRAM0 RPU Register.</description> 822 <addressOffset>0x0F00</addressOffset> 823 <fields> 824 <field> 825 <name>ACCESS</name> 826 <description>APB Slave Peripheral Access Disable.</description> 827 <bitOffset>0</bitOffset> 828 <bitWidth>32</bitWidth> 829 </field> 830 </fields> 831 </register> 832 <register> 833 <name>SYSRAM1</name> 834 <description>SYSRAM1 RPU Register.</description> 835 <addressOffset>0x0F10</addressOffset> 836 <fields> 837 <field> 838 <name>ACCESS</name> 839 <description>APB Slave Peripheral Access Disable.</description> 840 <bitOffset>0</bitOffset> 841 <bitWidth>32</bitWidth> 842 </field> 843 </fields> 844 </register> 845 <register> 846 <name>SYSRAM2</name> 847 <description>SYSRAM2 RPU Register.</description> 848 <addressOffset>0x0F20</addressOffset> 849 <fields> 850 <field> 851 <name>ACCESS</name> 852 <description>APB Slave Peripheral Access Disable.</description> 853 <bitOffset>0</bitOffset> 854 <bitWidth>32</bitWidth> 855 </field> 856 </fields> 857 </register> 858 <register> 859 <name>SYSRAM3</name> 860 <description>SYSRAM3 RPU Register.</description> 861 <addressOffset>0x0F30</addressOffset> 862 <fields> 863 <field> 864 <name>ACCESS</name> 865 <description>APB Slave Peripheral Access Disable.</description> 866 <bitOffset>0</bitOffset> 867 <bitWidth>32</bitWidth> 868 </field> 869 </fields> 870 </register> 871 <register> 872 <name>SYSRAM4</name> 873 <description>SYSRAM4 RPU Register.</description> 874 <addressOffset>0x0F40</addressOffset> 875 <fields> 876 <field> 877 <name>ACCESS</name> 878 <description>APB Slave Peripheral Access Disable.</description> 879 <bitOffset>0</bitOffset> 880 <bitWidth>32</bitWidth> 881 </field> 882 </fields> 883 </register> 884 <register> 885 <name>SYSRAM5</name> 886 <description>SYSRAM5 RPU Register.</description> 887 <addressOffset>0x0F50</addressOffset> 888 <fields> 889 <field> 890 <name>ACCESS</name> 891 <description>APB Slave Peripheral Access Disable.</description> 892 <bitOffset>0</bitOffset> 893 <bitWidth>32</bitWidth> 894 </field> 895 </fields> 896 </register> 897 <register> 898 <name>SYSRAM6_11</name> 899 <description>SYSRAM6-11 RPU Register.</description> 900 <addressOffset>0x0F60</addressOffset> 901 <fields> 902 <field> 903 <name>ACCESS</name> 904 <description>APB Slave Peripheral Access Disable.</description> 905 <bitOffset>0</bitOffset> 906 <bitWidth>32</bitWidth> 907 </field> 908 </fields> 909 </register> 910 </registers> 911 </peripheral> 912 <!-- RTC : Real Time Clock & Alarm --> 913</device>
