1 /**
2 * @file rpu.c
3 * @brief This file contains the function implementations for the
4 * RPU peripheral module.
5 */
6
7 /******************************************************************************
8 *
9 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
10 * Analog Devices, Inc.),
11 * Copyright (C) 2023-2024 Analog Devices, Inc.
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *
25 ******************************************************************************/
26
27 /* **** Includes **** */
28 #include <string.h>
29 #include "mxc_device.h"
30 #include "mxc_assert.h"
31 #include "mxc_sys.h"
32 #include "mxc_errors.h"
33 #include "rpu.h"
34 #include "rpu_reva.h"
35 #include "rpu_regs.h"
36
37 /* **** Functions **** */
MXC_RPU_RevA_Allow(mxc_rpu_device_t periph,uint32_t allow_mask)38 int MXC_RPU_RevA_Allow(mxc_rpu_device_t periph, uint32_t allow_mask)
39 {
40 // MAX32665-family only uses the bottom 9 bits of the RPU registers
41 if (allow_mask & (0xFFFFFFFF << MXC_RPU_NUM_BUS_MASTERS)) {
42 return E_BAD_PARAM;
43 }
44
45 // Writes to the RPU registers are ignored in thread (unprivileged) operation
46 if (MXC_RPU_RevA_IsAllowed() != E_NO_ERROR) {
47 return E_BAD_STATE;
48 }
49
50 // Add the register offset (periph) to the RPU base address to get the register address
51 uint32_t *access_control_reg = (uint32_t *)(MXC_BASE_RPU + (uint32_t)periph);
52
53 // Read-Modify-Write the register to enable access to bus masters specified in the mask
54 *access_control_reg = (~allow_mask) & *access_control_reg;
55
56 return E_NO_ERROR;
57 }
58
MXC_RPU_RevA_Disallow(mxc_rpu_device_t periph,uint32_t disallow_mask)59 int MXC_RPU_RevA_Disallow(mxc_rpu_device_t periph, uint32_t disallow_mask)
60 {
61 // MAX32665-family only uses the bottom 9 bits of the RPU registers
62 if (disallow_mask & (0xFFFFFFFF << MXC_RPU_NUM_BUS_MASTERS)) {
63 return E_BAD_PARAM;
64 }
65
66 // Writes to the RPU registers are ignored in thread (unprivileged) operation
67 if (MXC_RPU_RevA_IsAllowed() != E_NO_ERROR) {
68 return E_BAD_STATE;
69 }
70
71 // Add the register offset (periph) to the RPU Base Address to get the register address
72 uint32_t *access_control_reg = (uint32_t *)(MXC_BASE_RPU + (uint32_t)periph);
73
74 // Read-Modify-Write the register to disable access to bus masters specified in the mask
75 *access_control_reg = disallow_mask | *access_control_reg;
76
77 return E_NO_ERROR;
78 }
79
MXC_RPU_RevA_IsAllowed(void)80 int MXC_RPU_RevA_IsAllowed(void)
81 {
82 // Get the value of the ARM Core Control Register
83 CONTROL_Type ctrl = (CONTROL_Type)__get_CONTROL();
84
85 if (!(ctrl.b.nPRIV)) {
86 return E_NO_ERROR;
87 }
88
89 return E_BAD_STATE;
90 }
91
