1<?xml version="1.0" encoding="utf-8"?>
2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd">
3  <peripheral>
4    <name>PTG</name>
5    <description>Pulse Train Generation</description>
6    <groupName>Pulse_Train</groupName>
7    <baseAddress>0x4003C000</baseAddress>
8    <size>32</size>
9    <access>read-write</access>
10    <addressBlock>
11      <offset>0</offset>
12      <size>0x0018</size>
13      <usage>registers</usage>
14    </addressBlock>
15    <interrupt>
16      <name>PT</name>
17      <description>Pulse Train IRQ</description>
18      <value>59</value>
19    </interrupt>
20    <registers>
21      <!-- ENABLE: Global Enable/Disable Controls for All Pulse Trains -->
22      <register>
23        <name>ENABLE</name>
24        <description>Global Enable/Disable Controls for All Pulse Trains</description>
25        <addressOffset>0x0000</addressOffset>
26        <access>read-write</access>
27        <fields>
28          <field>
29            <name>pt0</name>
30            <description>Enable/Disable control for PT0</description>
31            <bitOffset>0</bitOffset>
32            <bitWidth>1</bitWidth>
33            <access>read-write</access>
34          </field>
35          <field>
36            <name>pt1</name>
37            <description>Enable/Disable control for PT1</description>
38            <bitOffset>1</bitOffset>
39            <bitWidth>1</bitWidth>
40            <access>read-write</access>
41          </field>
42          <field>
43            <name>pt2</name>
44            <description>Enable/Disable control for PT2</description>
45            <bitOffset>2</bitOffset>
46            <bitWidth>1</bitWidth>
47            <access>read-write</access>
48          </field>
49          <field>
50            <name>pt3</name>
51            <description>Enable/Disable control for PT3</description>
52            <bitOffset>3</bitOffset>
53            <bitWidth>1</bitWidth>
54            <access>read-write</access>
55          </field>
56        </fields>
57      </register>
58      <!-- RESYNC: Global Resync (All Pulse Trains) Control -->
59      <register>
60        <name>RESYNC</name>
61        <description>Global Resync (All Pulse Trains) Control</description>
62        <addressOffset>0x0004</addressOffset>
63        <access>read-write</access>
64        <fields>
65          <field>
66            <name>pt0</name>
67            <description>Resync control for PT0</description>
68            <bitOffset>0</bitOffset>
69            <bitWidth>1</bitWidth>
70            <access>read-write</access>
71          </field>
72          <field>
73            <name>pt1</name>
74            <description>Resync control for PT1</description>
75            <bitOffset>1</bitOffset>
76            <bitWidth>1</bitWidth>
77            <access>read-write</access>
78          </field>
79          <field>
80            <name>pt2</name>
81            <description>Resync control for PT2</description>
82            <bitOffset>2</bitOffset>
83            <bitWidth>1</bitWidth>
84            <access>read-write</access>
85          </field>
86          <field>
87            <name>pt3</name>
88            <description>Resync control for PT3</description>
89            <bitOffset>3</bitOffset>
90            <bitWidth>1</bitWidth>
91            <access>read-write</access>
92          </field>
93        </fields>
94      </register>
95      <!-- STOP_INTFL: Pulse Train Stopped Interrupt Flags -->
96      <register>
97        <name>STOP_INTFL</name>
98        <description>Pulse Train Stop Interrupt Flags</description>
99        <addressOffset>0x0008</addressOffset>
100        <access>read-write</access>
101        <fields>
102          <field>
103            <name>pt0</name>
104            <description>Pulse Train 0 Stopped Interrupt Flag</description>
105            <bitOffset>0</bitOffset>
106            <bitWidth>1</bitWidth>
107            <access>read-write</access>
108          </field>
109          <field>
110            <name>pt1</name>
111            <description>Pulse Train 1 Stopped Interrupt Flag</description>
112            <bitOffset>1</bitOffset>
113            <bitWidth>1</bitWidth>
114            <access>read-write</access>
115          </field>
116          <field>
117            <name>pt2</name>
118            <description>Pulse Train 2 Stopped Interrupt Flag</description>
119            <bitOffset>2</bitOffset>
120            <bitWidth>1</bitWidth>
121            <access>read-write</access>
122          </field>
123          <field>
124            <name>pt3</name>
125            <description>Pulse Train 3 Stopped Interrupt Flag</description>
126            <bitOffset>3</bitOffset>
127            <bitWidth>1</bitWidth>
128            <access>read-write</access>
129          </field>
130        </fields>
131      </register>
132      <!-- STOP_INTEN: Pulse Train Stopped Interrupt Enable/Disable -->
133      <register>
134        <name>STOP_INTEN</name>
135        <description>Pulse Train Stop Interrupt Enable/Disable</description>
136        <addressOffset>0x000C</addressOffset>
137        <access>read-write</access>
138        <fields>
139          <field>
140            <name>pt0</name>
141            <description>Pulse Train 0 Stopped Interrupt Enable/Disable</description>
142            <bitOffset>0</bitOffset>
143            <bitWidth>1</bitWidth>
144            <access>read-write</access>
145          </field>
146          <field>
147            <name>pt1</name>
148            <description>Pulse Train 1 Stopped Interrupt Enable/Disable</description>
149            <bitOffset>1</bitOffset>
150            <bitWidth>1</bitWidth>
151            <access>read-write</access>
152          </field>
153          <field>
154            <name>pt2</name>
155            <description>Pulse Train 2 Stopped Interrupt Enable/Disable</description>
156            <bitOffset>2</bitOffset>
157            <bitWidth>1</bitWidth>
158            <access>read-write</access>
159          </field>
160          <field>
161            <name>pt3</name>
162            <description>Pulse Train 3 Stopped Interrupt Enable/Disable</description>
163            <bitOffset>3</bitOffset>
164            <bitWidth>1</bitWidth>
165            <access>read-write</access>
166          </field>
167        </fields>
168      </register>
169      <!--SAFE_EN: Pulse Train Global Safe Enable -->
170      <register>
171        <name>SAFE_EN</name>
172        <description>Pulse Train Global Safe Enable.</description>
173        <addressOffset>0x0010</addressOffset>
174        <access>write-only</access>
175        <fields>
176          <field>
177            <name>PT0</name>
178            <bitOffset>0</bitOffset>
179            <bitWidth>1</bitWidth>
180            <access>write-only</access>
181          </field>
182          <field>
183            <name>PT1</name>
184            <bitOffset>1</bitOffset>
185            <bitWidth>1</bitWidth>
186            <access>write-only</access>
187          </field>
188          <field>
189            <name>PT2</name>
190            <bitOffset>2</bitOffset>
191            <bitWidth>1</bitWidth>
192            <access>write-only</access>
193          </field>
194          <field>
195            <name>PT3</name>
196            <bitOffset>3</bitOffset>
197            <bitWidth>1</bitWidth>
198            <access>write-only</access>
199          </field>
200        </fields>
201      </register>
202      <!--SAFE_DIS: Pulse Train Global Safe Disable-->
203      <register>
204        <name>SAFE_DIS</name>
205        <description>Pulse Train Global Safe Disable.</description>
206        <addressOffset>0x0014</addressOffset>
207        <access>write-only</access>
208        <fields>
209          <field>
210            <name>PT0</name>
211            <bitOffset>0</bitOffset>
212            <bitWidth>1</bitWidth>
213            <access>write-only</access>
214          </field>
215          <field>
216            <name>PT1</name>
217            <bitOffset>1</bitOffset>
218            <bitWidth>1</bitWidth>
219            <access>write-only</access>
220          </field>
221          <field>
222            <name>PT2</name>
223            <bitOffset>2</bitOffset>
224            <bitWidth>1</bitWidth>
225            <access>write-only</access>
226          </field>
227          <field>
228            <name>PT3</name>
229            <bitOffset>3</bitOffset>
230            <bitWidth>1</bitWidth>
231            <access>write-only</access>
232          </field>
233        </fields>
234      </register>
235      <!--READY_INTFL: Pulse Train Ready Interrupt Flags -->
236      <register>
237        <name>READY_INTFL</name>
238        <description>Pulse Train Ready Interrupt Flags</description>
239        <addressOffset>0x0018</addressOffset>
240        <access>read-write</access>
241        <fields>
242          <field>
243            <name>pt0</name>
244            <description>Pulse Train 0 Ready Interrupt Flag</description>
245            <bitOffset>0</bitOffset>
246            <bitWidth>1</bitWidth>
247            <access>read-write</access>
248          </field>
249          <field>
250            <name>pt1</name>
251            <description>Pulse Train 1 Ready Interrupt Flag</description>
252            <bitOffset>1</bitOffset>
253            <bitWidth>1</bitWidth>
254            <access>read-write</access>
255          </field>
256          <field>
257            <name>pt2</name>
258            <description>Pulse Train 2 Ready Interrupt Flag</description>
259            <bitOffset>2</bitOffset>
260            <bitWidth>1</bitWidth>
261            <access>read-write</access>
262          </field>
263          <field>
264            <name>pt3</name>
265            <description>Pulse Train 3 Ready Interrupt Flag</description>
266            <bitOffset>3</bitOffset>
267            <bitWidth>1</bitWidth>
268            <access>read-write</access>
269          </field>
270        </fields>
271      </register>
272      <!--READY_INTEN: Pulse Train Ready Interrupt Enable/Disable -->
273      <register>
274        <name>READY_INTEN</name>
275        <description>Pulse Train Ready Interrupt Enable/Disable</description>
276        <addressOffset>0x001C</addressOffset>
277        <access>read-write</access>
278        <fields>
279          <field>
280            <name>pt0</name>
281            <description>Pulse Train 0 Ready Interrupt Enable/Disable</description>
282            <bitOffset>0</bitOffset>
283            <bitWidth>1</bitWidth>
284            <access>read-write</access>
285          </field>
286          <field>
287            <name>pt1</name>
288            <description>Pulse Train 1 Ready Interrupt Enable/Disable</description>
289            <bitOffset>1</bitOffset>
290            <bitWidth>1</bitWidth>
291            <access>read-write</access>
292          </field>
293          <field>
294            <name>pt2</name>
295            <description>Pulse Train 2 Ready Interrupt Enable/Disable</description>
296            <bitOffset>2</bitOffset>
297            <bitWidth>1</bitWidth>
298            <access>read-write</access>
299          </field>
300          <field>
301            <name>pt3</name>
302            <description>Pulse Train 3 Ready Interrupt Enable/Disable</description>
303            <bitOffset>3</bitOffset>
304            <bitWidth>1</bitWidth>
305            <access>read-write</access>
306          </field>
307        </fields>
308      </register>
309    </registers>
310  </peripheral>
311</device>