1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 /* **** Includes **** */
22 #include <stddef.h>
23 #include "mxc_errors.h"
24 #include "mxc_sys.h"
25 #include "gpio.h"
26 #include "pt.h"
27 #include "pt_reva.h"
28
29 /* ************************************************************************* */
MXC_PT_Init(mxc_ptg_regs_t * ptg,mxc_clk_scale_t clk_scale)30 void MXC_PT_Init(mxc_ptg_regs_t *ptg, mxc_clk_scale_t clk_scale)
31 {
32 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_PT);
33 MXC_SYS_Reset_Periph(MXC_SYS_RESET_PT);
34
35 MXC_PT_RevA_Init((mxc_ptg_reva_regs_t *)ptg, clk_scale);
36 }
37
38 /* ************************************************************************* */
MXC_PT_Shutdown(mxc_ptg_regs_t * ptg,uint32_t pts)39 void MXC_PT_Shutdown(mxc_ptg_regs_t *ptg, uint32_t pts)
40 {
41 MXC_PT_RevA_Shutdown((mxc_ptg_reva_regs_t *)ptg, pts);
42 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_PT);
43 }
44
45 /* ************************************************************************* */
MXC_PT_Config(mxc_ptg_regs_t * ptg,mxc_pt_cfg_t * cfg)46 int MXC_PT_Config(mxc_ptg_regs_t *ptg, mxc_pt_cfg_t *cfg)
47 {
48 if (cfg->outputSelect) {
49 switch (cfg->channel) {
50 case 0:
51 MXC_GPIO_Config(&gpio_cfg_pt0_1);
52 break;
53 case 1:
54 MXC_GPIO_Config(&gpio_cfg_pt1_1);
55 break;
56 case 2:
57 MXC_GPIO_Config(&gpio_cfg_pt2_1);
58 break;
59 case 3:
60 MXC_GPIO_Config(&gpio_cfg_pt3_1);
61 break;
62 case 4:
63 MXC_GPIO_Config(&gpio_cfg_pt4_1);
64 break;
65 case 5:
66 MXC_GPIO_Config(&gpio_cfg_pt5_1);
67 break;
68 case 6:
69 MXC_GPIO_Config(&gpio_cfg_pt6_1);
70 break;
71 case 7:
72 MXC_GPIO_Config(&gpio_cfg_pt7_1);
73 break;
74 case 8:
75 MXC_GPIO_Config(&gpio_cfg_pt8_1);
76 break;
77 case 9:
78 MXC_GPIO_Config(&gpio_cfg_pt9_1);
79 break;
80 case 10:
81 MXC_GPIO_Config(&gpio_cfg_pt10_1);
82 break;
83 case 11:
84 MXC_GPIO_Config(&gpio_cfg_pt11_1);
85 break;
86 case 12:
87 MXC_GPIO_Config(&gpio_cfg_pt12_1);
88 break;
89 case 13:
90 MXC_GPIO_Config(&gpio_cfg_pt13_1);
91 break;
92 case 14:
93 MXC_GPIO_Config(&gpio_cfg_pt14_1);
94 break;
95 case 15:
96 MXC_GPIO_Config(&gpio_cfg_pt15_1);
97 break;
98 default:
99 return E_BAD_PARAM;
100 }
101 } else {
102 switch (cfg->channel) {
103 case 0:
104 MXC_GPIO_Config(&gpio_cfg_pt0_0);
105 break;
106 case 1:
107 MXC_GPIO_Config(&gpio_cfg_pt1_0);
108 break;
109 case 2:
110 MXC_GPIO_Config(&gpio_cfg_pt2_0);
111 break;
112 case 3:
113 MXC_GPIO_Config(&gpio_cfg_pt3_0);
114 break;
115 case 4:
116 MXC_GPIO_Config(&gpio_cfg_pt4_0);
117 break;
118 case 5:
119 MXC_GPIO_Config(&gpio_cfg_pt5_0);
120 break;
121 case 6:
122 MXC_GPIO_Config(&gpio_cfg_pt6_0);
123 break;
124 case 7:
125 MXC_GPIO_Config(&gpio_cfg_pt7_0);
126 break;
127 case 8:
128 MXC_GPIO_Config(&gpio_cfg_pt8_0);
129 break;
130 case 9:
131 MXC_GPIO_Config(&gpio_cfg_pt9_0);
132 break;
133 case 10:
134 MXC_GPIO_Config(&gpio_cfg_pt10_0);
135 break;
136 case 11:
137 MXC_GPIO_Config(&gpio_cfg_pt11_0);
138 break;
139 case 12:
140 MXC_GPIO_Config(&gpio_cfg_pt12_0);
141 break;
142 case 13:
143 MXC_GPIO_Config(&gpio_cfg_pt13_0);
144 break;
145 case 14:
146 MXC_GPIO_Config(&gpio_cfg_pt14_0);
147 break;
148 case 15:
149 MXC_GPIO_Config(&gpio_cfg_pt15_0);
150 break;
151 default:
152 return E_BAD_PARAM;
153 }
154 }
155
156 return MXC_PT_RevA_Config((mxc_ptg_reva_regs_t *)ptg, cfg);
157 }
158
159 /* ************************************************************************* */
MXC_PT_SqrWaveConfig(mxc_ptg_regs_t * ptg,unsigned channel,uint32_t freq,uint8_t outputSelect)160 int MXC_PT_SqrWaveConfig(mxc_ptg_regs_t *ptg, unsigned channel, uint32_t freq, uint8_t outputSelect)
161 {
162 mxc_pt_cfg_t sqwcfg;
163 sqwcfg.outputSelect = (!!outputSelect);
164
165 MXC_PT_RevA_SqrWaveConfig((mxc_ptg_reva_regs_t *)ptg, &sqwcfg, channel, freq);
166 return MXC_PT_Config(ptg, &sqwcfg);
167 }
168
169 /* ************************************************************************* */
MXC_PT_Start(mxc_ptg_regs_t * ptg,unsigned pts)170 void MXC_PT_Start(mxc_ptg_regs_t *ptg, unsigned pts)
171 {
172 MXC_PT_RevA_Start((mxc_ptg_reva_regs_t *)ptg, pts);
173 }
174
175 /* ************************************************************************* */
MXC_PT_Stop(mxc_ptg_regs_t * ptg,unsigned pts)176 void MXC_PT_Stop(mxc_ptg_regs_t *ptg, unsigned pts)
177 {
178 MXC_PT_RevA_Stop((mxc_ptg_reva_regs_t *)ptg, pts);
179 }
180
181 /* ************************************************************************* */
MXC_PT_IsActive(mxc_ptg_regs_t * ptg,uint32_t pts)182 uint32_t MXC_PT_IsActive(mxc_ptg_regs_t *ptg, uint32_t pts)
183 {
184 return MXC_PT_RevA_IsActive((mxc_ptg_reva_regs_t *)ptg, pts);
185 }
186
187 /* ************************************************************************* */
MXC_PT_SetPattern(unsigned pts,uint32_t pattern)188 void MXC_PT_SetPattern(unsigned pts, uint32_t pattern)
189 {
190 MXC_PT_RevA_SetPattern(pts, pattern);
191 }
192
193 /* ************************************************************************* */
MXC_PT_EnableInt(mxc_ptg_regs_t * ptg,uint32_t pts)194 void MXC_PT_EnableInt(mxc_ptg_regs_t *ptg, uint32_t pts)
195 {
196 MXC_PT_RevA_EnableInt((mxc_ptg_reva_regs_t *)ptg, pts);
197 }
198
199 /* ************************************************************************* */
MXC_PT_DisableInt(mxc_ptg_regs_t * ptg,uint32_t pts)200 void MXC_PT_DisableInt(mxc_ptg_regs_t *ptg, uint32_t pts)
201 {
202 MXC_PT_RevA_DisableInt((mxc_ptg_reva_regs_t *)ptg, pts);
203 }
204
205 /* ************************************************************************* */
MXC_PT_GetFlags(mxc_ptg_regs_t * ptg)206 uint32_t MXC_PT_GetFlags(mxc_ptg_regs_t *ptg)
207 {
208 return MXC_PT_RevA_GetFlags((mxc_ptg_reva_regs_t *)ptg);
209 }
210
211 /* ************************************************************************* */
MXC_PT_ClearFlags(mxc_ptg_regs_t * ptg,uint32_t flags)212 void MXC_PT_ClearFlags(mxc_ptg_regs_t *ptg, uint32_t flags)
213 {
214 MXC_PT_RevA_ClearFlags((mxc_ptg_reva_regs_t *)ptg, flags);
215 }
216
217 /* ************************************************************************* */
MXC_PT_EnableRestart(unsigned start,unsigned stop,uint8_t restartIndex)218 void MXC_PT_EnableRestart(unsigned start, unsigned stop, uint8_t restartIndex)
219 {
220 MXC_PT_RevA_EnableRestart(start, stop, restartIndex);
221 }
222
223 /* ************************************************************************* */
MXC_PT_DisableRestart(unsigned channel,uint8_t restartIndex)224 void MXC_PT_DisableRestart(unsigned channel, uint8_t restartIndex)
225 {
226 MXC_PT_RevA_DisableRestart(channel, restartIndex);
227 }
228
229 /* ************************************************************************* */
MXC_PT_Resync(mxc_ptg_regs_t * ptg,uint32_t pts)230 void MXC_PT_Resync(mxc_ptg_regs_t *ptg, uint32_t pts)
231 {
232 MXC_PT_RevA_Resync((mxc_ptg_reva_regs_t *)ptg, pts);
233 }
234
