1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 /* **** Includes **** */
22 #include <string.h>
23 #include "owm_reva.h"
24
25 /* **** Definitions **** */
26 #define MXC_OWM_CLK_FREQ 1000000 //1-Wire requires 1MHz clock
27
28 /* **** Globals **** */
29
30 /* **** Functions **** */
31
MXC_OWM_Init(const mxc_owm_cfg_t * cfg)32 int MXC_OWM_Init(const mxc_owm_cfg_t *cfg)
33 {
34 int err = 0;
35 uint32_t mxc_owm_clk, clk_div = 0;
36
37 if (cfg == NULL) {
38 return E_NULL_PTR;
39 }
40
41 #ifndef MSDK_NO_GPIO_CLK_INIT
42 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_OWIRE);
43
44 if ((err = MXC_GPIO_Config(&gpio_cfg_owm)) != E_NO_ERROR) {
45 return err;
46 }
47 #endif
48
49 // Configure clk divisor to get 1MHz OWM clk
50 mxc_owm_clk = PeripheralClock;
51
52 if (mxc_owm_clk == 0) {
53 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
54 return E_UNINITIALIZED;
55 }
56
57 // Return error if clk doesn't divide evenly to 1MHz
58 if (mxc_owm_clk % MXC_OWM_CLK_FREQ) {
59 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
60 return E_NOT_SUPPORTED;
61 }
62
63 clk_div = (mxc_owm_clk / (MXC_OWM_CLK_FREQ));
64
65 // Can not support lower frequencies
66 if (clk_div == 0) {
67 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
68 return E_NOT_SUPPORTED;
69 }
70
71 err = MXC_OWM_RevA_Init((mxc_owm_reva_regs_t *)MXC_OWM, cfg);
72 if (err == E_BAD_PARAM) {
73 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
74 }
75
76 return err;
77 }
78
MXC_OWM_Shutdown(void)79 void MXC_OWM_Shutdown(void)
80 {
81 MXC_OWM_RevA_Shutdown((mxc_owm_reva_regs_t *)MXC_OWM);
82 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_OWIRE);
83 }
84
MXC_OWM_Reset(void)85 int MXC_OWM_Reset(void)
86 {
87 return MXC_OWM_RevA_Reset((mxc_owm_reva_regs_t *)MXC_OWM);
88 }
89
MXC_OWM_GetPresenceDetect(void)90 int MXC_OWM_GetPresenceDetect(void)
91 {
92 return (!!(MXC_OWM->ctrl_stat & MXC_F_OWM_CTRL_STAT_PRESENCE_DETECT));
93 }
94
MXC_OWM_TouchByte(uint8_t data)95 int MXC_OWM_TouchByte(uint8_t data)
96 {
97 return MXC_OWM_RevA_TouchByte((mxc_owm_reva_regs_t *)MXC_OWM, data);
98 }
99
MXC_OWM_WriteByte(uint8_t data)100 int MXC_OWM_WriteByte(uint8_t data)
101 {
102 return MXC_OWM_RevA_WriteByte(data);
103 }
104
MXC_OWM_ReadByte(void)105 int MXC_OWM_ReadByte(void)
106 {
107 return MXC_OWM_RevA_ReadByte();
108 }
109
MXC_OWM_TouchBit(uint8_t bit)110 int MXC_OWM_TouchBit(uint8_t bit)
111 {
112 return MXC_OWM_RevA_TouchBit((mxc_owm_reva_regs_t *)MXC_OWM, bit);
113 }
114
MXC_OWM_WriteBit(uint8_t bit)115 int MXC_OWM_WriteBit(uint8_t bit)
116 {
117 return MXC_OWM_RevA_WriteBit(bit);
118 }
119
MXC_OWM_ReadBit(void)120 int MXC_OWM_ReadBit(void)
121 {
122 return MXC_OWM_RevA_ReadBit();
123 }
124
MXC_OWM_Write(uint8_t * data,int len)125 int MXC_OWM_Write(uint8_t *data, int len)
126 {
127 return MXC_OWM_RevA_Write((mxc_owm_reva_regs_t *)MXC_OWM, data, len);
128 }
129
MXC_OWM_Read(uint8_t * data,int len)130 int MXC_OWM_Read(uint8_t *data, int len)
131 {
132 return MXC_OWM_RevA_Read((mxc_owm_reva_regs_t *)MXC_OWM, data, len);
133 }
134
MXC_OWM_ReadROM(uint8_t * ROMCode)135 int MXC_OWM_ReadROM(uint8_t *ROMCode)
136 {
137 return MXC_OWM_RevA_ReadROM(ROMCode);
138 }
139
MXC_OWM_MatchROM(uint8_t * ROMCode)140 int MXC_OWM_MatchROM(uint8_t *ROMCode)
141 {
142 return MXC_OWM_RevA_MatchROM(ROMCode);
143 }
144
MXC_OWM_ODMatchROM(uint8_t * ROMCode)145 int MXC_OWM_ODMatchROM(uint8_t *ROMCode)
146 {
147 return MXC_OWM_RevA_ODMatchROM((mxc_owm_reva_regs_t *)MXC_OWM, ROMCode);
148 }
149
MXC_OWM_SkipROM(void)150 int MXC_OWM_SkipROM(void)
151 {
152 return MXC_OWM_RevA_SkipROM();
153 }
154
MXC_OWM_ODSkipROM(void)155 int MXC_OWM_ODSkipROM(void)
156 {
157 return MXC_OWM_RevA_ODSkipROM((mxc_owm_reva_regs_t *)MXC_OWM);
158 }
159
MXC_OWM_Resume(void)160 int MXC_OWM_Resume(void)
161 {
162 return MXC_OWM_RevA_Resume();
163 }
164
MXC_OWM_SearchROM(int newSearch,uint8_t * ROMCode)165 int MXC_OWM_SearchROM(int newSearch, uint8_t *ROMCode)
166 {
167 return MXC_OWM_RevA_SearchROM((mxc_owm_reva_regs_t *)MXC_OWM, newSearch, ROMCode);
168 }
169
MXC_OWM_ClearFlags(uint32_t mask)170 void MXC_OWM_ClearFlags(uint32_t mask)
171 {
172 MXC_OWM_RevA_ClearFlags((mxc_owm_reva_regs_t *)MXC_OWM, mask);
173 }
174
MXC_OWM_GetFlags(void)175 unsigned MXC_OWM_GetFlags(void)
176 {
177 return MXC_OWM_RevA_GetFlags((mxc_owm_reva_regs_t *)MXC_OWM);
178 }
179
MXC_OWM_SetExtPullup(int enable)180 void MXC_OWM_SetExtPullup(int enable)
181 {
182 MXC_OWM_RevA_SetExtPullup((mxc_owm_reva_regs_t *)MXC_OWM, enable);
183 }
184
MXC_OWM_SetOverdrive(int enable)185 void MXC_OWM_SetOverdrive(int enable)
186 {
187 MXC_OWM_RevA_SetOverdrive((mxc_owm_reva_regs_t *)MXC_OWM, enable);
188 }
189
MXC_OWM_EnableInt(int flags)190 void MXC_OWM_EnableInt(int flags)
191 {
192 MXC_OWM_RevA_EnableInt((mxc_owm_reva_regs_t *)MXC_OWM, flags);
193 }
194
MXC_OWM_DisableInt(int flags)195 void MXC_OWM_DisableInt(int flags)
196 {
197 MXC_OWM_RevA_DisableInt((mxc_owm_reva_regs_t *)MXC_OWM, flags);
198 }
199
MXC_OWM_SetForcePresenceDetect(int enable)200 int MXC_OWM_SetForcePresenceDetect(int enable)
201 {
202 return MXC_OWM_RevA_SetForcePresenceDetect((mxc_owm_reva_regs_t *)MXC_OWM, enable);
203 }
204
MXC_OWM_SetInternalPullup(int enable)205 int MXC_OWM_SetInternalPullup(int enable)
206 {
207 return MXC_OWM_RevA_SetInternalPullup((mxc_owm_reva_regs_t *)MXC_OWM, enable);
208 }
209
MXC_OWM_SetExternalPullup(mxc_owm_ext_pu_t ext_pu_mode)210 int MXC_OWM_SetExternalPullup(mxc_owm_ext_pu_t ext_pu_mode)
211 {
212 return MXC_OWM_RevA_SetExternalPullup((mxc_owm_reva_regs_t *)MXC_OWM, ext_pu_mode);
213 }
214
MXC_OWM_SystemClockUpdated(void)215 int MXC_OWM_SystemClockUpdated(void)
216 {
217 return MXC_OWM_RevA_SystemClockUpdated((mxc_owm_reva_regs_t *)MXC_OWM);
218 }
219
MXC_OWM_SetSearchROMAccelerator(int enable)220 int MXC_OWM_SetSearchROMAccelerator(int enable)
221 {
222 return MXC_OWM_RevA_SetSearchROMAccelerator((mxc_owm_reva_regs_t *)MXC_OWM, enable);
223 }
224
MXC_OWM_BitBang_Init(int initialState)225 int MXC_OWM_BitBang_Init(int initialState)
226 {
227 return MXC_OWM_RevA_BitBang_Init((mxc_owm_reva_regs_t *)MXC_OWM, initialState);
228 }
229
MXC_OWM_BitBang_Read(void)230 int MXC_OWM_BitBang_Read(void)
231 {
232 return MXC_OWM_RevA_BitBang_Read((mxc_owm_reva_regs_t *)MXC_OWM);
233 }
234
MXC_OWM_BitBang_Write(int state)235 int MXC_OWM_BitBang_Write(int state)
236 {
237 return MXC_OWM_RevA_BitBang_Write((mxc_owm_reva_regs_t *)MXC_OWM, state);
238 }
239
MXC_OWM_BitBang_Disable(void)240 int MXC_OWM_BitBang_Disable(void)
241 {
242 return MXC_OWM_RevA_BitBang_Disable((mxc_owm_reva_regs_t *)MXC_OWM);
243 }
244