1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>I2C0</name> 5 <description>Inter-Integrated Circuit.</description> 6 <groupName>I2C</groupName> 7 <baseAddress>0x4001D000</baseAddress> 8 <size>32</size> 9 <addressBlock> 10 <offset>0x00</offset> 11 <size>0x1000</size> 12 <usage>registers</usage> 13 </addressBlock> 14 <interrupt> 15 <name>I2C0</name> 16 <description>I2C0 IRQ</description> 17 <value>13</value> 18 </interrupt> 19 <registers> 20 <register> 21 <name>CTRL0</name> 22 <description>Control Register 0.</description> 23 <addressOffset>0x00</addressOffset> 24 <fields> 25 <field> 26 <name>I2CEN</name> 27 <description>I2C Enable.</description> 28 <bitRange>[0:0]</bitRange> 29 <access>read-write</access> 30 <enumeratedValues> 31 <enumeratedValue> 32 <name>dis</name> 33 <description>Disable I2C.</description> 34 <value>0</value> 35 </enumeratedValue> 36 <enumeratedValue> 37 <name>en</name> 38 <description>enable I2C.</description> 39 <value>1</value> 40 </enumeratedValue> 41 </enumeratedValues> 42 </field> 43 <field> 44 <name>MST</name> 45 <description>Master Mode Enable.</description> 46 <bitRange>[1:1]</bitRange> 47 <access>read-write</access> 48 <enumeratedValues> 49 <enumeratedValue> 50 <name>slave_mode</name> 51 <description>Slave Mode.</description> 52 <value>0</value> 53 </enumeratedValue> 54 <enumeratedValue> 55 <name>master_mode</name> 56 <description>Master Mode.</description> 57 <value>1</value> 58 </enumeratedValue> 59 </enumeratedValues> 60 </field> 61 <field> 62 <name>GCEN</name> 63 <description>General Call Address Enable.</description> 64 <bitRange>[2:2]</bitRange> 65 <access>read-write</access> 66 <enumeratedValues> 67 <enumeratedValue> 68 <name>dis</name> 69 <description>Ignore Gneral Call Address.</description> 70 <value>0</value> 71 </enumeratedValue> 72 <enumeratedValue> 73 <name>en</name> 74 <description>Acknowledge general call address.</description> 75 <value>1</value> 76 </enumeratedValue> 77 </enumeratedValues> 78 </field> 79 <field> 80 <name>IRXM</name> 81 <description>Interactive Receive Mode.</description> 82 <bitRange>[3:3]</bitRange> 83 <access>read-write</access> 84 <enumeratedValues> 85 <enumeratedValue> 86 <name>dis</name> 87 <description>Disable Interactive Receive Mode.</description> 88 <value>0</value> 89 </enumeratedValue> 90 <enumeratedValue> 91 <name>en</name> 92 <description>Enable Interactive Receive Mode.</description> 93 <value>1</value> 94 </enumeratedValue> 95 </enumeratedValues> 96 </field> 97 <field> 98 <name>ACK</name> 99 <description>Data Acknowledge. This bit defines the acknowledge bit returned by the I2C receiver while IRXM = 1 HW forces ACK to 0 when IRXM = 0.</description> 100 <bitRange>[4:4]</bitRange> 101 <access>read-write</access> 102 <enumeratedValues> 103 <enumeratedValue> 104 <name>ack</name> 105 <description>return ACK (pulling SDA LOW).</description> 106 <value>0</value> 107 </enumeratedValue> 108 <enumeratedValue> 109 <name>nack</name> 110 <description>return NACK (leaving SDA HIGH).</description> 111 <value>1</value> 112 </enumeratedValue> 113 </enumeratedValues> 114 </field> 115 <field> 116 <name>SCL_OUT</name> 117 <description>SCL Output. This bits control SCL output when SWOE =1.</description> 118 <bitRange>[6:6]</bitRange> 119 <access>read-write</access> 120 <enumeratedValues> 121 <enumeratedValue> 122 <name>low</name> 123 <description>Drive SCL low. </description> 124 <value>0</value> 125 </enumeratedValue> 126 <enumeratedValue> 127 <name>high</name> 128 <description>Release SCL.</description> 129 <value>1</value> 130 </enumeratedValue> 131 </enumeratedValues> 132 </field> 133 <field> 134 <name>SDA_OUT</name> 135 <description>SDA Output. This bits control SDA output when SWOE = 1. </description> 136 <bitRange>[7:7]</bitRange> 137 <access>read-write</access> 138 <enumeratedValues> 139 <enumeratedValue> 140 <name>low</name> 141 <description>Drive SDA low. </description> 142 <value>0</value> 143 </enumeratedValue> 144 <enumeratedValue> 145 <name>high</name> 146 <description>Release SDA.</description> 147 <value>1</value> 148 </enumeratedValue> 149 </enumeratedValues> 150 </field> 151 <field> 152 <name>SCL</name> 153 <description>SCL status. This bit reflects the logic gate of SCL signal. </description> 154 <bitRange>[8:8]</bitRange> 155 <access>read-only</access> 156 <enumeratedValues> 157 <enumeratedValue> 158 <name>low</name> 159 <description>SCL pin is logic low.</description> 160 <value>0</value> 161 </enumeratedValue> 162 <enumeratedValue> 163 <name>high</name> 164 <description>SCL pin is logic high.</description> 165 <value>1</value> 166 </enumeratedValue> 167 </enumeratedValues> 168 </field> 169 <field> 170 <name>SDA</name> 171 <description>SDA status. THis bit reflects the logic gate of SDA signal.</description> 172 <bitRange>[9:9]</bitRange> 173 <access>read-only</access> 174 <enumeratedValues> 175 <enumeratedValue> 176 <name>low</name> 177 <description>SDA pin is logic low.</description> 178 <value>0</value> 179 </enumeratedValue> 180 <enumeratedValue> 181 <name>high</name> 182 <description>SDA pin is logic high.</description> 183 <value>1</value> 184 </enumeratedValue> 185 </enumeratedValues> 186 </field> 187 <field> 188 <name>SWOE</name> 189 <description>Software Output Enable.</description> 190 <bitRange>[10:10]</bitRange> 191 <access>read-write</access> 192 <enumeratedValues> 193 <enumeratedValue> 194 <name>dis</name> 195 <description>I2C Outputs SCLO and SDAO disabled. </description> 196 <value>0</value> 197 </enumeratedValue> 198 <enumeratedValue> 199 <name>en</name> 200 <description>I2C Outputs SCLO and SDAO enabled.</description> 201 <value>1</value> 202 </enumeratedValue> 203 </enumeratedValues> 204 </field> 205 <field> 206 <name>READ</name> 207 <description>Read. This bit reflects the R/W bit of an address match (AMI = 1) or general call match (GCI = 1). This bit is valid 3 cycles after the relevant interrupt bit is set.</description> 208 <bitRange>[11:11]</bitRange> 209 <access>read-only</access> 210 <enumeratedValues> 211 <enumeratedValue> 212 <name>write</name> 213 <description>Write.</description> 214 <value>0</value> 215 </enumeratedValue> 216 <enumeratedValue> 217 <name>read</name> 218 <description>Read.</description> 219 <value>1</value> 220 </enumeratedValue> 221 </enumeratedValues> 222 </field> 223 <field> 224 <name>SCL_STRD</name> 225 <description>This bit will disable slave clock stretching when set.</description> 226 <bitRange>[12:12]</bitRange> 227 <access>read-write</access> 228 <enumeratedValues> 229 <enumeratedValue> 230 <name>en</name> 231 <description>Slave clock stretching enabled.</description> 232 <value>0</value> 233 </enumeratedValue> 234 <enumeratedValue> 235 <name>dis</name> 236 <description>Slave clock stretching disabled.</description> 237 <value>1</value> 238 </enumeratedValue> 239 </enumeratedValues> 240 </field> 241 <field> 242 <name>SCL_PPM</name> 243 <description>SCL Push-Pull Mode. This bit controls whether SCL is operated in a the I2C standard open-drain mode, or in a non-standard push-pull mode where the Hi-Z output isreplaced with Drive-1. The non-standard mode should only be used when operating as a master and communicating with slaves that are guaranteed to never drive SCL low. </description> 244 <bitRange>[13:13]</bitRange> 245 <access>read-write</access> 246 <enumeratedValues> 247 <enumeratedValue> 248 <name>dis</name> 249 <description>Standard open-drain operation: drive low for 0, Hi-Z for 1</description> 250 <value>0</value> 251 </enumeratedValue> 252 <enumeratedValue> 253 <name>en</name> 254 <description>Non-standard push-pull operation: drive low for 0, drive high for 1</description> 255 <value>1</value> 256 </enumeratedValue> 257 </enumeratedValues> 258 </field> 259 </fields> 260 </register> 261 <register> 262 <name>STAT</name> 263 <description>Status Register.</description> 264 <addressOffset>0x04</addressOffset> 265 <fields> 266 <field> 267 <name>BUSY</name> 268 <description>Bus transaction active status bit.</description> 269 <bitRange>[0:0]</bitRange> 270 <access>read-only</access> 271 <enumeratedValues> 272 <enumeratedValue> 273 <name>idle</name> 274 <description>I2C Bus Idle.</description> 275 <value>0</value> 276 </enumeratedValue> 277 <enumeratedValue> 278 <name>busy</name> 279 <description>I2C Bus Busy.</description> 280 <value>1</value> 281 </enumeratedValue> 282 </enumeratedValues> 283 </field> 284 <field> 285 <name>RXE</name> 286 <description>RX FIFO empty.</description> 287 <bitRange>[1:1]</bitRange> 288 <access>read-only</access> 289 <enumeratedValues> 290 <enumeratedValue> 291 <name>not_empty</name> 292 <description>Not Empty.</description> 293 <value>0</value> 294 </enumeratedValue> 295 <enumeratedValue> 296 <name>empty</name> 297 <description>Empty.</description> 298 <value>1</value> 299 </enumeratedValue> 300 </enumeratedValues> 301 </field> 302 <field> 303 <name>RXF</name> 304 <description>RX FIFO full.</description> 305 <bitRange>[2:2]</bitRange> 306 <access>read-only</access> 307 <enumeratedValues> 308 <enumeratedValue> 309 <name>not_full</name> 310 <description>Not Full.</description> 311 <value>0</value> 312 </enumeratedValue> 313 <enumeratedValue> 314 <name>full</name> 315 <description>Full.</description> 316 <value>1</value> 317 </enumeratedValue> 318 </enumeratedValues> 319 </field> 320 <field> 321 <name>TXE</name> 322 <description>TX FIFO empty.</description> 323 <bitRange>[3:3]</bitRange> 324 <enumeratedValues> 325 <enumeratedValue> 326 <name>not_empty</name> 327 <description>Not Empty.</description> 328 <value>0</value> 329 </enumeratedValue> 330 <enumeratedValue> 331 <name>empty</name> 332 <description>Empty.</description> 333 <value>1</value> 334 </enumeratedValue> 335 </enumeratedValues> 336 </field> 337 <field> 338 <name>TXF</name> 339 <description>TX FIFO full.</description> 340 <bitRange>[4:4]</bitRange> 341 <enumeratedValues> 342 <enumeratedValue> 343 <name>not_full</name> 344 <description>Not Full.</description> 345 <value>0</value> 346 </enumeratedValue> 347 <enumeratedValue> 348 <name>full</name> 349 <description>Full.</description> 350 <value>1</value> 351 </enumeratedValue> 352 </enumeratedValues> 353 </field> 354 <field> 355 <name>CKMD</name> 356 <description>SCL Drive Status.</description> 357 <bitRange>[5:5]</bitRange> 358 <access>read-only</access> 359 <enumeratedValues> 360 <enumeratedValue> 361 <name>scl_not_active</name> 362 <description>Device not actively driving SCL clock cycles.</description> 363 <value>0</value> 364 </enumeratedValue> 365 <enumeratedValue> 366 <name>scl_active</name> 367 <description>Device operating as master and actively driving SCL clock cycles.</description> 368 <value>1</value> 369 </enumeratedValue> 370 </enumeratedValues> 371 </field> 372 </fields> 373 </register> 374 <register> 375 <name>INT_FL0</name> 376 <description>Interrupt Status Register.</description> 377 <addressOffset>0x08</addressOffset> 378 <fields> 379 <field> 380 <name>DONEI</name> 381 <description>Transfer Done Interrupt.</description> 382 <bitRange>[0:0]</bitRange> 383 <enumeratedValues> 384 <enumeratedValue> 385 <name>inactive</name> 386 <description>No Interrupt is Pending.</description> 387 <value>0</value> 388 </enumeratedValue> 389 <enumeratedValue> 390 <name>pending</name> 391 <description>An interrupt is pending.</description> 392 <value>1</value> 393 </enumeratedValue> 394 </enumeratedValues> 395 </field> 396 <field> 397 <name>IRXMI</name> 398 <description>Interactive Receive Interrupt.</description> 399 <bitRange>[1:1]</bitRange> 400 <enumeratedValues> 401 <enumeratedValue> 402 <name>inactive</name> 403 <description>No Interrupt is Pending.</description> 404 <value>0</value> 405 </enumeratedValue> 406 <enumeratedValue> 407 <name>pending</name> 408 <description>An interrupt is pending.</description> 409 <value>1</value> 410 </enumeratedValue> 411 </enumeratedValues> 412 </field> 413 <field> 414 <name>GCI</name> 415 <description>Slave General Call Address Match Interrupt.</description> 416 <bitRange>[2:2]</bitRange> 417 <enumeratedValues> 418 <enumeratedValue> 419 <name>inactive</name> 420 <description>No Interrupt is Pending.</description> 421 <value>0</value> 422 </enumeratedValue> 423 <enumeratedValue> 424 <name>pending</name> 425 <description>An interrupt is pending.</description> 426 <value>1</value> 427 </enumeratedValue> 428 </enumeratedValues> 429 </field> 430 <field> 431 <name>AMI</name> 432 <description>Slave Address Match Interrupt.</description> 433 <bitRange>[3:3]</bitRange> 434 <enumeratedValues> 435 <enumeratedValue> 436 <name>inactive</name> 437 <description>No Interrupt is Pending.</description> 438 <value>0</value> 439 </enumeratedValue> 440 <enumeratedValue> 441 <name>pending</name> 442 <description>An interrupt is pending.</description> 443 <value>1</value> 444 </enumeratedValue> 445 </enumeratedValues> 446 </field> 447 <field> 448 <name>RXTHI</name> 449 <description>Receive Threshold Interrupt. This bit is automaticcaly cleared when RX_FIFO is below the threshold level.</description> 450 <bitRange>[4:4]</bitRange> 451 <enumeratedValues> 452 <enumeratedValue> 453 <name>inactive</name> 454 <description>No interrupt is pending.</description> 455 <value>0</value> 456 </enumeratedValue> 457 <enumeratedValue> 458 <name>pending</name> 459 <description>An interrupt is pending. RX_FIFO equal or more bytes than the threshold.</description> 460 <value>1</value> 461 </enumeratedValue> 462 </enumeratedValues> 463 </field> 464 <field> 465 <name>TXTHI</name> 466 <description>Transmit Threshold Interrupt. This bit is automaticcaly cleared when TX_FIFO is above the threshold level.</description> 467 <bitRange>[5:5]</bitRange> 468 <enumeratedValues> 469 <enumeratedValue> 470 <name>inactive</name> 471 <description>No interrupt is pending.</description> 472 <value>0</value> 473 </enumeratedValue> 474 <enumeratedValue> 475 <name>pending</name> 476 <description>An interrupt is pending. TX_FIFO has equal or less bytes than the threshold.</description> 477 <value>1</value> 478 </enumeratedValue> 479 </enumeratedValues> 480 </field> 481 <field> 482 <name>STOPI</name> 483 <description>STOP Interrupt.</description> 484 <bitRange>[6:6]</bitRange> 485 <enumeratedValues> 486 <enumeratedValue> 487 <name>inactive</name> 488 <description>No interrupt is pending.</description> 489 <value>0</value> 490 </enumeratedValue> 491 <enumeratedValue> 492 <name>pending</name> 493 <description>An interrupt is pending. TX_FIFO has equal or less bytes than the threshold.</description> 494 <value>1</value> 495 </enumeratedValue> 496 </enumeratedValues> 497 </field> 498 <field> 499 <name>ADRACKI</name> 500 <description>Address Acknowledge Interrupt.</description> 501 <bitRange>[7:7]</bitRange> 502 <enumeratedValues> 503 <enumeratedValue> 504 <name>inactive</name> 505 <description>No Interrupt is Pending.</description> 506 <value>0</value> 507 </enumeratedValue> 508 <enumeratedValue> 509 <name>pending</name> 510 <description>An interrupt is pending.</description> 511 <value>1</value> 512 </enumeratedValue> 513 </enumeratedValues> 514 </field> 515 <field> 516 <name>ARBERI</name> 517 <description>Arbritation error Interrupt.</description> 518 <bitRange>[8:8]</bitRange> 519 <enumeratedValues> 520 <enumeratedValue> 521 <name>inactive</name> 522 <description>No Interrupt is Pending.</description> 523 <value>0</value> 524 </enumeratedValue> 525 <enumeratedValue> 526 <name>pending</name> 527 <description>An interrupt is pending.</description> 528 <value>1</value> 529 </enumeratedValue> 530 </enumeratedValues> 531 </field> 532 <field> 533 <name>TOERI</name> 534 <description>timeout Error Interrupt.</description> 535 <bitRange>[9:9]</bitRange> 536 <enumeratedValues> 537 <enumeratedValue> 538 <name>inactive</name> 539 <description>No Interrupt is Pending.</description> 540 <value>0</value> 541 </enumeratedValue> 542 <enumeratedValue> 543 <name>pending</name> 544 <description>An interrupt is pending.</description> 545 <value>1</value> 546 </enumeratedValue> 547 </enumeratedValues> 548 </field> 549 <field> 550 <name>ADRERI</name> 551 <description>Address NACK Error Interrupt.</description> 552 <bitRange>[10:10]</bitRange> 553 <enumeratedValues> 554 <enumeratedValue> 555 <name>inactive</name> 556 <description>No Interrupt is Pending.</description> 557 <value>0</value> 558 </enumeratedValue> 559 <enumeratedValue> 560 <name>pending</name> 561 <description>An interrupt is pending.</description> 562 <value>1</value> 563 </enumeratedValue> 564 </enumeratedValues> 565 </field> 566 <field> 567 <name>DATAERI</name> 568 <description>Data NACK Error Interrupt.</description> 569 <bitRange>[11:11]</bitRange> 570 <enumeratedValues> 571 <enumeratedValue> 572 <name>inactive</name> 573 <description>No Interrupt is Pending.</description> 574 <value>0</value> 575 </enumeratedValue> 576 <enumeratedValue> 577 <name>pending</name> 578 <description>An interrupt is pending.</description> 579 <value>1</value> 580 </enumeratedValue> 581 </enumeratedValues> 582 </field> 583 <field> 584 <name>DNRERI</name> 585 <description>Do Not Respond Error Interrupt.</description> 586 <bitRange>[12:12]</bitRange> 587 <enumeratedValues> 588 <enumeratedValue> 589 <name>inactive</name> 590 <description>No Interrupt is Pending.</description> 591 <value>0</value> 592 </enumeratedValue> 593 <enumeratedValue> 594 <name>pending</name> 595 <description>An interrupt is pending.</description> 596 <value>1</value> 597 </enumeratedValue> 598 </enumeratedValues> 599 </field> 600 <field> 601 <name>STRTERI</name> 602 <description>Start Error Interrupt.</description> 603 <bitRange>[13:13]</bitRange> 604 <enumeratedValues> 605 <enumeratedValue> 606 <name>inactive</name> 607 <description>No Interrupt is Pending.</description> 608 <value>0</value> 609 </enumeratedValue> 610 <enumeratedValue> 611 <name>pending</name> 612 <description>An interrupt is pending.</description> 613 <value>1</value> 614 </enumeratedValue> 615 </enumeratedValues> 616 </field> 617 <field> 618 <name>STOPERI</name> 619 <description>Stop Error Interrupt.</description> 620 <bitRange>[14:14]</bitRange> 621 <enumeratedValues> 622 <enumeratedValue> 623 <name>inactive</name> 624 <description>No Interrupt is Pending.</description> 625 <value>0</value> 626 </enumeratedValue> 627 <enumeratedValue> 628 <name>pending</name> 629 <description>An interrupt is pending.</description> 630 <value>1</value> 631 </enumeratedValue> 632 </enumeratedValues> 633 </field> 634 <field> 635 <name>TXLOI</name> 636 <description>Transmit Lock Out Interrupt.</description> 637 <bitRange>[15:15]</bitRange> 638 <enumeratedValues> 639 <enumeratedValue> 640 <name>inactive</name> 641 <description>No Interrupt is Pending.</description> 642 <value>0</value> 643 </enumeratedValue> 644 <enumeratedValue> 645 <name>pending</name> 646 <description>An interrupt is pending.</description> 647 <value>1</value> 648 </enumeratedValue> 649 </enumeratedValues> 650 </field> 651 </fields> 652 </register> 653 <register> 654 <name>INT_EN0</name> 655 <description>Interrupt Enable Register.</description> 656 <addressOffset>0x0C</addressOffset> 657 <access>read-write</access> 658 <fields> 659 <field> 660 <name>DONEIE</name> 661 <description>Transfer Done Interrupt Enable.</description> 662 <bitRange>[0:0]</bitRange> 663 <access>read-write</access> 664 <enumeratedValues> 665 <enumeratedValue> 666 <name>dis</name> 667 <description>Interrupt disabled.</description> 668 <value>0</value> 669 </enumeratedValue> 670 <enumeratedValue> 671 <name>en</name> 672 <description>Interrupt enabled when DONE = 1.</description> 673 <value>1</value> 674 </enumeratedValue> 675 </enumeratedValues> 676 </field> 677 <field> 678 <name>IRXMIE</name> 679 <description>Description not available.</description> 680 <bitRange>[1:1]</bitRange> 681 <access>read-write</access> 682 <enumeratedValues> 683 <enumeratedValue> 684 <name>dis</name> 685 <description>Interrupt disabled.</description> 686 <value>0</value> 687 </enumeratedValue> 688 <enumeratedValue> 689 <name>en</name> 690 <description>Interrupt enabled when RX_MODE = 1.</description> 691 <value>1</value> 692 </enumeratedValue> 693 </enumeratedValues> 694 </field> 695 <field> 696 <name>GCIE</name> 697 <description>Slave mode general call address match received input enable.</description> 698 <bitRange>[2:2]</bitRange> 699 <access>read-write</access> 700 <enumeratedValues> 701 <enumeratedValue> 702 <name>dis</name> 703 <description>Interrupt disabled.</description> 704 <value>0</value> 705 </enumeratedValue> 706 <enumeratedValue> 707 <name>en</name> 708 <description>Interrupt enabled when GEN_CTRL_ADDR = 1.</description> 709 <value>1</value> 710 </enumeratedValue> 711 </enumeratedValues> 712 </field> 713 <field> 714 <name>AMIE</name> 715 <description>Slave mode incoming address match interrupt.</description> 716 <bitRange>[3:3]</bitRange> 717 <access>read-write</access> 718 <enumeratedValues> 719 <enumeratedValue> 720 <name>dis</name> 721 <description>Interrupt disabled.</description> 722 <value>0</value> 723 </enumeratedValue> 724 <enumeratedValue> 725 <name>en</name> 726 <description>Interrupt enabled when ADDR_MATCH = 1.</description> 727 <value>1</value> 728 </enumeratedValue> 729 </enumeratedValues> 730 </field> 731 <field> 732 <name>RXTHIE</name> 733 <description>RX FIFO Above Treshold Level Interrupt Enable.</description> 734 <bitRange>[4:4]</bitRange> 735 <access>read-write</access> 736 <enumeratedValues> 737 <enumeratedValue> 738 <name>dis</name> 739 <description>Interrupt disabled.</description> 740 <value>0</value> 741 </enumeratedValue> 742 <enumeratedValue> 743 <name>en</name> 744 <description>Interrupt enabled.</description> 745 <value>1</value> 746 </enumeratedValue> 747 </enumeratedValues> 748 </field> 749 <field> 750 <name>TXTHIE</name> 751 <description>TX FIFO Below Treshold Level Interrupt Enable.</description> 752 <bitRange>[5:5]</bitRange> 753 <enumeratedValues> 754 <enumeratedValue> 755 <name>dis</name> 756 <description>Interrupt disabled.</description> 757 <value>0</value> 758 </enumeratedValue> 759 <enumeratedValue> 760 <name>en</name> 761 <description>Interrupt enabled.</description> 762 <value>1</value> 763 </enumeratedValue> 764 </enumeratedValues> 765 </field> 766 <field> 767 <name>STOPIE</name> 768 <description>Stop Interrupt Enable</description> 769 <bitRange>[6:6]</bitRange> 770 <access>read-write</access> 771 <enumeratedValues> 772 <enumeratedValue> 773 <name>dis</name> 774 <description>Interrupt disabled.</description> 775 <value>0</value> 776 </enumeratedValue> 777 <enumeratedValue> 778 <name>en</name> 779 <description>Interrupt enabled when STOP = 1.</description> 780 <value>1</value> 781 </enumeratedValue> 782 </enumeratedValues> 783 </field> 784 <field> 785 <name>ADRACKIE</name> 786 <description>Received Address ACK from Slave Interrupt.</description> 787 <bitRange>[7:7]</bitRange> 788 <enumeratedValues> 789 <enumeratedValue> 790 <name>dis</name> 791 <description>Interrupt disabled.</description> 792 <value>0</value> 793 </enumeratedValue> 794 <enumeratedValue> 795 <name>en</name> 796 <description>Interrupt enabled.</description> 797 <value>1</value> 798 </enumeratedValue> 799 </enumeratedValues> 800 </field> 801 <field> 802 <name>ARBERIE</name> 803 <description>Master Mode Arbitration Lost Interrupt.</description> 804 <bitRange>[8:8]</bitRange> 805 <enumeratedValues> 806 <enumeratedValue> 807 <name>dis</name> 808 <description>Interrupt disabled.</description> 809 <value>0</value> 810 </enumeratedValue> 811 <enumeratedValue> 812 <name>en</name> 813 <description>Interrupt enabled.</description> 814 <value>1</value> 815 </enumeratedValue> 816 </enumeratedValues> 817 </field> 818 <field> 819 <name>TOERIE</name> 820 <description>Timeout Error Interrupt Enable.</description> 821 <bitRange>[9:9]</bitRange> 822 <enumeratedValues> 823 <enumeratedValue> 824 <name>dis</name> 825 <description>Interrupt disabled.</description> 826 <value>0</value> 827 </enumeratedValue> 828 <enumeratedValue> 829 <name>en</name> 830 <description>Interrupt enabled.</description> 831 <value>1</value> 832 </enumeratedValue> 833 </enumeratedValues> 834 </field> 835 <field> 836 <name>ADRERIE</name> 837 <description>Master Mode Address NACK Received Interrupt.</description> 838 <bitRange>[10:10]</bitRange> 839 <enumeratedValues> 840 <enumeratedValue> 841 <name>dis</name> 842 <description>Interrupt disabled.</description> 843 <value>0</value> 844 </enumeratedValue> 845 <enumeratedValue> 846 <name>en</name> 847 <description>Interrupt enabled.</description> 848 <value>1</value> 849 </enumeratedValue> 850 </enumeratedValues> 851 </field> 852 <field> 853 <name>DATAERIE</name> 854 <description>Master Mode Data NACK Received Interrupt.</description> 855 <bitRange>[11:11]</bitRange> 856 <enumeratedValues> 857 <enumeratedValue> 858 <name>dis</name> 859 <description>Interrupt disabled.</description> 860 <value>0</value> 861 </enumeratedValue> 862 <enumeratedValue> 863 <name>en</name> 864 <description>Interrupt enabled.</description> 865 <value>1</value> 866 </enumeratedValue> 867 </enumeratedValues> 868 </field> 869 <field> 870 <name>DNRERIE</name> 871 <description>Slave Mode Do Not Respond Interrupt.</description> 872 <bitRange>[12:12]</bitRange> 873 <enumeratedValues> 874 <enumeratedValue> 875 <name>dis</name> 876 <description>Interrupt disabled.</description> 877 <value>0</value> 878 </enumeratedValue> 879 <enumeratedValue> 880 <name>en</name> 881 <description>Interrupt enabled.</description> 882 <value>1</value> 883 </enumeratedValue> 884 </enumeratedValues> 885 </field> 886 <field> 887 <name>STRTERIE</name> 888 <description>Out of Sequence START condition detected interrupt.</description> 889 <bitRange>[13:13]</bitRange> 890 <enumeratedValues> 891 <enumeratedValue> 892 <name>dis</name> 893 <description>Interrupt disabled.</description> 894 <value>0</value> 895 </enumeratedValue> 896 <enumeratedValue> 897 <name>en</name> 898 <description>Interrupt enabled.</description> 899 <value>1</value> 900 </enumeratedValue> 901 </enumeratedValues> 902 </field> 903 <field> 904 <name>STOPERIE</name> 905 <description>Out of Sequence STOP condition detected interrupt.</description> 906 <bitRange>[14:14]</bitRange> 907 <enumeratedValues> 908 <enumeratedValue> 909 <name>dis</name> 910 <description>Interrupt disabled.</description> 911 <value>0</value> 912 </enumeratedValue> 913 <enumeratedValue> 914 <name>en</name> 915 <description>Interrupt enabled.</description> 916 <value>1</value> 917 </enumeratedValue> 918 </enumeratedValues> 919 </field> 920 <field> 921 <name>TXLOIE</name> 922 <description>TX FIFO Locked Out Interrupt.</description> 923 <bitRange>[15:15]</bitRange> 924 <enumeratedValues> 925 <enumeratedValue> 926 <name>dis</name> 927 <description>Interrupt disabled.</description> 928 <value>0</value> 929 </enumeratedValue> 930 <enumeratedValue> 931 <name>en</name> 932 <description>Interrupt enabled.</description> 933 <value>1</value> 934 </enumeratedValue> 935 </enumeratedValues> 936 </field> 937 </fields> 938 </register> 939 <register> 940 <name>INT_FL1</name> 941 <description>Interrupt Status Register 1.</description> 942 <addressOffset>0x10</addressOffset> 943 <fields> 944 <field> 945 <name>RXOFI</name> 946 <description>Receiver Overflow Interrupt. When operating as a slave receiver, this bit is set when you reach the first data bit and the RX FIFO and shift register are both full.</description> 947 <bitRange>[0:0]</bitRange> 948 <enumeratedValues> 949 <enumeratedValue> 950 <name>inactive</name> 951 <description>No Interrupt is Pending.</description> 952 <value>0</value> 953 </enumeratedValue> 954 <enumeratedValue> 955 <name>pending</name> 956 <description>An interrupt is pending.</description> 957 <value>1</value> 958 </enumeratedValue> 959 </enumeratedValues> 960 </field> 961 <field> 962 <name>TXUFI</name> 963 <description>Transmit Underflow Interrupt. When operating as a slave transmitter, this bit is set when you reach the first data bit and the TX FIFO is empty and the master is still asking for more data (i.e the master hasn't sent a NACK yet).</description> 964 <bitRange>[1:1]</bitRange> 965 <enumeratedValues> 966 <enumeratedValue> 967 <name>inactive</name> 968 <description>No Interrupt is Pending.</description> 969 <value>0</value> 970 </enumeratedValue> 971 <enumeratedValue> 972 <name>pending</name> 973 <description>An interrupt is pending.</description> 974 <value>1</value> 975 </enumeratedValue> 976 </enumeratedValues> 977 </field> 978 </fields> 979 </register> 980 <register> 981 <name>INT_EN1</name> 982 <description>Interrupt Staus Register 1.</description> 983 <addressOffset>0x14</addressOffset> 984 <access>read-write</access> 985 <fields> 986 <field> 987 <name>RXOFIE</name> 988 <description>Receiver Overflow Interrupt Enable.</description> 989 <bitRange>[0:0]</bitRange> 990 <enumeratedValues> 991 <enumeratedValue> 992 <name>dis</name> 993 <description>No Interrupt is Pending.</description> 994 <value>0</value> 995 </enumeratedValue> 996 <enumeratedValue> 997 <name>en</name> 998 <description>An interrupt is pending.</description> 999 <value>1</value> 1000 </enumeratedValue> 1001 </enumeratedValues> 1002 </field> 1003 <field> 1004 <name>TXUFIE</name> 1005 <description>Transmit Underflow Interrupt Enable.</description> 1006 <bitRange>[1:1]</bitRange> 1007 <enumeratedValues> 1008 <enumeratedValue> 1009 <name>dis</name> 1010 <description>No Interrupt is Pending.</description> 1011 <value>0</value> 1012 </enumeratedValue> 1013 <enumeratedValue> 1014 <name>en</name> 1015 <description>An interrupt is pending.</description> 1016 <value>1</value> 1017 </enumeratedValue> 1018 </enumeratedValues> 1019 </field> 1020 </fields> 1021 </register> 1022 <register> 1023 <name>FIFO_LEN</name> 1024 <description>FIFO Configuration Register.</description> 1025 <addressOffset>0x18</addressOffset> 1026 <fields> 1027 <field> 1028 <name>RXLEN</name> 1029 <description>Receive FIFO Length.</description> 1030 <bitRange>[7:0]</bitRange> 1031 <access>read-only</access> 1032 </field> 1033 <field> 1034 <name>TXLEN</name> 1035 <description>Transmit FIFO Length.</description> 1036 <bitRange>[15:8]</bitRange> 1037 <access>read-only</access> 1038 </field> 1039 </fields> 1040 </register> 1041 <register> 1042 <name>RX_CTRL0</name> 1043 <description>Receive Control Register 0.</description> 1044 <addressOffset>0x1C</addressOffset> 1045 <fields> 1046 <field> 1047 <name>DNR</name> 1048 <description>Do Not Respond.</description> 1049 <bitRange>[0:0]</bitRange> 1050 <enumeratedValues> 1051 <enumeratedValue> 1052 <name>respond</name> 1053 <description>Always respond to address match.</description> 1054 <value>0</value> 1055 </enumeratedValue> 1056 <enumeratedValue> 1057 <name>dont_respond</name> 1058 <description>Do not respond to address match when RX_FIFO is not empty.</description> 1059 <value>1</value> 1060 </enumeratedValue> 1061 </enumeratedValues> 1062 </field> 1063 <field> 1064 <name>RXFSH</name> 1065 <description>Receive FIFO Flush. This bit is automatically cleared to 0 after the operation. Setting this bit to 1 will affect RX_FIFO status.</description> 1066 <bitRange>[7:7]</bitRange> 1067 <enumeratedValues> 1068 <enumeratedValue> 1069 <name>not_flushed</name> 1070 <description>FIFO not flushed.</description> 1071 <value>0</value> 1072 </enumeratedValue> 1073 <enumeratedValue> 1074 <name>flush</name> 1075 <description>Flush RX_FIFO.</description> 1076 <value>1</value> 1077 </enumeratedValue> 1078 </enumeratedValues> 1079 </field> 1080 <field> 1081 <name>RXTH</name> 1082 <description>Receive FIFO Threshold. These bits define the RX_FIFO interrupt threshold.</description> 1083 <bitRange>[11:8]</bitRange> 1084 </field> 1085 </fields> 1086 </register> 1087 <register> 1088 <name>RX_CTRL1</name> 1089 <description>Receive Control Register 1.</description> 1090 <addressOffset>0x20</addressOffset> 1091 <fields> 1092 <field> 1093 <name>RXCNT</name> 1094 <description>Receive Count Bits. These bits define the number of bytes to be received in a transaction, except for the case RXCNT = 0. RXCNT = 0 means 256 bytes to be received in a transaction.</description> 1095 <bitRange>[7:0]</bitRange> 1096 </field> 1097 <field> 1098 <name>RXFIFO</name> 1099 <description>Receive FIFO Count. These bits reflect the number of byte in the RX_FIFO. These bits are flushed when I2CEN = 0.</description> 1100 <bitRange>[11:8]</bitRange> 1101 <access>read-only</access> 1102 </field> 1103 </fields> 1104 </register> 1105 <register> 1106 <name>TX_CTRL0</name> 1107 <description>Transmit Control Register 0.</description> 1108 <addressOffset>0x24</addressOffset> 1109 <fields> 1110 <field> 1111 <name>TXPRELD</name> 1112 <description>Transmit FIFO Preaload Mode. Setting this bit will allow for high speed application to preload the transmit FIFO prior to Slave Address Match.</description> 1113 <bitRange>[0:0]</bitRange> 1114 <enumeratedValues> 1115 <enumeratedValue> 1116 <name>normal</name> 1117 <description>Normal TX FIFO Operation.</description> 1118 <value>0</value> 1119 </enumeratedValue> 1120 <enumeratedValue> 1121 <name>preload</name> 1122 <description>TX FIFO Preload mode.</description> 1123 <value>1</value> 1124 </enumeratedValue> 1125 </enumeratedValues> 1126 </field> 1127 <field> 1128 <name>TXFSH</name> 1129 <description>Transmit FIFO Flush. This bit is automatically cleared to 0 after the operation.</description> 1130 <bitRange>[7:7]</bitRange> 1131 <enumeratedValues> 1132 <enumeratedValue> 1133 <name>not_flushed</name> 1134 <description>FIFO not flushed.</description> 1135 <value>0</value> 1136 </enumeratedValue> 1137 <enumeratedValue> 1138 <name>flush</name> 1139 <description>Flush TX_FIFO.</description> 1140 <value>1</value> 1141 </enumeratedValue> 1142 </enumeratedValues> 1143 </field> 1144 <field> 1145 <name>TXTH</name> 1146 <description>Transmit FIFO Threshold. These bits define the TX_FIFO interrupt threshold.</description> 1147 <bitRange>[11:8]</bitRange> 1148 </field> 1149 </fields> 1150 </register> 1151 <register> 1152 <name>TX_CTRL1</name> 1153 <description>Transmit Control Register 1.</description> 1154 <addressOffset>0x28</addressOffset> 1155 <fields> 1156 <field> 1157 <name>TXRDY</name> 1158 <description>Transmit FIFO Preload Ready.</description> 1159 <bitRange>[0:0]</bitRange> 1160 <enumeratedValues> 1161 <enumeratedValue> 1162 <name>not_ready</name> 1163 <description>TX FIFO not ready to transmit preloaded data.</description> 1164 <value>0</value> 1165 </enumeratedValue> 1166 <enumeratedValue> 1167 <name>ready</name> 1168 <description>TX FIFO ready to transmit preloaded data.</description> 1169 <value>1</value> 1170 </enumeratedValue> 1171 </enumeratedValues> 1172 </field> 1173 <field> 1174 <name>TXLAST</name> 1175 <description>Slave mode transmit last.</description> 1176 <bitRange>[1:1]</bitRange> 1177 <enumeratedValues> 1178 <enumeratedValue> 1179 <name>pause_on_last</name> 1180 <description>Hold SCL low after transmitting the last character in the TX FIFO until more characters are loaded.</description> 1181 <value>0</value> 1182 </enumeratedValue> 1183 <enumeratedValue> 1184 <name>end_on_last</name> 1185 <description>Release SCL after transmitting the last character in the TXT FIFO.</description> 1186 <value>1</value> 1187 </enumeratedValue> 1188 </enumeratedValues> 1189 </field> 1190 <field> 1191 <name>TXFIFO</name> 1192 <description>Transmit FIFO Count. These bits reflect the number of bytes in the TX_FIFO.</description> 1193 <bitRange>[11:8]</bitRange> 1194 <access>read-only</access> 1195 </field> 1196 </fields> 1197 </register> 1198 <register> 1199 <name>FIFO</name> 1200 <description>Data Register.</description> 1201 <addressOffset>0x2C</addressOffset> 1202 <fields> 1203 <field> 1204 <name>DATA</name> 1205 <description>Data is read from or written to this location. Transmit and receive FIFO are separate but both are addressed at this location.</description> 1206 <bitOffset>0</bitOffset> 1207 <bitWidth>8</bitWidth> 1208 </field> 1209 </fields> 1210 </register> 1211 <register> 1212 <name>MSTR_MODE</name> 1213 <description>Master Control Register.</description> 1214 <addressOffset>0x30</addressOffset> 1215 <fields> 1216 <field> 1217 <name>START</name> 1218 <description>Setting this bit to 1 will start a master transfer.</description> 1219 <bitRange>[0:0]</bitRange> 1220 <enumeratedValues> 1221 <enumeratedValue> 1222 <name>start</name> 1223 <description>Start Master Mode transfer.</description> 1224 <value>1</value> 1225 </enumeratedValue> 1226 </enumeratedValues> 1227 </field> 1228 <field> 1229 <name>RESTART</name> 1230 <description>Setting this bit to 1 will generate a repeated START.</description> 1231 <bitRange>[1:1]</bitRange> 1232 <enumeratedValues> 1233 <enumeratedValue> 1234 <name>restart</name> 1235 <description>Send a repeated start bit.</description> 1236 <value>1</value> 1237 </enumeratedValue> 1238 </enumeratedValues> 1239 </field> 1240 <field> 1241 <name>STOP</name> 1242 <description>Setting this bit to 1 will generate a STOP condition.</description> 1243 <bitRange>[2:2]</bitRange> 1244 <enumeratedValues> 1245 <enumeratedValue> 1246 <name>stop</name> 1247 <description>Send a stop condition.</description> 1248 <value>1</value> 1249 </enumeratedValue> 1250 </enumeratedValues> 1251 </field> 1252 <field> 1253 <name>SEA</name> 1254 <description>Slave Extend Address Select.</description> 1255 <bitRange>[7:7]</bitRange> 1256 <enumeratedValues> 1257 <enumeratedValue> 1258 <name>7BIT_ADDR</name> 1259 <description>7-bit address.</description> 1260 <value>0</value> 1261 </enumeratedValue> 1262 <enumeratedValue> 1263 <name>10BIT_ADDR</name> 1264 <description>10-bit address.</description> 1265 <value>1</value> 1266 </enumeratedValue> 1267 </enumeratedValues> 1268 </field> 1269 </fields> 1270 </register> 1271 <register> 1272 <name>CLK_LO</name> 1273 <description>Clock Low Register.</description> 1274 <addressOffset>0x34</addressOffset> 1275 <fields> 1276 <field> 1277 <name>SCL_LO</name> 1278 <description>Clock low. In master mode, these bits define the SCL low period. In slave mode, these bits define the time SCL will be held low after data is outputted.</description> 1279 <bitRange>[8:0]</bitRange> 1280 </field> 1281 </fields> 1282 </register> 1283 <register> 1284 <name>CLK_HI</name> 1285 <description>Clock high Register.</description> 1286 <addressOffset>0x38</addressOffset> 1287 <fields> 1288 <field> 1289 <name>SCL_HI</name> 1290 <description>Clock High. In master mode, these bits define the SCL high period.</description> 1291 <bitRange>[8:0]</bitRange> 1292 </field> 1293 </fields> 1294 </register> 1295 <register> 1296 <name>TIMEOUT</name> 1297 <description>Timeout Register</description> 1298 <addressOffset>0x40</addressOffset> 1299 <fields> 1300 <field> 1301 <name>TO</name> 1302 <description>SCL Timeout Period</description> 1303 <bitRange>[15:0]</bitRange> 1304 </field> 1305 </fields> 1306 </register> 1307 <register> 1308 <name>SLV_ADDR</name> 1309 <description>Slave Address Register.</description> 1310 <addressOffset>0x44</addressOffset> 1311 <fields> 1312 <field> 1313 <name>SLA</name> 1314 <description>Slave Address.</description> 1315 <bitRange>[9:0]</bitRange> 1316 </field> 1317 <field> 1318 <name>EA</name> 1319 <description>Slave Mode Extended Address Select.</description> 1320 <bitRange>[15:15]</bitRange> 1321 <enumeratedValues> 1322 <enumeratedValue> 1323 <name>7BIT_ADDR</name> 1324 <description>7-bit address.</description> 1325 <value>0</value> 1326 </enumeratedValue> 1327 <enumeratedValue> 1328 <name>10BIT_ADDR</name> 1329 <description>10-bit address.</description> 1330 <value>1</value> 1331 </enumeratedValue> 1332 </enumeratedValues> 1333 </field> 1334 </fields> 1335 </register> 1336 <register> 1337 <name>DMA</name> 1338 <description>DMA Register.</description> 1339 <addressOffset>0x48</addressOffset> 1340 <fields> 1341 <field> 1342 <name>TXEN</name> 1343 <description>TX channel enable.</description> 1344 <bitRange>[0:0]</bitRange> 1345 <enumeratedValues> 1346 <enumeratedValue> 1347 <name>dis</name> 1348 <description>Disable.</description> 1349 <value>0</value> 1350 </enumeratedValue> 1351 <enumeratedValue> 1352 <name>en</name> 1353 <description>Enable.</description> 1354 <value>1</value> 1355 </enumeratedValue> 1356 </enumeratedValues> 1357 </field> 1358 <field> 1359 <name>RXEN</name> 1360 <description>RX channel enable.</description> 1361 <bitRange>[1:1]</bitRange> 1362 <enumeratedValues> 1363 <enumeratedValue> 1364 <name>dis</name> 1365 <description>Disable.</description> 1366 <value>0</value> 1367 </enumeratedValue> 1368 <enumeratedValue> 1369 <name>en</name> 1370 <description>Enable.</description> 1371 <value>1</value> 1372 </enumeratedValue> 1373 </enumeratedValues> 1374 </field> 1375 </fields> 1376 </register> 1377 </registers> 1378 </peripheral> 1379<!-- I2C1: Inter-Intergrated Circuit 1 --> 1380</device> 1381
