1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include <stdio.h>
22 #include <stddef.h>
23 #include <stdint.h>
24 #include "mxc_device.h"
25 #include "mxc_assert.h"
26 #include "mxc_lock.h"
27 #include "mxc_sys.h"
28 #include "mxc_delay.h"
29 #include "i2c_regs.h"
30 #include "dma_regs.h"
31 #include "i2c.h"
32 #include "i2c_reva.h"
33
34 /* **** Variable Declaration **** */
35 uint32_t interruptCheck = MXC_F_I2C_INTFL0_ADDR_MATCH | MXC_F_I2C_INTFL0_DNR_ERR;
36
37 /* **** Function Prototypes **** */
38
39 /* ************************************************************************* */
40 /* Control/Configuration functions */
41 /* ************************************************************************* */
MXC_I2C_Init(mxc_i2c_regs_t * i2c,int masterMode,unsigned int slaveAddr)42 int MXC_I2C_Init(mxc_i2c_regs_t *i2c, int masterMode, unsigned int slaveAddr)
43 {
44 if (i2c == NULL) {
45 return E_NULL_PTR;
46 }
47
48 #ifndef MSDK_NO_GPIO_CLK_INIT
49 MXC_I2C_Shutdown(i2c); // Clear everything out
50
51 /* Note: The ME18 assigns the same alternate function to multiple sets
52 * of pins. The drivers will enable both sets so that either can be used.
53 * Users should ensure the unused set is left unconnected.
54 *
55 * See MAX32690 Rev A2 Errata #16:
56 * https://www.analog.com/media/en/technical-documentation/data-sheets/max32690_a2_errata_rev2.pdf
57 */
58 if (i2c == MXC_I2C0) {
59 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C0);
60 MXC_GPIO_Config(&gpio_cfg_i2c0);
61 MXC_GPIO_Config(&gpio_cfg_i2c0a);
62 } else if (i2c == MXC_I2C1) {
63 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C1);
64 MXC_GPIO_Config(&gpio_cfg_i2c1);
65 MXC_GPIO_Config(&gpio_cfg_i2c1a);
66 } else if (i2c == MXC_I2C2) {
67 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C2);
68 MXC_GPIO_Config(&gpio_cfg_i2c2);
69 MXC_GPIO_Config(&gpio_cfg_i2c2c);
70 } else {
71 return E_NO_DEVICE;
72 }
73 #endif // MSDK_NO_GPIO_CLK_INIT
74
75 return MXC_I2C_RevA_Init((mxc_i2c_reva_regs_t *)i2c, masterMode, slaveAddr);
76 }
77
MXC_I2C_SetSlaveAddr(mxc_i2c_regs_t * i2c,unsigned int slaveAddr,int idx)78 int MXC_I2C_SetSlaveAddr(mxc_i2c_regs_t *i2c, unsigned int slaveAddr, int idx)
79 {
80 if (idx != 0) {
81 // MAX32690 does not support multiple slave addresses
82 return E_NOT_SUPPORTED;
83 }
84
85 return MXC_I2C_RevA_SetSlaveAddr((mxc_i2c_reva_regs_t *)i2c, slaveAddr, idx);
86 }
87
MXC_I2C_Shutdown(mxc_i2c_regs_t * i2c)88 int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
89 {
90 // Configure GPIO for I2C
91 if (i2c == MXC_I2C0) {
92 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C0);
93 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_I2C0);
94 } else if (i2c == MXC_I2C1) {
95 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C1);
96 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C1);
97 } else if (i2c == MXC_I2C2) {
98 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C2);
99 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C2);
100 } else {
101 return E_NO_DEVICE;
102 }
103
104 return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
105 }
106
MXC_I2C_Reset(mxc_i2c_regs_t * i2c)107 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
108 {
109 // Configure GPIO for I2C
110 if (i2c == MXC_I2C0) {
111 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_I2C0);
112 } else if (i2c == MXC_I2C1) {
113 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C1);
114 } else if (i2c == MXC_I2C2) {
115 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C2);
116 } else {
117 return E_NO_DEVICE;
118 }
119
120 return E_NO_ERROR;
121 }
122
MXC_I2C_SetFrequency(mxc_i2c_regs_t * i2c,unsigned int hz)123 int MXC_I2C_SetFrequency(mxc_i2c_regs_t *i2c, unsigned int hz)
124 {
125 return MXC_I2C_RevA_SetFrequency((mxc_i2c_reva_regs_t *)i2c, hz);
126 }
127
MXC_I2C_GetFrequency(mxc_i2c_regs_t * i2c)128 int MXC_I2C_GetFrequency(mxc_i2c_regs_t *i2c)
129 {
130 return MXC_I2C_RevA_GetFrequency((mxc_i2c_reva_regs_t *)i2c);
131 }
132
MXC_I2C_ReadyForSleep(mxc_i2c_regs_t * i2c)133 int MXC_I2C_ReadyForSleep(mxc_i2c_regs_t *i2c)
134 {
135 return MXC_I2C_RevA_ReadyForSleep((mxc_i2c_reva_regs_t *)i2c);
136 }
137
MXC_I2C_SetClockStretching(mxc_i2c_regs_t * i2c,int enable)138 int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable)
139 {
140 return MXC_I2C_RevA_SetClockStretching((mxc_i2c_reva_regs_t *)i2c, enable);
141 }
142
MXC_I2C_GetClockStretching(mxc_i2c_regs_t * i2c)143 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
144 {
145 return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
146 }
147
MXC_I2C_DMA_Init(mxc_i2c_regs_t * i2c,mxc_dma_regs_t * dma,bool use_dma_tx,bool use_dma_rx)148 int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
149 {
150 return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
151 use_dma_rx);
152 }
153
MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t * i2c)154 int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
155 {
156 return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
157 }
158
MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t * i2c)159 int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
160 {
161 return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
162 }
163
MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t * i2c,uint8_t * txData,uint8_t * rxData)164 int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
165 {
166 int i2cNum;
167 int txReqSel = -1;
168 int rxReqSel = -1;
169
170 if (i2c == NULL) {
171 return E_NULL_PTR;
172 }
173
174 i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
175
176 if (txData != NULL) {
177 switch (i2cNum) {
178 case 0:
179 txReqSel = MXC_DMA_REQUEST_I2C0TX;
180 break;
181
182 case 1:
183 txReqSel = MXC_DMA_REQUEST_I2C1TX;
184 break;
185
186 case 2:
187 txReqSel = MXC_DMA_REQUEST_I2C2TX;
188 break;
189
190 default:
191 return E_BAD_PARAM;
192 }
193 }
194
195 if (rxData != NULL) {
196 switch (i2cNum) {
197 case 0:
198 rxReqSel = MXC_DMA_REQUEST_I2C0RX;
199 break;
200
201 case 1:
202 rxReqSel = MXC_DMA_REQUEST_I2C1RX;
203 break;
204
205 case 2:
206 rxReqSel = MXC_DMA_REQUEST_I2C2RX;
207 break;
208
209 default:
210 return E_BAD_PARAM;
211 }
212 }
213
214 return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
215 (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
216 }
217
218 /* ************************************************************************* */
219 /* Low-level functions */
220 /* ************************************************************************* */
MXC_I2C_Start(mxc_i2c_regs_t * i2c)221 int MXC_I2C_Start(mxc_i2c_regs_t *i2c)
222 {
223 return MXC_I2C_RevA_Start((mxc_i2c_reva_regs_t *)i2c);
224 }
225
MXC_I2C_Stop(mxc_i2c_regs_t * i2c)226 int MXC_I2C_Stop(mxc_i2c_regs_t *i2c)
227 {
228 return MXC_I2C_RevA_Stop((mxc_i2c_reva_regs_t *)i2c);
229 }
230
MXC_I2C_WriteByte(mxc_i2c_regs_t * i2c,unsigned char byte)231 int MXC_I2C_WriteByte(mxc_i2c_regs_t *i2c, unsigned char byte)
232 {
233 return MXC_I2C_RevA_WriteByte((mxc_i2c_reva_regs_t *)i2c, byte);
234 }
235
MXC_I2C_ReadByte(mxc_i2c_regs_t * i2c,unsigned char * byte,int ack)236 int MXC_I2C_ReadByte(mxc_i2c_regs_t *i2c, unsigned char *byte, int ack)
237 {
238 return MXC_I2C_RevA_ReadByte((mxc_i2c_reva_regs_t *)i2c, byte, ack);
239 }
240
MXC_I2C_ReadByteInteractive(mxc_i2c_regs_t * i2c,unsigned char * byte,mxc_i2c_getAck_t getAck)241 int MXC_I2C_ReadByteInteractive(mxc_i2c_regs_t *i2c, unsigned char *byte, mxc_i2c_getAck_t getAck)
242 {
243 return MXC_I2C_RevA_ReadByteInteractive((mxc_i2c_reva_regs_t *)i2c, byte,
244 (mxc_i2c_reva_getAck_t)getAck);
245 }
246
MXC_I2C_Write(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int * len)247 int MXC_I2C_Write(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len)
248 {
249 return MXC_I2C_RevA_Write((mxc_i2c_reva_regs_t *)i2c, bytes, len);
250 }
251
MXC_I2C_Read(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int * len,int ack)252 int MXC_I2C_Read(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len, int ack)
253 {
254 return MXC_I2C_RevA_Read((mxc_i2c_reva_regs_t *)i2c, bytes, len, ack);
255 }
256
MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t * i2c,volatile unsigned char * bytes,unsigned int len)257 int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
258 {
259 return MXC_I2C_RevA_ReadRXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
260 }
261
MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int len,mxc_i2c_dma_complete_cb_t callback)262 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
263 mxc_i2c_dma_complete_cb_t callback)
264 {
265 // The callback parameter was previously unused but keeping it for backwards-compatibility.
266 return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
267 }
268
MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t * i2c)269 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
270 {
271 return MXC_I2C_RevA_GetRXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
272 }
273
MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t * i2c,volatile unsigned char * bytes,unsigned int len)274 int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
275 {
276 return MXC_I2C_RevA_WriteTXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
277 }
278
MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int len,mxc_i2c_dma_complete_cb_t callback)279 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
280 mxc_i2c_dma_complete_cb_t callback)
281 {
282 // The callback parameter was previously unused but keeping it for backwards-compatibility.
283 return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
284 }
285
MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t * i2c)286 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
287 {
288 return MXC_I2C_RevA_GetTXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
289 }
290
MXC_I2C_ClearRXFIFO(mxc_i2c_regs_t * i2c)291 void MXC_I2C_ClearRXFIFO(mxc_i2c_regs_t *i2c)
292 {
293 MXC_I2C_RevA_ClearRXFIFO((mxc_i2c_reva_regs_t *)i2c);
294 }
295
MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t * i2c)296 void MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t *i2c)
297 {
298 MXC_I2C_RevA_ClearTXFIFO((mxc_i2c_reva_regs_t *)i2c);
299 }
300
MXC_I2C_GetFlags(mxc_i2c_regs_t * i2c,unsigned int * flags0,unsigned int * flags1)301 int MXC_I2C_GetFlags(mxc_i2c_regs_t *i2c, unsigned int *flags0, unsigned int *flags1)
302 {
303 return MXC_I2C_RevA_GetFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
304 }
305
MXC_I2C_ClearFlags(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)306 void MXC_I2C_ClearFlags(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
307 {
308 MXC_I2C_RevA_ClearFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
309 }
310
MXC_I2C_EnableInt(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)311 void MXC_I2C_EnableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
312 {
313 MXC_I2C_RevA_EnableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
314 }
315
MXC_I2C_DisableInt(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)316 void MXC_I2C_DisableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
317 {
318 MXC_I2C_RevA_DisableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
319 }
320
MXC_I2C_EnablePreload(mxc_i2c_regs_t * i2c)321 void MXC_I2C_EnablePreload(mxc_i2c_regs_t *i2c)
322 {
323 MXC_I2C_RevA_EnablePreload((mxc_i2c_reva_regs_t *)i2c);
324 }
325
MXC_I2C_DisablePreload(mxc_i2c_regs_t * i2c)326 void MXC_I2C_DisablePreload(mxc_i2c_regs_t *i2c)
327 {
328 MXC_I2C_RevA_DisablePreload((mxc_i2c_reva_regs_t *)i2c);
329 }
330
MXC_I2C_EnableGeneralCall(mxc_i2c_regs_t * i2c)331 void MXC_I2C_EnableGeneralCall(mxc_i2c_regs_t *i2c)
332 {
333 MXC_I2C_RevA_EnableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
334 }
335
MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t * i2c)336 void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c)
337 {
338 MXC_I2C_RevA_DisableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
339 }
340
MXC_I2C_SetTimeout(mxc_i2c_regs_t * i2c,unsigned int timeout)341 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout)
342 {
343 MXC_I2C_RevA_SetTimeout((mxc_i2c_reva_regs_t *)i2c, timeout);
344 }
345
MXC_I2C_GetTimeout(mxc_i2c_regs_t * i2c)346 unsigned int MXC_I2C_GetTimeout(mxc_i2c_regs_t *i2c)
347 {
348 return MXC_I2C_RevA_GetTimeout((mxc_i2c_reva_regs_t *)i2c);
349 }
350
MXC_I2C_Recover(mxc_i2c_regs_t * i2c,unsigned int retries)351 int MXC_I2C_Recover(mxc_i2c_regs_t *i2c, unsigned int retries)
352 {
353 return MXC_I2C_RevA_Recover((mxc_i2c_reva_regs_t *)i2c, retries);
354 }
355
356 /* ************************************************************************* */
357 /* Transaction level functions */
358 /* ************************************************************************* */
359
MXC_I2C_MasterTransaction(mxc_i2c_req_t * req)360 int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req)
361 {
362 return MXC_I2C_RevA_MasterTransaction((mxc_i2c_reva_req_t *)req);
363 }
364
MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t * req)365 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req)
366 {
367 return MXC_I2C_RevA_MasterTransactionAsync((mxc_i2c_reva_req_t *)req);
368 }
369
MXC_I2C_MasterTransactionDMA(mxc_i2c_req_t * req)370 int MXC_I2C_MasterTransactionDMA(mxc_i2c_req_t *req)
371 {
372 return MXC_I2C_RevA_MasterTransactionDMA((mxc_i2c_reva_req_t *)req, MXC_DMA);
373 }
374
MXC_I2C_SlaveTransaction(mxc_i2c_regs_t * i2c,mxc_i2c_slave_handler_t callback)375 int MXC_I2C_SlaveTransaction(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
376 {
377 return MXC_I2C_RevA_SlaveTransaction((mxc_i2c_reva_regs_t *)i2c,
378 (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
379 }
380
MXC_I2C_SlaveTransactionAsync(mxc_i2c_regs_t * i2c,mxc_i2c_slave_handler_t callback)381 int MXC_I2C_SlaveTransactionAsync(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
382 {
383 return MXC_I2C_RevA_SlaveTransactionAsync(
384 (mxc_i2c_reva_regs_t *)i2c, (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
385 }
386
MXC_I2C_SetRXThreshold(mxc_i2c_regs_t * i2c,unsigned int numBytes)387 int MXC_I2C_SetRXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
388 {
389 return MXC_I2C_RevA_SetRXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
390 }
391
MXC_I2C_GetRXThreshold(mxc_i2c_regs_t * i2c)392 int MXC_I2C_GetRXThreshold(mxc_i2c_regs_t *i2c)
393 {
394 return MXC_I2C_RevA_GetRXThreshold((mxc_i2c_reva_regs_t *)i2c);
395 }
396
MXC_I2C_SetTXThreshold(mxc_i2c_regs_t * i2c,unsigned int numBytes)397 int MXC_I2C_SetTXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
398 {
399 return MXC_I2C_RevA_SetTXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
400 }
401
MXC_I2C_GetTXThreshold(mxc_i2c_regs_t * i2c)402 int MXC_I2C_GetTXThreshold(mxc_i2c_regs_t *i2c)
403 {
404 return MXC_I2C_RevA_GetTXThreshold((mxc_i2c_reva_regs_t *)i2c);
405 }
406
MXC_I2C_AsyncStop(mxc_i2c_regs_t * i2c)407 void MXC_I2C_AsyncStop(mxc_i2c_regs_t *i2c)
408 {
409 MXC_I2C_RevA_AsyncStop((mxc_i2c_reva_regs_t *)i2c);
410 }
411
MXC_I2C_AbortAsync(mxc_i2c_regs_t * i2c)412 void MXC_I2C_AbortAsync(mxc_i2c_regs_t *i2c)
413 {
414 MXC_I2C_RevA_AbortAsync((mxc_i2c_reva_regs_t *)i2c);
415 }
416
MXC_I2C_AsyncHandler(mxc_i2c_regs_t * i2c)417 void MXC_I2C_AsyncHandler(mxc_i2c_regs_t *i2c)
418 {
419 MXC_I2C_RevA_AsyncHandler((mxc_i2c_reva_regs_t *)i2c, interruptCheck);
420 }
421
MXC_I2C_DMACallback(int ch,int error)422 void MXC_I2C_DMACallback(int ch, int error)
423 {
424 MXC_I2C_RevA_DMACallback(ch, error);
425 }
426