1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include <stdio.h>
22 #include <stddef.h>
23 #include <stdint.h>
24 #include "mxc_device.h"
25 #include "mxc_assert.h"
26 #include "mxc_lock.h"
27 #include "mxc_sys.h"
28 #include "mxc_delay.h"
29 #include "i2c_regs.h"
30 #include "dma_regs.h"
31 #include "i2c.h"
32 #include "i2c_reva.h"
33
34 /* **** Variable Declaration **** */
35 uint32_t interruptCheck = MXC_F_I2C_INTFL0_ADDR_MATCH | MXC_F_I2C_INTFL0_DNR_ERR;
36
37 /* **** Function Prototypes **** */
38
39 /* ************************************************************************* */
40 /* Control/Configuration functions */
41 /* ************************************************************************* */
MXC_I2C_Init(mxc_i2c_regs_t * i2c,int masterMode,unsigned int slaveAddr)42 int MXC_I2C_Init(mxc_i2c_regs_t *i2c, int masterMode, unsigned int slaveAddr)
43 {
44 if (i2c == NULL) {
45 return E_NULL_PTR;
46 }
47
48 #ifndef MSDK_NO_GPIO_CLK_INIT
49 MXC_I2C_Shutdown(i2c); // Clear everything out
50
51 if (i2c == MXC_I2C0) {
52 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C0);
53 MXC_GPIO_Config(&gpio_cfg_i2c0);
54 } else if (i2c == MXC_I2C1) {
55 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C1);
56 MXC_GPIO_Config(&gpio_cfg_i2c1);
57 } else if (i2c == MXC_I2C2) {
58 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_I2C2);
59 MXC_GPIO_Config(&gpio_cfg_i2c2);
60 } else {
61 return E_NO_DEVICE;
62 }
63 #endif // MSDK_NO_GPIO_CLK_INIT
64
65 return MXC_I2C_RevA_Init((mxc_i2c_reva_regs_t *)i2c, masterMode, slaveAddr);
66 }
67
MXC_I2C_SetSlaveAddr(mxc_i2c_regs_t * i2c,unsigned int slaveAddr,int idx)68 int MXC_I2C_SetSlaveAddr(mxc_i2c_regs_t *i2c, unsigned int slaveAddr, int idx)
69 {
70 if (idx != 0) {
71 // MAX32655 only supports one slave device
72 return E_NOT_SUPPORTED;
73 }
74
75 return MXC_I2C_RevA_SetSlaveAddr((mxc_i2c_reva_regs_t *)i2c, slaveAddr, idx);
76 }
77
MXC_I2C_Shutdown(mxc_i2c_regs_t * i2c)78 int MXC_I2C_Shutdown(mxc_i2c_regs_t *i2c)
79 {
80 // Configure GPIO for I2C
81 if (i2c == MXC_I2C0) {
82 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C0);
83 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_I2C0);
84 } else if (i2c == MXC_I2C1) {
85 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C1);
86 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C1);
87 } else if (i2c == MXC_I2C2) {
88 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_I2C2);
89 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C2);
90 } else {
91 return E_NO_DEVICE;
92 }
93
94 return MXC_I2C_RevA_Shutdown((mxc_i2c_reva_regs_t *)i2c);
95 }
96
MXC_I2C_Reset(mxc_i2c_regs_t * i2c)97 int MXC_I2C_Reset(mxc_i2c_regs_t *i2c)
98 {
99 // Configure GPIO for I2C
100 if (i2c == MXC_I2C0) {
101 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_I2C0);
102 } else if (i2c == MXC_I2C1) {
103 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C1);
104 } else if (i2c == MXC_I2C2) {
105 MXC_SYS_Reset_Periph(MXC_SYS_RESET1_I2C2);
106 } else {
107 return E_NO_DEVICE;
108 }
109
110 return E_NO_ERROR;
111 }
112
MXC_I2C_SetFrequency(mxc_i2c_regs_t * i2c,unsigned int hz)113 int MXC_I2C_SetFrequency(mxc_i2c_regs_t *i2c, unsigned int hz)
114 {
115 return MXC_I2C_RevA_SetFrequency((mxc_i2c_reva_regs_t *)i2c, hz);
116 }
117
MXC_I2C_GetFrequency(mxc_i2c_regs_t * i2c)118 int MXC_I2C_GetFrequency(mxc_i2c_regs_t *i2c)
119 {
120 return MXC_I2C_RevA_GetFrequency((mxc_i2c_reva_regs_t *)i2c);
121 }
122
MXC_I2C_ReadyForSleep(mxc_i2c_regs_t * i2c)123 int MXC_I2C_ReadyForSleep(mxc_i2c_regs_t *i2c)
124 {
125 return MXC_I2C_RevA_ReadyForSleep((mxc_i2c_reva_regs_t *)i2c);
126 }
127
MXC_I2C_SetClockStretching(mxc_i2c_regs_t * i2c,int enable)128 int MXC_I2C_SetClockStretching(mxc_i2c_regs_t *i2c, int enable)
129 {
130 return MXC_I2C_RevA_SetClockStretching((mxc_i2c_reva_regs_t *)i2c, enable);
131 }
132
MXC_I2C_GetClockStretching(mxc_i2c_regs_t * i2c)133 int MXC_I2C_GetClockStretching(mxc_i2c_regs_t *i2c)
134 {
135 return MXC_I2C_RevA_GetClockStretching((mxc_i2c_reva_regs_t *)i2c);
136 }
137
MXC_I2C_DMA_Init(mxc_i2c_regs_t * i2c,mxc_dma_regs_t * dma,bool use_dma_tx,bool use_dma_rx)138 int MXC_I2C_DMA_Init(mxc_i2c_regs_t *i2c, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx)
139 {
140 return MXC_I2C_RevA_DMA_Init((mxc_i2c_reva_regs_t *)i2c, (mxc_dma_reva_regs_t *)dma, use_dma_tx,
141 use_dma_rx);
142 }
143
MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t * i2c)144 int MXC_I2C_DMA_GetTXChannel(mxc_i2c_regs_t *i2c)
145 {
146 return MXC_I2C_RevA_DMA_GetTXChannel((mxc_i2c_reva_regs_t *)i2c);
147 }
148
MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t * i2c)149 int MXC_I2C_DMA_GetRXChannel(mxc_i2c_regs_t *i2c)
150 {
151 return MXC_I2C_RevA_DMA_GetRXChannel((mxc_i2c_reva_regs_t *)i2c);
152 }
153
MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t * i2c,uint8_t * txData,uint8_t * rxData)154 int MXC_I2C_DMA_SetRequestSelect(mxc_i2c_regs_t *i2c, uint8_t *txData, uint8_t *rxData)
155 {
156 int i2cNum;
157 int txReqSel = -1;
158 int rxReqSel = -1;
159
160 if (i2c == NULL) {
161 return E_NULL_PTR;
162 }
163
164 i2cNum = MXC_I2C_GET_IDX((mxc_i2c_regs_t *)i2c);
165
166 if (txData != NULL) {
167 switch (i2cNum) {
168 case 0:
169 txReqSel = MXC_DMA_REQUEST_I2C0TX;
170 break;
171
172 case 1:
173 txReqSel = MXC_DMA_REQUEST_I2C1TX;
174 break;
175
176 case 2:
177 txReqSel = MXC_DMA_REQUEST_I2C2TX;
178 break;
179
180 default:
181 return E_BAD_PARAM;
182 }
183 }
184
185 if (rxData != NULL) {
186 switch (i2cNum) {
187 case 0:
188 rxReqSel = MXC_DMA_REQUEST_I2C0RX;
189 break;
190
191 case 1:
192 rxReqSel = MXC_DMA_REQUEST_I2C1RX;
193 break;
194
195 case 2:
196 rxReqSel = MXC_DMA_REQUEST_I2C2RX;
197 break;
198
199 default:
200 return E_BAD_PARAM;
201 }
202 }
203
204 return MXC_I2C_RevA_DMA_SetRequestSelect((mxc_i2c_reva_regs_t *)i2c,
205 (mxc_dma_reva_regs_t *)MXC_DMA, txReqSel, rxReqSel);
206 }
207
208 /* ************************************************************************* */
209 /* Low-level functions */
210 /* ************************************************************************* */
MXC_I2C_Start(mxc_i2c_regs_t * i2c)211 int MXC_I2C_Start(mxc_i2c_regs_t *i2c)
212 {
213 return MXC_I2C_RevA_Start((mxc_i2c_reva_regs_t *)i2c);
214 }
215
MXC_I2C_Stop(mxc_i2c_regs_t * i2c)216 int MXC_I2C_Stop(mxc_i2c_regs_t *i2c)
217 {
218 return MXC_I2C_RevA_Stop((mxc_i2c_reva_regs_t *)i2c);
219 }
220
MXC_I2C_WriteByte(mxc_i2c_regs_t * i2c,unsigned char byte)221 int MXC_I2C_WriteByte(mxc_i2c_regs_t *i2c, unsigned char byte)
222 {
223 return MXC_I2C_RevA_WriteByte((mxc_i2c_reva_regs_t *)i2c, byte);
224 }
225
MXC_I2C_ReadByte(mxc_i2c_regs_t * i2c,unsigned char * byte,int ack)226 int MXC_I2C_ReadByte(mxc_i2c_regs_t *i2c, unsigned char *byte, int ack)
227 {
228 return MXC_I2C_RevA_ReadByte((mxc_i2c_reva_regs_t *)i2c, byte, ack);
229 }
230
MXC_I2C_ReadByteInteractive(mxc_i2c_regs_t * i2c,unsigned char * byte,mxc_i2c_getAck_t getAck)231 int MXC_I2C_ReadByteInteractive(mxc_i2c_regs_t *i2c, unsigned char *byte, mxc_i2c_getAck_t getAck)
232 {
233 return MXC_I2C_RevA_ReadByteInteractive((mxc_i2c_reva_regs_t *)i2c, byte,
234 (mxc_i2c_reva_getAck_t)getAck);
235 }
236
MXC_I2C_Write(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int * len)237 int MXC_I2C_Write(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len)
238 {
239 return MXC_I2C_RevA_Write((mxc_i2c_reva_regs_t *)i2c, bytes, len);
240 }
241
MXC_I2C_Read(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int * len,int ack)242 int MXC_I2C_Read(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int *len, int ack)
243 {
244 return MXC_I2C_RevA_Read((mxc_i2c_reva_regs_t *)i2c, bytes, len, ack);
245 }
246
MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t * i2c,volatile unsigned char * bytes,unsigned int len)247 int MXC_I2C_ReadRXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
248 {
249 return MXC_I2C_RevA_ReadRXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
250 }
251
MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int len,mxc_i2c_dma_complete_cb_t callback)252 int MXC_I2C_ReadRXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
253 mxc_i2c_dma_complete_cb_t callback)
254 {
255 // The callback parameter was previously unused but keeping it for backwards-compatibility.
256 return MXC_I2C_RevA_ReadRXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
257 }
258
MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t * i2c)259 int MXC_I2C_GetRXFIFOAvailable(mxc_i2c_regs_t *i2c)
260 {
261 return MXC_I2C_RevA_GetRXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
262 }
263
MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t * i2c,volatile unsigned char * bytes,unsigned int len)264 int MXC_I2C_WriteTXFIFO(mxc_i2c_regs_t *i2c, volatile unsigned char *bytes, unsigned int len)
265 {
266 return MXC_I2C_RevA_WriteTXFIFO((mxc_i2c_reva_regs_t *)i2c, bytes, len);
267 }
268
MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t * i2c,unsigned char * bytes,unsigned int len,mxc_i2c_dma_complete_cb_t callback)269 int MXC_I2C_WriteTXFIFODMA(mxc_i2c_regs_t *i2c, unsigned char *bytes, unsigned int len,
270 mxc_i2c_dma_complete_cb_t callback)
271 {
272 // The callback parameter was previously unused but keeping it for backwards-compatibility.
273 return MXC_I2C_RevA_WriteTXFIFODMA((mxc_i2c_reva_regs_t *)i2c, bytes, len, MXC_DMA);
274 }
275
MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t * i2c)276 int MXC_I2C_GetTXFIFOAvailable(mxc_i2c_regs_t *i2c)
277 {
278 return MXC_I2C_RevA_GetTXFIFOAvailable((mxc_i2c_reva_regs_t *)i2c);
279 }
280
MXC_I2C_ClearRXFIFO(mxc_i2c_regs_t * i2c)281 void MXC_I2C_ClearRXFIFO(mxc_i2c_regs_t *i2c)
282 {
283 MXC_I2C_RevA_ClearRXFIFO((mxc_i2c_reva_regs_t *)i2c);
284 }
285
MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t * i2c)286 void MXC_I2C_ClearTXFIFO(mxc_i2c_regs_t *i2c)
287 {
288 MXC_I2C_RevA_ClearTXFIFO((mxc_i2c_reva_regs_t *)i2c);
289 }
290
MXC_I2C_GetFlags(mxc_i2c_regs_t * i2c,unsigned int * flags0,unsigned int * flags1)291 int MXC_I2C_GetFlags(mxc_i2c_regs_t *i2c, unsigned int *flags0, unsigned int *flags1)
292 {
293 return MXC_I2C_RevA_GetFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
294 }
295
MXC_I2C_ClearFlags(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)296 void MXC_I2C_ClearFlags(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
297 {
298 MXC_I2C_RevA_ClearFlags((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
299 }
300
MXC_I2C_EnableInt(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)301 void MXC_I2C_EnableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
302 {
303 MXC_I2C_RevA_EnableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
304 }
305
MXC_I2C_DisableInt(mxc_i2c_regs_t * i2c,unsigned int flags0,unsigned int flags1)306 void MXC_I2C_DisableInt(mxc_i2c_regs_t *i2c, unsigned int flags0, unsigned int flags1)
307 {
308 MXC_I2C_RevA_DisableInt((mxc_i2c_reva_regs_t *)i2c, flags0, flags1);
309 }
310
MXC_I2C_EnablePreload(mxc_i2c_regs_t * i2c)311 void MXC_I2C_EnablePreload(mxc_i2c_regs_t *i2c)
312 {
313 MXC_I2C_RevA_EnablePreload((mxc_i2c_reva_regs_t *)i2c);
314 }
315
MXC_I2C_DisablePreload(mxc_i2c_regs_t * i2c)316 void MXC_I2C_DisablePreload(mxc_i2c_regs_t *i2c)
317 {
318 MXC_I2C_RevA_DisablePreload((mxc_i2c_reva_regs_t *)i2c);
319 }
320
MXC_I2C_EnableGeneralCall(mxc_i2c_regs_t * i2c)321 void MXC_I2C_EnableGeneralCall(mxc_i2c_regs_t *i2c)
322 {
323 MXC_I2C_RevA_EnableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
324 }
325
MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t * i2c)326 void MXC_I2C_DisableGeneralCall(mxc_i2c_regs_t *i2c)
327 {
328 MXC_I2C_RevA_DisableGeneralCall((mxc_i2c_reva_regs_t *)i2c);
329 }
330
MXC_I2C_SetTimeout(mxc_i2c_regs_t * i2c,unsigned int timeout)331 void MXC_I2C_SetTimeout(mxc_i2c_regs_t *i2c, unsigned int timeout)
332 {
333 MXC_I2C_RevA_SetTimeout((mxc_i2c_reva_regs_t *)i2c, timeout);
334 }
335
MXC_I2C_GetTimeout(mxc_i2c_regs_t * i2c)336 unsigned int MXC_I2C_GetTimeout(mxc_i2c_regs_t *i2c)
337 {
338 return MXC_I2C_RevA_GetTimeout((mxc_i2c_reva_regs_t *)i2c);
339 }
340
MXC_I2C_Recover(mxc_i2c_regs_t * i2c,unsigned int retries)341 int MXC_I2C_Recover(mxc_i2c_regs_t *i2c, unsigned int retries)
342 {
343 return MXC_I2C_RevA_Recover((mxc_i2c_reva_regs_t *)i2c, retries);
344 }
345
346 /* ************************************************************************* */
347 /* Transaction level functions */
348 /* ************************************************************************* */
349
MXC_I2C_MasterTransaction(mxc_i2c_req_t * req)350 int MXC_I2C_MasterTransaction(mxc_i2c_req_t *req)
351 {
352 return MXC_I2C_RevA_MasterTransaction((mxc_i2c_reva_req_t *)req);
353 }
354
MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t * req)355 int MXC_I2C_MasterTransactionAsync(mxc_i2c_req_t *req)
356 {
357 return MXC_I2C_RevA_MasterTransactionAsync((mxc_i2c_reva_req_t *)req);
358 }
359
MXC_I2C_MasterTransactionDMA(mxc_i2c_req_t * req)360 int MXC_I2C_MasterTransactionDMA(mxc_i2c_req_t *req)
361 {
362 return MXC_I2C_RevA_MasterTransactionDMA((mxc_i2c_reva_req_t *)req, MXC_DMA);
363 }
364
MXC_I2C_SlaveTransaction(mxc_i2c_regs_t * i2c,mxc_i2c_slave_handler_t callback)365 int MXC_I2C_SlaveTransaction(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
366 {
367 return MXC_I2C_RevA_SlaveTransaction((mxc_i2c_reva_regs_t *)i2c,
368 (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
369 }
370
MXC_I2C_SlaveTransactionAsync(mxc_i2c_regs_t * i2c,mxc_i2c_slave_handler_t callback)371 int MXC_I2C_SlaveTransactionAsync(mxc_i2c_regs_t *i2c, mxc_i2c_slave_handler_t callback)
372 {
373 return MXC_I2C_RevA_SlaveTransactionAsync(
374 (mxc_i2c_reva_regs_t *)i2c, (mxc_i2c_reva_slave_handler_t)callback, interruptCheck);
375 }
376
MXC_I2C_SetRXThreshold(mxc_i2c_regs_t * i2c,unsigned int numBytes)377 int MXC_I2C_SetRXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
378 {
379 return MXC_I2C_RevA_SetRXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
380 }
381
MXC_I2C_GetRXThreshold(mxc_i2c_regs_t * i2c)382 int MXC_I2C_GetRXThreshold(mxc_i2c_regs_t *i2c)
383 {
384 return MXC_I2C_RevA_GetRXThreshold((mxc_i2c_reva_regs_t *)i2c);
385 }
386
MXC_I2C_SetTXThreshold(mxc_i2c_regs_t * i2c,unsigned int numBytes)387 int MXC_I2C_SetTXThreshold(mxc_i2c_regs_t *i2c, unsigned int numBytes)
388 {
389 return MXC_I2C_RevA_SetTXThreshold((mxc_i2c_reva_regs_t *)i2c, numBytes);
390 }
391
MXC_I2C_GetTXThreshold(mxc_i2c_regs_t * i2c)392 int MXC_I2C_GetTXThreshold(mxc_i2c_regs_t *i2c)
393 {
394 return MXC_I2C_RevA_GetTXThreshold((mxc_i2c_reva_regs_t *)i2c);
395 }
396
MXC_I2C_AsyncStop(mxc_i2c_regs_t * i2c)397 void MXC_I2C_AsyncStop(mxc_i2c_regs_t *i2c)
398 {
399 MXC_I2C_RevA_AsyncStop((mxc_i2c_reva_regs_t *)i2c);
400 }
401
MXC_I2C_AbortAsync(mxc_i2c_regs_t * i2c)402 void MXC_I2C_AbortAsync(mxc_i2c_regs_t *i2c)
403 {
404 MXC_I2C_RevA_AbortAsync((mxc_i2c_reva_regs_t *)i2c);
405 }
406
MXC_I2C_AsyncHandler(mxc_i2c_regs_t * i2c)407 void MXC_I2C_AsyncHandler(mxc_i2c_regs_t *i2c)
408 {
409 MXC_I2C_RevA_AsyncHandler((mxc_i2c_reva_regs_t *)i2c, interruptCheck);
410 }
411
MXC_I2C_DMACallback(int ch,int error)412 void MXC_I2C_DMACallback(int ch, int error)
413 {
414 MXC_I2C_RevA_DMACallback(ch, error);
415 }
416