1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 #include "emcc.h"
22 #include "emcc_reva.h"
23 #include "gcr_regs.h"
24 #include "mxc_device.h"
25 
MXC_EMCC_ID(mxc_emcc_info_t id)26 uint32_t MXC_EMCC_ID(mxc_emcc_info_t id)
27 {
28     return MXC_EMCC_RevA_ID((mxc_emcc_reva_regs_t *)MXC_EMCC, id);
29 }
30 
MXC_EMCC_CacheSize(void)31 uint32_t MXC_EMCC_CacheSize(void)
32 {
33     return MXC_EMCC_RevA_CacheSize((mxc_emcc_reva_regs_t *)MXC_EMCC);
34 }
35 
MXC_EMCC_MemSize(void)36 uint32_t MXC_EMCC_MemSize(void)
37 {
38     return MXC_EMCC_RevA_MemSize((mxc_emcc_reva_regs_t *)MXC_EMCC);
39 }
40 
MXC_EMCC_Enable(void)41 void MXC_EMCC_Enable(void)
42 {
43     MXC_GCR->sysctrl &= ~MXC_F_GCR_SYSCTRL_SYSCACHE_DIS;
44     MXC_EMCC_RevA_Enable((mxc_emcc_reva_regs_t *)MXC_EMCC);
45 }
46 
MXC_EMCC_Disable(void)47 void MXC_EMCC_Disable(void)
48 {
49     MXC_EMCC_RevA_Disable((mxc_emcc_reva_regs_t *)MXC_EMCC);
50     MXC_GCR->sysctrl |= MXC_F_GCR_SYSCTRL_SYSCACHE_DIS;
51 }
52 
MXC_EMCC_Flush(void)53 void MXC_EMCC_Flush(void)
54 {
55     MXC_GCR->sysctrl |= MXC_F_GCR_SYSCTRL_ICC0_FLUSH;
56 }
57 
MXC_EMCC_WriteAllocateEnable(void)58 void MXC_EMCC_WriteAllocateEnable(void)
59 {
60     MXC_EMCC_RevA_WriteAllocateEnable((mxc_emcc_reva_regs_t *)MXC_EMCC);
61 }
62 
MXC_EMCC_WriteAllocateDisable(void)63 void MXC_EMCC_WriteAllocateDisable(void)
64 {
65     MXC_EMCC_RevA_WriteAllocateDisable((mxc_emcc_reva_regs_t *)MXC_EMCC);
66 }
67 
MXC_EMCC_CriticalWordFirstEnable(void)68 void MXC_EMCC_CriticalWordFirstEnable(void) //cwfst_dis
69 {
70     MXC_EMCC_RevA_CriticalWordFirstEnable((mxc_emcc_reva_regs_t *)MXC_EMCC);
71 }
72 
MXC_EMCC_CriticalWordFirstDisable(void)73 void MXC_EMCC_CriticalWordFirstDisable(void) //cwfst_dis
74 {
75     MXC_EMCC_RevA_CriticalWordFirstDisable((mxc_emcc_reva_regs_t *)MXC_EMCC);
76 }
77 
MXC_EMCC_Ready(void)78 uint32_t MXC_EMCC_Ready(void)
79 {
80     return MXC_EMCC_RevA_Ready((mxc_emcc_reva_regs_t *)MXC_EMCC);
81 }
82