1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>DVS</name> 5 <description>Dynamic Voltage Scaling</description> 6 <prependToName>DVS_</prependToName> 7 <baseAddress>0x40004800</baseAddress> 8 <addressBlock> 9 <offset>0x00</offset> 10 <size>0x0030</size> 11 <usage>registers</usage> 12 </addressBlock> 13 <interrupt> 14 <name>DVS</name> 15 <description>Dynamic Voltage Scaling Interrupt</description> 16 <value>83</value> 17 </interrupt> 18 <registers> 19 <register> 20 <name>CTL</name> 21 <description>Control Register</description> 22 <addressOffset>0x00</addressOffset> 23 <fields> 24 <field> 25 <name>MON_ENA</name> 26 <description>Enable the DVS monitoring circuit</description> 27 <bitOffset>0</bitOffset> 28 <bitWidth>1</bitWidth> 29 </field> 30 <field> 31 <name>ADJ_ENA</name> 32 <description>Enable the power supply adjustment based on measurements</description> 33 <bitOffset>1</bitOffset> 34 <bitWidth>1</bitWidth> 35 </field> 36 <field> 37 <name>PS_FB_DIS</name> 38 <description>Power Supply Feedback Disable</description> 39 <bitOffset>2</bitOffset> 40 <bitWidth>1</bitWidth> 41 </field> 42 <field> 43 <name>CTRL_TAP_ENA</name> 44 <description>Use the TAP Select for automatic adjustment or monitoring</description> 45 <bitOffset>3</bitOffset> 46 <bitWidth>1</bitWidth> 47 </field> 48 <field> 49 <name>PROP_DLY</name> 50 <description>Additional delay to monitor lines</description> 51 <bitOffset>4</bitOffset> 52 <bitWidth>2</bitWidth> 53 </field> 54 <field> 55 <name>MON_ONESHOT</name> 56 <description>Measure delay once</description> 57 <bitOffset>6</bitOffset> 58 <bitWidth>1</bitWidth> 59 </field> 60 <field> 61 <name>GO_DIRECT</name> 62 <description>Operate in automatic mode or move directly</description> 63 <bitOffset>7</bitOffset> 64 <bitWidth>1</bitWidth> 65 </field> 66 <field> 67 <name>DIRECT_REG</name> 68 <description>Step incrementally to target voltage</description> 69 <bitOffset>8</bitOffset> 70 <bitWidth>1</bitWidth> 71 </field> 72 <field> 73 <name>PRIME_ENA</name> 74 <description>Include a delay line priming signal before monitoring</description> 75 <bitOffset>9</bitOffset> 76 <bitWidth>1</bitWidth> 77 </field> 78 <field> 79 <name>LIMIT_IE</name> 80 <description>Enable Limit Error Interrupt</description> 81 <bitOffset>10</bitOffset> 82 <bitWidth>1</bitWidth> 83 </field> 84 <field> 85 <name>RANGE_IE</name> 86 <description>Enable Range Error Interrupt</description> 87 <bitOffset>11</bitOffset> 88 <bitWidth>1</bitWidth> 89 </field> 90 <field> 91 <name>ADJ_IE</name> 92 <description>Enable Adjustment Error Interrupt</description> 93 <bitOffset>12</bitOffset> 94 <bitWidth>1</bitWidth> 95 </field> 96 <field> 97 <name>REF_SEL</name> 98 <description>Select TAP used for voltage adjustment</description> 99 <bitOffset>13</bitOffset> 100 <bitWidth>4</bitWidth> 101 </field> 102 <field> 103 <name>INC_VAL</name> 104 <description>Step size to increment voltage when in automatic mode</description> 105 <bitOffset>17</bitOffset> 106 <bitWidth>3</bitWidth> 107 </field> 108 <field> 109 <name>DVS_PS_APB_DIS</name> 110 <description>Prevent the application code from adjusting Vcore</description> 111 <bitOffset>20</bitOffset> 112 <bitWidth>1</bitWidth> 113 </field> 114 <field> 115 <name>DVS_HI_RANGE_ANY</name> 116 <description>Any high range signal from a delay line will cause a voltage adjustment</description> 117 <bitOffset>21</bitOffset> 118 <bitWidth>1</bitWidth> 119 </field> 120 <field> 121 <name>FB_TO_IE</name> 122 <description>Enable Voltage Adjustment Timeout Interrupt</description> 123 <bitOffset>22</bitOffset> 124 <bitWidth>1</bitWidth> 125 </field> 126 <field> 127 <name>FC_LV_IE</name> 128 <description>Enable Low Voltage Interrupt</description> 129 <bitOffset>23</bitOffset> 130 <bitWidth>1</bitWidth> 131 </field> 132 <field> 133 <name>PD_ACK_ENA</name> 134 <description>Prevent DVS from ack'ing a request to enter a low power mode until in the idle state</description> 135 <bitOffset>24</bitOffset> 136 <bitWidth>1</bitWidth> 137 </field> 138 <field> 139 <name>ADJ_ABORT</name> 140 <description>Causes the DVS to enter the idle state immediately on a request to enter a low power mode</description> 141 <bitOffset>25</bitOffset> 142 <bitWidth>1</bitWidth> 143 </field> 144 </fields> 145 </register> 146 <register> 147 <name>STAT</name> 148 <description>Status Fields</description> 149 <addressOffset>0x04</addressOffset> 150 <resetValue>0x00000000</resetValue> 151 <fields> 152 <field> 153 <name>DVS_STATE</name> 154 <description>State machine state</description> 155 <bitOffset>0</bitOffset> 156 <bitWidth>4</bitWidth> 157 </field> 158 <field> 159 <name>ADJ_UP_ENA</name> 160 <description>DVS Raising voltage</description> 161 <bitOffset>4</bitOffset> 162 <bitWidth>1</bitWidth> 163 </field> 164 <field> 165 <name>ADJ_DWN_ENA</name> 166 <description>DVS Lowering voltage</description> 167 <bitOffset>5</bitOffset> 168 <bitWidth>1</bitWidth> 169 </field> 170 <field> 171 <name>ADJ_ACTIVE</name> 172 <description>Adjustment to a Direct Voltage</description> 173 <bitOffset>6</bitOffset> 174 <bitWidth>1</bitWidth> 175 </field> 176 <field> 177 <name>CTR_TAP_OK</name> 178 <description>Tap Enabled and the Tap is withing Hi/Low limits</description> 179 <bitOffset>7</bitOffset> 180 <bitWidth>1</bitWidth> 181 </field> 182 <field> 183 <name>CTR_TAP_SEL</name> 184 <description>Status of selected center tap delay line detect output</description> 185 <bitOffset>8</bitOffset> 186 <bitWidth>1</bitWidth> 187 </field> 188 <field> 189 <name>SLOW_TRIP_DET</name> 190 <description>Provides the current combined status of all selected Low Range delay lines</description> 191 <bitOffset>9</bitOffset> 192 <bitWidth>1</bitWidth> 193 </field> 194 <field> 195 <name>FAST_TRIP_DET</name> 196 <description>Provides the current combined status of all selected High Range delay lines</description> 197 <bitOffset>10</bitOffset> 198 <bitWidth>1</bitWidth> 199 </field> 200 <field> 201 <name>PS_IN_RANGE</name> 202 <description>Indicates if the power supply is in range</description> 203 <bitOffset>11</bitOffset> 204 <bitWidth>1</bitWidth> 205 </field> 206 <field> 207 <name>PS_VCNTR</name> 208 <description>Voltage Count value sent to the power supply</description> 209 <bitOffset>12</bitOffset> 210 <bitWidth>7</bitWidth> 211 </field> 212 <field> 213 <name>MON_DLY_OK</name> 214 <description>Indicates the monitor delay count is at 0</description> 215 <bitOffset>19</bitOffset> 216 <bitWidth>1</bitWidth> 217 </field> 218 <field> 219 <name>ADJ_DLY_OK</name> 220 <description>Indicates the adjustment delay count is at 0</description> 221 <bitOffset>20</bitOffset> 222 <bitWidth>1</bitWidth> 223 </field> 224 <field> 225 <name>LO_LIMIT_DET</name> 226 <description>Power supply voltage counter is at low limit</description> 227 <bitOffset>21</bitOffset> 228 <bitWidth>1</bitWidth> 229 </field> 230 <field> 231 <name>HI_LIMIT_DET</name> 232 <description>Power supply voltage counter is at high limit</description> 233 <bitOffset>22</bitOffset> 234 <bitWidth>1</bitWidth> 235 </field> 236 <field> 237 <name>VALID_TAP</name> 238 <description>At least one delay line has been enabled</description> 239 <bitOffset>23</bitOffset> 240 <bitWidth>1</bitWidth> 241 </field> 242 <field> 243 <name>LIMIT_ERR</name> 244 <description>Interrupt flag that indicates a voltage count is at/beyond manufacturer limits</description> 245 <bitOffset>24</bitOffset> 246 <bitWidth>1</bitWidth> 247 </field> 248 <field> 249 <name>RANGE_ERR</name> 250 <description>Interrupt flag that indicates a tap has an invalid value</description> 251 <bitOffset>25</bitOffset> 252 <bitWidth>1</bitWidth> 253 </field> 254 <field> 255 <name>ADJ_ERR</name> 256 <description>Interrupt flag that indicates up and down adjustment requested simultaneously</description> 257 <bitOffset>26</bitOffset> 258 <bitWidth>1</bitWidth> 259 </field> 260 <field> 261 <name>REF_SEL_ERR</name> 262 <description>Indicates the ref select register bit is out of range</description> 263 <bitOffset>27</bitOffset> 264 <bitWidth>1</bitWidth> 265 </field> 266 <field> 267 <name>FB_TO_ERR</name> 268 <description>Interrupt flag that indicates a timeout while adjusting the voltage</description> 269 <bitOffset>28</bitOffset> 270 <bitWidth>1</bitWidth> 271 </field> 272 <field> 273 <name>FB_TO_ERR_S</name> 274 <description>Interrupt flag that mirror FB_TO_ERR and is write one clear</description> 275 <bitOffset>29</bitOffset> 276 <bitWidth>1</bitWidth> 277 </field> 278 <field> 279 <name>FC_LV_DET_INT</name> 280 <description>Interrupt flag that indicates the power supply voltage requested is below the low threshold</description> 281 <bitOffset>30</bitOffset> 282 <bitWidth>1</bitWidth> 283 </field> 284 <field> 285 <name>FC_LV_DET_S</name> 286 <description>Interrupt flag that mirrors FC_LV_DET_INT</description> 287 <bitOffset>31</bitOffset> 288 <bitWidth>1</bitWidth> 289 </field> 290 </fields> 291 </register> 292 <register> 293 <name>DIRECT</name> 294 <description>Direct control of target voltage</description> 295 <addressOffset>0x08</addressOffset> 296 <fields> 297 <field> 298 <name>VOLTAGE</name> 299 <description>Sets the target power supply value</description> 300 <bitOffset>0</bitOffset> 301 <bitWidth>7</bitWidth> 302 </field> 303 </fields> 304 </register> 305 <register> 306 <name>MON</name> 307 <description>Monitor Delay</description> 308 <addressOffset>0x00C</addressOffset> 309 <fields> 310 <field> 311 <name>DLY</name> 312 <description>Number of prescaled clocks between delay line samples</description> 313 <bitOffset>0</bitOffset> 314 <bitWidth>24</bitWidth> 315 </field> 316 <field> 317 <name>PRE</name> 318 <description>Number of clocks before DVS_MON_DLY is decremented</description> 319 <bitOffset>24</bitOffset> 320 <bitWidth>8</bitWidth> 321 </field> 322 </fields> 323 </register> 324 <register> 325 <name>ADJ_UP</name> 326 <description>Up Delay Register</description> 327 <addressOffset>0x010</addressOffset> 328 <fields> 329 <field> 330 <name>DLY</name> 331 <description>Number of prescaled clocks between updates of the adjustment delay counter</description> 332 <bitOffset>0</bitOffset> 333 <bitWidth>16</bitWidth> 334 </field> 335 <field> 336 <name>PRE</name> 337 <description>Number of clocks before DVS_ADJ_UP_DLY is decremented</description> 338 <bitOffset>16</bitOffset> 339 <bitWidth>8</bitWidth> 340 </field> 341 </fields> 342 </register> 343 <register> 344 <name>ADJ_DWN</name> 345 <description>Down Delay Register</description> 346 <addressOffset>0x014</addressOffset> 347 <fields> 348 <field> 349 <name>DLY</name> 350 <description>Number of prescaled clocks between updates of the adjustment delay counter</description> 351 <bitOffset>0</bitOffset> 352 <bitWidth>16</bitWidth> 353 </field> 354 <field> 355 <name>PRE</name> 356 <description>Number of clocks before DVS_ADJ_DWN_DLY is decremented</description> 357 <bitOffset>16</bitOffset> 358 <bitWidth>8</bitWidth> 359 </field> 360 </fields> 361 </register> 362 <register> 363 <name>THRES_CMP</name> 364 <description>Up Delay Register</description> 365 <addressOffset>0x018</addressOffset> 366 <fields> 367 <field> 368 <name>VCNTR_THRES_CNT</name> 369 <description>Value used to determine 'low voltage' range</description> 370 <bitOffset>0</bitOffset> 371 <bitWidth>7</bitWidth> 372 </field> 373 <field> 374 <name>VCNTR_THRES_MASK</name> 375 <description>Mask applied to threshold and vcount to determine if the device is in a low voltage range</description> 376 <bitOffset>8</bitOffset> 377 <bitWidth>7</bitWidth> 378 </field> 379 </fields> 380 </register> 381 <register> 382 <dim>5</dim> 383 <dimIncrement>4</dimIncrement> 384 <name>TAP_SEL[%s]</name> 385 <description>DVS Tap Select Register</description> 386 <addressOffset>0x1C</addressOffset> 387 <fields> 388 <field> 389 <name>LO</name> 390 <description>Select delay line tap for lower bound of auto adjustment</description> 391 <bitOffset>0</bitOffset> 392 <bitWidth>5</bitWidth> 393 </field> 394 <field> 395 <name>LO_TAP_STAT</name> 396 <description>Returns last delay line tap value</description> 397 <bitOffset>5</bitOffset> 398 <bitWidth>1</bitWidth> 399 </field> 400 <field> 401 <name>CTR_TAP_STAT</name> 402 <description>Returns last delay line tap value</description> 403 <bitOffset>6</bitOffset> 404 <bitWidth>1</bitWidth> 405 </field> 406 <field> 407 <name>HI_TAP_STAT</name> 408 <description>Returns last delay line tap value</description> 409 <bitOffset>7</bitOffset> 410 <bitWidth>1</bitWidth> 411 </field> 412 <field> 413 <name>HI</name> 414 <description>Selects delay line tap for high point of auto adjustment</description> 415 <bitOffset>8</bitOffset> 416 <bitWidth>5</bitWidth> 417 </field> 418 <field> 419 <name>CTR</name> 420 <description>Selects delay line tap for center point of auto adjustment</description> 421 <bitOffset>16</bitOffset> 422 <bitWidth>5</bitWidth> 423 </field> 424 <field> 425 <name>COARSE</name> 426 <description>Selects delay line tap for coarse or fixed delay portion of the line</description> 427 <bitOffset>24</bitOffset> 428 <bitWidth>3</bitWidth> 429 </field> 430 <field> 431 <name>DET_DLY</name> 432 <description>Number of HCLK between delay line launch and sampling</description> 433 <bitOffset>29</bitOffset> 434 <bitWidth>2</bitWidth> 435 </field> 436 <field> 437 <name>DELAY_ACT</name> 438 <description>Set if the delay is active</description> 439 <bitOffset>31</bitOffset> 440 <bitWidth>1</bitWidth> 441 </field> 442 </fields> 443 </register> 444 </registers> 445 </peripheral> 446 <!-- DVS: 447 Dynamic Voltage Scaling --> 448</device>
