1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>TRNG</name> 5 <description>Random Number Generator.</description> 6 <baseAddress>0x400B5000</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x1000</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <interrupt> 13 <name>TRNG</name> 14 <description>TRNG interrupt.</description> 15 <value>4</value> 16 </interrupt> 17 <registers> 18 <register> 19 <name>CTRL</name> 20 <description>TRNG Control Register.</description> 21 <addressOffset>0x00</addressOffset> 22 <resetValue>0x00000003</resetValue> 23 <fields> 24 <field> 25 <name>RND_IE</name> 26 <description>To enable IRQ generation when a new 32-bit Random number is ready.</description> 27 <bitOffset>1</bitOffset> 28 <bitWidth>1</bitWidth> 29 <enumeratedValues> 30 <enumeratedValue> 31 <name>disable</name> 32 <description>Disable</description> 33 <value>0</value> 34 </enumeratedValue> 35 <enumeratedValue> 36 <name>enable</name> 37 <description>Enable</description> 38 <value>1</value> 39 </enumeratedValue> 40 </enumeratedValues> 41 </field> 42 <field> 43 <name>AESKG_MEMPROTE</name> 44 <description>AES Key Generate. When enabled, the key for securing NVSRAM is generated and transferred to the secure key register automatically without user visibility or intervention. This bit is cleared by hardware once the key has been transferred to the secure key register.</description> 45 <bitOffset>4</bitOffset> 46 <bitWidth>1</bitWidth> 47 </field> 48 </fields> 49 </register> 50 <register> 51 <name>STATUS</name> 52 <description>Data. The content of this register is valid only when RNG_IS = 1. When TRNG is disabled, read returns 0x0000 0000.</description> 53 <addressOffset>0x04</addressOffset> 54 <access>read-only</access> 55 <fields> 56 <field> 57 <name>RND_RDY</name> 58 <description>32-bit random data is ready to read from TRNG_DATA register. Reading TRNG_DATA when RND_RDY=0 will return all 0's. IRQ is generated when RND_RDY=1 if TRNG_CN.RND_IRQ_EN=1.</description> 59 <bitOffset>0</bitOffset> 60 <bitWidth>1</bitWidth> 61 <enumeratedValues> 62 <enumeratedValue> 63 <name>Busy</name> 64 <description>TRNG Busy</description> 65 <value>0</value> 66 </enumeratedValue> 67 <enumeratedValue> 68 <name>Ready</name> 69 <description>32 bit random data is ready</description> 70 <value>1</value> 71 </enumeratedValue> 72 </enumeratedValues> 73 </field> 74 <field> 75 <name>AESKGD_MEU</name> 76 <description>Automatically AES transfer on going</description> 77 <bitOffset>4</bitOffset> 78 <bitWidth>1</bitWidth> 79 </field> 80 </fields> 81 </register> 82 <register> 83 <name>DATA</name> 84 <description>Data. The content of this register is valid only when RNG_IS = 1. When TRNG is disabled, read returns 0x0000 0000.</description> 85 <addressOffset>0x08</addressOffset> 86 <access>read-only</access> 87 <fields> 88 <field> 89 <name>DATA</name> 90 <description>Data. The content of this register is valid only when RNG_IS =1. When TNRG is disabled, read returns 0x0000 0000.</description> 91 <bitOffset>0</bitOffset> 92 <bitWidth>32</bitWidth> 93 </field> 94 </fields> 95 </register> 96 </registers> 97 </peripheral> 98 <!-- TRNG: Random Number Generator --> 99</device>