1 /** 2 * @file 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32690_SPI_H_ 27 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32690_SPI_H_ 28 29 /***** includes *******/ 30 #include <stdbool.h> 31 #include "spi_regs.h" 32 #include "mxc_sys.h" 33 #include "mxc_assert.h" 34 #include "gpio.h" 35 #include "mxc_pins.h" 36 #include "mxc_lock.h" 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 /** 43 * @defgroup spi SPI 44 * @ingroup periphlibs 45 * @{ 46 */ 47 48 /***** Definitions *****/ 49 50 /** 51 * @brief The list of SPI Widths supported 52 * 53 * The SPI Width can be set on a per-transaction basis. 54 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 55 * given. 56 * 57 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 58 * The IC requires a SPI Read to be executed as 59 * 1. Assert SS 60 * 2. Write an 8bit register address 61 * 3. Read back the 8 bit register 62 * 4. Deassert SS 63 * This can be accomplished with the STANDARD_HALFDUPLEX width 64 * 1. set txData to the address, txLen=1 65 * 2. set rxData to a buffer of 1 byte, rxLen=1 66 * 3. The driver will transmit the txData, and after completion of 67 * txData begin to recieve data, padding MOSI with DefaultTXData 68 * 69 */ 70 typedef enum { 71 SPI_WIDTH_3WIRE = 0, ///< 1 Data line, half duplex 72 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 73 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 74 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 75 } mxc_spi_width_t; 76 77 /** 78 * @brief The list of SPI modes 79 * 80 * SPI supports four combinations of clock and phase polarity 81 * 82 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 83 * and determines if the clock is active high or active low 84 * 85 * Clock phase determines when the data must be stable for sampling 86 * 87 */ 88 typedef enum { 89 SPI_MODE_0 = 0, ///< clock phase = 0, clock polarity = 0 90 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 91 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 92 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 93 } mxc_spi_mode_t; 94 95 typedef struct _mxc_spi_pins_t mxc_spi_pins_t; 96 97 /** 98 * @brief Structure used to initialize SPI pins. 99 * 100 * @note All values must be initialized. 101 * 102 * @note True equals pin is set for the spi function false the pin is left to its latest state. 103 */ 104 struct _mxc_spi_pins_t { 105 bool ss0; ///< Slave select pin 0 106 bool ss1; ///< Slave select pin 1 107 bool ss2; ///< Slave select pin 2 108 }; 109 110 typedef struct _mxc_spi_req_t mxc_spi_req_t; 111 /** 112 * @brief The callback routine used to indicate the transaction has terminated. 113 * 114 * @param req The details of the transaction. 115 * @param result See \ref MXC_Error_Codes for the list of error codes. 116 */ 117 typedef void (*spi_complete_cb_t)(void *req, int result); 118 119 /** 120 * @brief The information required to perform a complete SPI transaction 121 * 122 * This structure is used by blocking, async, and DMA based transactions. 123 * @note "completeCB" only needs to be initialized for interrupt driven (Async) and DMA transactions. 124 */ 125 struct _mxc_spi_req_t { 126 mxc_spi_regs_t *spi; ///<Point to SPI registers 127 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 128 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 129 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 130 ///< < 8 bits, pad the MSB of each byte with zeros. For 131 ///< character sizes > 8 bits, use two bytes per character 132 ///< and pad the MSB of the upper byte with zeros 133 uint8_t *rxData; ///< Buffer to store received data For character sizes 134 ///< < 8 bits, pad the MSB of each byte with zeros. For 135 ///< character sizes > 8 bits, use two bytes per character 136 ///< and pad the MSB of the upper byte with zeros 137 uint32_t txLen; ///< Number of bytes to be sent from txData 138 uint32_t rxLen; ///< Number of bytes to be stored in rxData 139 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 140 uint32_t rxCnt; ///< Number of bytes stored in rxData 141 142 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 143 }; 144 145 /* ************************************************************************* */ 146 /* Control/Configuration functions */ 147 /* ************************************************************************* */ 148 149 /** 150 * @brief Initialize and enable SPI peripheral. 151 * 152 * This function initializes everything necessary to call a SPI transaction function. 153 * Some parameters are set to defaults as follows: 154 * SPI Mode - 0 155 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 156 * 157 * These parameters can be modified after initialization using low level functions 158 * 159 * @note On default this function enables SPI peripheral clock and spi gpio pins. 160 * if you wish to manage clock and gpio related things in upper level instead of here. 161 * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. 162 * By this flag this function will remove clock and gpio related codes from file 163 * 164 * @param spi Pointer to SPI registers (selects the SPI block used.) 165 * @param masterMode Whether to put the device in master or slave mode. Use 166 * non-zero for master mode, and zero for slave mode. 167 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 168 * non-zero if the pins are needed (if Quad Mode will 169 * be used), and zero if they are not needed (quad mode 170 * will never be used). 171 * @param numSlaves The number of slaves used, if in master mode. This 172 * is used to obtain control of the necessary SS pins. 173 * In slave mode this is ignored and SS1 is used. 174 * @param ssPolarity This field sets the SS active polarity for each 175 * slave, each bit position corresponds to each SS line. 176 * @param hz The requested clock frequency. The actual clock frequency 177 * will be returned by the function if successful. Used in 178 * master mode only. 179 * @param pins SPI pin structure. Pins selected as true will be initialized 180 * for the requested SPI block. Has no effect incase of 181 * MSDK_NO_GPIO_CLK_INIT has been defined. 182 * 183 * @return If successful, the actual clock frequency is returned. Otherwise, see 184 * \ref MXC_Error_Codes for a list of return codes. 185 */ 186 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 187 unsigned ssPolarity, unsigned int hz, mxc_spi_pins_t pins); 188 189 /** 190 * @brief Disable and shutdown SPI peripheral. 191 * 192 * @param spi Pointer to SPI registers (selects the SPI block used.) 193 * 194 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 195 */ 196 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 197 198 /** 199 * @brief Checks if the given SPI bus can be placed in sleep mode. 200 * 201 * This functions checks to see if there are any on-going SPI transactions in 202 * progress. If there are transactions in progress, the application should 203 * wait until the SPI bus is free before entering a low-power state. 204 * 205 * @param spi Pointer to SPI registers (selects the SPI block used.) 206 * 207 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 208 * MXC_Error_Codes for the list of error return codes. 209 */ 210 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 211 212 /** 213 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 214 * 215 * @param spi Pointer to SPI registers (selects the SPI block used.) 216 * 217 * @return Frequency of the clock used as the bit rate generator 218 */ 219 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 220 221 /** 222 * @brief Set the frequency of the SPI interface. 223 * 224 * This function is applicable in Master mode only 225 * 226 * @param spi Pointer to SPI registers (selects the SPI block used.) 227 * @param hz The desired frequency in Hertz. 228 * 229 * @return Negative if error, otherwise actual speed set. See \ref 230 * MXC_Error_Codes for the list of error return codes. 231 */ 232 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 233 234 /** 235 * @brief Get the frequency of the SPI interface. 236 * 237 * This function is applicable in Master mode only 238 * 239 * @param spi Pointer to SPI registers (selects the SPI block used.) 240 * 241 * @return The SPI bus frequency in Hertz 242 */ 243 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 244 245 /** 246 * @brief Sets the number of bits per character 247 * 248 * @param spi Pointer to SPI registers (selects the SPI block used.) 249 * @param dataSize The number of bits per character 250 * 251 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 252 */ 253 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 254 255 /** 256 * @brief Gets the number of bits per character 257 * 258 * @param spi Pointer to SPI registers (selects the SPI block used.) 259 * 260 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 261 */ 262 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 263 264 /* ************************************************************************* */ 265 /* Low-level functions */ 266 /* ************************************************************************* */ 267 268 /** 269 * @brief Sets the slave select (SS) line used for transmissions 270 * 271 * This function is applicable in Master mode only 272 * 273 * @param spi Pointer to SPI registers (selects the SPI block used.) 274 * @param ssIdx Slave select index 275 * 276 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 277 */ 278 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 279 280 /** 281 * @brief Gets the slave select (SS) line used for transmissions 282 * 283 * This function is applicable in Master mode only 284 * 285 * @param spi Pointer to SPI registers (selects the SPI block used.) 286 * 287 * @return slave slect 288 */ 289 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 290 291 /** 292 * @brief Sets the SPI width used for transmissions 293 * 294 * @param spi Pointer to SPI registers (selects the SPI block used.) 295 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 296 * 297 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 298 */ 299 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 300 301 /** 302 * @brief Gets the SPI width used for transmissions 303 * 304 * @param spi Pointer to SPI registers (selects the SPI block used.) 305 * 306 * @return Spi Width 307 */ 308 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 309 310 /** 311 * @brief Sets the spi mode using clock polarity and clock phase 312 * 313 * @param spi Pointer to SPI registers (selects the SPI block used.) 314 * @param spiMode \ref mxc_spi_mode_t 315 * 316 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 317 */ 318 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 319 320 /** 321 * @brief Gets the spi mode 322 * 323 * @param spi Pointer to SPI registers (selects the SPI block used.) 324 * 325 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 326 */ 327 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 328 329 /** 330 * @brief Starts a SPI Transmission 331 * 332 * This function is applicable in Master mode only 333 * 334 * The user must ensure that there are no ongoing transmissions before 335 * calling this function 336 * 337 * @param spi Pointer to SPI registers (selects the SPI block used.) 338 * 339 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 340 */ 341 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 342 343 /** 344 * @brief Checks the SPI Peripheral for an ongoing transmission 345 * 346 * This function is applicable in Master mode only 347 * 348 * @param spi Pointer to SPI registers (selects the SPI block used.) 349 * 350 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 351 */ 352 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 353 354 /** 355 * @brief Aborts an ongoing SPI Transmission 356 * 357 * This function is applicable in Master mode only 358 * 359 * @param spi Pointer to SPI registers (selects the SPI block used.) 360 * 361 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 362 */ 363 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 364 365 /** 366 * @brief Unloads bytes from the receive FIFO. 367 * 368 * @param spi Pointer to SPI registers (selects the SPI block used.) 369 * @param bytes The buffer to read the data into. 370 * @param len The number of bytes to read. 371 * 372 * @return The number of bytes actually read. 373 */ 374 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 375 376 /** 377 * @brief Get the number of bytes currently available in the receive FIFO. 378 * 379 * @param spi Pointer to SPI registers (selects the SPI block used.) 380 * 381 * @return The number of bytes available. 382 */ 383 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 384 385 /** 386 * @brief Loads bytes into the transmit FIFO. 387 * 388 * @param spi Pointer to SPI registers (selects the SPI block used.) 389 * @param bytes The buffer containing the bytes to write 390 * @param len The number of bytes to write. 391 * 392 * @return The number of bytes actually written. 393 */ 394 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 395 396 /** 397 * @brief Get the amount of free space available in the transmit FIFO. 398 * 399 * @param spi Pointer to SPI registers (selects the SPI block used.) 400 * 401 * @return The number of bytes available. 402 */ 403 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 404 405 /** 406 * @brief Removes and discards all bytes currently in the receive FIFO. 407 * 408 * @param spi Pointer to SPI registers (selects the SPI block used.) 409 */ 410 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 411 412 /** 413 * @brief Removes and discards all bytes currently in the transmit FIFO. 414 * 415 * @param spi Pointer to SPI registers (selects the SPI block used.) 416 */ 417 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 418 419 /** 420 * @brief Set the receive threshold level. 421 * 422 * RX FIFO Receive threshold. Smaller values will cause 423 * interrupts to occur more often, but reduce the possibility 424 * of losing data because of a FIFO overflow. Larger values 425 * will reduce the time required by the ISR, but increase the 426 * possibility of data loss. Passing an invalid value will 427 * cause the driver to use the value already set in the 428 * appropriate register. 429 * 430 * @param spi Pointer to SPI registers (selects the SPI block used.) 431 * @param numBytes The threshold level to set. This value must be 432 * between 0 and 8 inclusive. 433 * 434 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 435 */ 436 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 437 438 /** 439 * @brief Get the current receive threshold level. 440 * 441 * @param spi Pointer to SPI registers (selects the SPI block used.) 442 * 443 * @return The receive threshold value (in bytes). 444 */ 445 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 446 447 /** 448 * @brief Set the transmit threshold level. 449 * 450 * TX FIFO threshold. Smaller values will cause interrupts 451 * to occur more often, but reduce the possibility of terminating 452 * a transaction early in master mode, or transmitting invalid data 453 * in slave mode. Larger values will reduce the time required by 454 * the ISR, but increase the possibility errors occurring. Passing 455 * an invalid value will cause the driver to use the value already 456 * set in the appropriate register. 457 * 458 * @param spi Pointer to SPI registers (selects the SPI block used.) 459 * @param numBytes The threshold level to set. This value must be 460 * between 0 and 8 inclusive. 461 * 462 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 463 */ 464 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 465 466 /** 467 * @brief Get the current transmit threshold level. 468 * 469 * @param spi Pointer to SPI registers (selects the SPI block used.) 470 * 471 * @return The transmit threshold value (in bytes). 472 */ 473 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 474 475 /** 476 * @brief Gets the interrupt flags that are currently set 477 * 478 * These functions should not be used while using non-blocking Transaction Level 479 * functions (Async or DMA) 480 * 481 * @param spi Pointer to SPI registers (selects the SPI block used.) 482 * 483 * @return The interrupt flags 484 */ 485 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 486 487 /** 488 * @brief Clears the interrupt flags that are currently set 489 * 490 * These functions should not be used while using non-blocking Transaction Level 491 * functions (Async or DMA) 492 * 493 * @param spi Pointer to SPI registers (selects the SPI block used.) 494 * 495 */ 496 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 497 498 /** 499 * @brief Enables specific interrupts 500 * 501 * These functions should not be used while using non-blocking Transaction Level 502 * functions (Async or DMA) 503 * 504 * @param spi Pointer to SPI registers (selects the SPI block used.) 505 * @param intEn The interrupts to be enabled 506 */ 507 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int intEn); 508 509 /** 510 * @brief Disables specific interrupts 511 * 512 * These functions should not be used while using non-blocking Transaction Level 513 * functions (Async or DMA) 514 * 515 * @param spi Pointer to SPI registers (selects the SPI block used.) 516 * @param intDis The interrupts to be disabled 517 */ 518 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis); 519 520 /* ************************************************************************* */ 521 /* Transaction level functions */ 522 /* ************************************************************************* */ 523 524 /** 525 * @brief Performs a blocking SPI transaction. 526 * 527 * Performs a blocking SPI transaction. 528 * These actions will be performed in Master Mode: 529 * 1. Assert the specified SS 530 * 2. In Full Duplex Modes, send TX data while receiving RX Data 531 * if rxLen > txLen, pad txData with DefaultTXData 532 * if txLen > rxLen, discard rxData where rxCnt > rxLen 533 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 534 * 4. Deassert the specified SS 535 * 536 * These actions will be performed in Slave Mode: 537 * 1. Fill FIFO with txData 538 * 2. Wait for SS Assert 539 * 3. If needed, pad txData with DefaultTXData 540 * 4. Unload RX FIFO as needed 541 * 5. On SS Deassert, return 542 * 543 * @param req Pointer to details of the transaction 544 * 545 * @return See \ref MXC_Error_Codes for the list of error return codes. 546 */ 547 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 548 549 /** 550 * @brief Setup an interrupt-driven SPI transaction 551 * 552 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 553 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 554 * 555 * @param req Pointer to details of the transaction 556 * 557 * @return See \ref MXC_Error_Codes for the list of error return codes. 558 */ 559 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 560 561 /** 562 * @brief Setup a DMA driven SPI transaction 563 * 564 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 565 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 566 * 567 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 568 * set up to load/unload the FIFOs with as few interrupt-based events as 569 * possible. The channel will be reset and returned to the system at the end of 570 * the transaction. 571 * 572 * @param req Pointer to details of the transaction 573 * 574 * @return See \ref MXC_Error_Codes for the list of error return codes. 575 */ 576 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); 577 578 /** 579 * @brief Performs a blocking SPI transaction. 580 * 581 * Performs a blocking SPI transaction. 582 * These actions will be performed in Slave Mode: 583 * 1. Fill FIFO with txData 584 * 2. Wait for SS Assert 585 * 3. If needed, pad txData with DefaultTXData 586 * 4. Unload RX FIFO as needed 587 * 5. On SS Deassert, return 588 * 589 * @param req Pointer to details of the transaction 590 * 591 * @return See \ref MXC_Error_Codes for the list of error return codes. 592 */ 593 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 594 595 /** 596 * @brief Setup an interrupt-driven SPI transaction 597 * 598 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 599 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 600 * 601 * @param req Pointer to details of the transactionz 602 * 603 * @return See \ref MXC_Error_Codes for the list of error return codes. 604 */ 605 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 606 607 /** 608 * @brief Setup a DMA driven SPI transaction 609 * 610 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 611 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 612 * 613 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 614 * set up to load/unload the FIFOs with as few interrupt-based events as 615 * possible. The channel will be reset and returned to the system at the end of 616 * the transaction. 617 * 618 * @param req Pointer to details of the transaction 619 * 620 * @return See \ref MXC_Error_Codes for the list of error return codes. 621 */ 622 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); 623 624 /** 625 * @brief Sets the TX data to transmit as a 'dummy' byte 626 * 627 * In single wire master mode, this data is transmitted on MOSI when performing 628 * an RX (MISO) only transaction. This defaults to 0. 629 * 630 * @param spi Pointer to SPI registers (selects the SPI block used.) 631 * @param defaultTXData Data to shift out in RX-only transactions 632 * 633 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 634 */ 635 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 636 637 /** 638 * @brief Abort any asynchronous requests in progress. 639 * 640 * Abort any asynchronous requests in progress. Any callbacks associated with 641 * the active transaction will be executed to indicate when the transaction 642 * has been terminated. 643 * 644 * @param spi Pointer to SPI registers (selects the SPI block used.) 645 */ 646 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 647 648 /** 649 * @brief The processing function for asynchronous transactions. 650 * 651 * When using the asynchronous functions, the application must call this 652 * function periodically. This can be done from within the SPI interrupt 653 * handler or periodically by the application if SPI interrupts are disabled. 654 * 655 * @param spi Pointer to SPI registers (selects the SPI block used.) 656 */ 657 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 658 659 /** 660 * @brief Enable/Disable HW CS control feature. 661 * 662 * Depending on the application, the user might need to manually drive the slave select pin. 663 * The SPI driver automatically drives the SS pin and this function enables/disables this 664 * feature. 665 * 666 * @param spi Pointer to SPI registers (selects the SPI block used.) 667 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 668 */ 669 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 670 671 /**@} end of group spi */ 672 673 #ifdef __cplusplus 674 } 675 #endif 676 677 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32690_SPI_H_ 678
