1 /** 2 * @file 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_SPI_H_ 26 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_SPI_H_ 27 28 /***** includes *******/ 29 #include <stdbool.h> 30 #include "spi_regs.h" 31 #include "mxc_sys.h" 32 #include "mxc_assert.h" 33 #include "gpio.h" 34 #include "mxc_pins.h" 35 #include "mxc_lock.h" 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 /** 42 * @defgroup spi SPI 43 * @ingroup periphlibs 44 * @{ 45 */ 46 47 /***** Definitions *****/ 48 49 /** 50 * @brief The list of SPI Widths supported 51 * 52 * The SPI Width can be set on a per-transaction basis. 53 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 54 * given. 55 * 56 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 57 * The IC requires a SPI Read to be executed as 58 * 1. Assert SS 59 * 2. Write an 8bit register address 60 * 3. Read back the 8 bit register 61 * 4. Deassert SS 62 * This can be accomplished with the STANDARD_HALFDUPLEX width 63 * 1. set txData to the address, txLen=1 64 * 2. set rxData to a buffer of 1 byte, rxLen=1 65 * 3. The driver will transmit the txData, and after completion of 66 * txData begin to recieve data, padding MOSI with DefaultTXData 67 * 68 */ 69 typedef enum { 70 SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex 71 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 72 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 73 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 74 } mxc_spi_width_t; 75 76 /** 77 * @brief The list of SPI modes 78 * 79 * SPI supports four combinations of clock and phase polarity 80 * 81 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 82 * and determines if the clock is active high or active low 83 * 84 * Clock phase determines when the data must be stable for sampling 85 * 86 */ 87 typedef enum { 88 SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 89 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 90 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 91 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 92 } mxc_spi_mode_t; 93 94 typedef struct _mxc_spi_pins_t mxc_spi_pins_t; 95 96 /** 97 * @brief Structure used to initialize SPI pins. 98 * 99 * @note All values must be initialized. 100 * 101 * @note True equals pin is set for the spi function false the pin is left to its latest state. 102 */ 103 struct _mxc_spi_pins_t { 104 bool clock; ///<Clock pin 105 bool ss0; ///< Slave select pin 0 106 bool ss1; ///< Slave select pin 1 107 bool ss2; ///< Slave select pin 2 108 bool miso; ///< miso pin 109 bool mosi; ///< mosi pin 110 bool sdio2; ///< SDIO2 pin 111 bool sdio3; ///< SDIO3 pin 112 bool vddioh; ///< VDDIOH Select 113 }; 114 115 typedef struct _mxc_spi_req_t mxc_spi_req_t; 116 /** 117 * @brief The callback routine used to indicate the transaction has terminated. 118 * 119 * @param req The details of the transaction. 120 * @param result See \ref MXC_Error_Codes for the list of error codes. 121 */ 122 typedef void (*spi_complete_cb_t)(void *req, int result); 123 124 /** 125 * @brief The information required to perform a complete SPI transaction 126 * 127 * This structure is used by blocking, async, and DMA based transactions. 128 * @note "completeCB" only needs to be initialized for interrupt driven (Async) and DMA transactions. 129 */ 130 struct _mxc_spi_req_t { 131 mxc_spi_regs_t *spi; ///<Point to SPI registers 132 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 133 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 134 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 135 ///< < 8 bits, pad the MSB of each byte with zeros. For 136 ///< character sizes > 8 bits, use two bytes per character 137 ///< and pad the MSB of the upper byte with zeros 138 uint8_t *rxData; ///< Buffer to store received data For character sizes 139 ///< < 8 bits, pad the MSB of each byte with zeros. For 140 ///< character sizes > 8 bits, use two bytes per character 141 ///< and pad the MSB of the upper byte with zeros 142 uint32_t txLen; ///< Number of bytes to be sent from txData 143 uint32_t rxLen; ///< Number of bytes to be stored in rxData 144 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 145 uint32_t rxCnt; ///< Number of bytes stored in rxData 146 147 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 148 }; 149 150 /* ************************************************************************* */ 151 /* Control/Configuration functions */ 152 /* ************************************************************************* */ 153 154 /** 155 * @brief Initialize and enable SPI peripheral. 156 * 157 * This function initializes everything necessary to call a SPI transaction function. 158 * Some parameters are set to defaults as follows: 159 * SPI Mode - 0 160 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 161 * 162 * These parameters can be modified after initialization using low level functions 163 * 164 * @note On default this function enables SPI peripheral clock and spi gpio pins. 165 * if you wish to manage clock and gpio related things in upper level instead of here. 166 * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. 167 * By this flag this function will remove clock and gpio related codes from file. 168 * 169 * @param spi Pointer to SPI registers (selects the SPI block used.) 170 * @param masterMode Whether to put the device in master or slave mode. Use 171 * non-zero for master mode, and zero for slave mode. 172 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 173 * non-zero if the pins are needed (if Quad Mode will 174 * be used), and zero if they are not needed (quad mode 175 * will never be used). 176 * @param numSlaves The number of slaves used, if in master mode. This 177 * is used to obtain control of the necessary SS pins. 178 * In slave mode this is ignored and SS1 is used. 179 * @param ssPolarity This field sets the SS active polarity for each 180 * slave, each bit position corresponds to each SS line. 181 * @param hz The requested clock frequency. The actual clock frequency 182 * will be returned by the function if successful. Used in 183 * master mode only. 184 * @param pins SPI pin structure. Pins selected as true will be initialized 185 * for the requested SPI block. 186 * 187 * @return If successful, the actual clock frequency is returned. Otherwise, see 188 * \ref MXC_Error_Codes for a list of return codes. 189 */ 190 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 191 unsigned ssPolarity, unsigned int hz, mxc_spi_pins_t pins); 192 193 /** 194 * @brief Disable and shutdown SPI peripheral. 195 * 196 * @param spi Pointer to SPI registers (selects the SPI block used.) 197 * 198 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 199 */ 200 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 201 202 /** 203 * @brief Checks if the given SPI bus can be placed in sleep mode. 204 * 205 * This functions checks to see if there are any on-going SPI transactions in 206 * progress. If there are transactions in progress, the application should 207 * wait until the SPI bus is free before entering a low-power state. 208 * 209 * @param spi Pointer to SPI registers (selects the SPI block used.) 210 * 211 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 212 * MXC_Error_Codes for the list of error return codes. 213 */ 214 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 215 216 /** 217 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 218 * 219 * @param spi Pointer to SPI registers (selects the SPI block used.) 220 * 221 * @return Frequency of the clock used as the bit rate generator 222 */ 223 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 224 225 /** 226 * @brief Set the frequency of the SPI interface. 227 * 228 * This function is applicable in Master mode only 229 * 230 * @param spi Pointer to SPI registers (selects the SPI block used.) 231 * @param hz The desired frequency in Hertz. 232 * 233 * @return Negative if error, otherwise actual speed set. See \ref 234 * MXC_Error_Codes for the list of error return codes. 235 */ 236 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 237 238 /** 239 * @brief Get the frequency of the SPI interface. 240 * 241 * This function is applicable in Master mode only 242 * 243 * @param spi Pointer to SPI registers (selects the SPI block used.) 244 * 245 * @return The SPI bus frequency in Hertz 246 */ 247 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 248 249 /** 250 * @brief Sets the number of bits per character 251 * 252 * @param spi Pointer to SPI registers (selects the SPI block used.) 253 * @param dataSize The number of bits per character 254 * 255 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 256 */ 257 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 258 259 /** 260 * @brief Gets the number of bits per character 261 * 262 * @param spi Pointer to SPI registers (selects the SPI block used.) 263 * 264 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 265 */ 266 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 267 268 /* ************************************************************************* */ 269 /* Low-level functions */ 270 /* ************************************************************************* */ 271 272 /** 273 * @brief Sets the slave select (SS) line used for transmissions 274 * 275 * This function is applicable in Master mode only 276 * 277 * @param spi Pointer to SPI registers (selects the SPI block used.) 278 * @param ssIdx Slave select index 279 * 280 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 281 */ 282 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 283 284 /** 285 * @brief Gets the slave select (SS) line used for transmissions 286 * 287 * This function is applicable in Master mode only 288 * 289 * @param spi Pointer to SPI registers (selects the SPI block used.) 290 * 291 * @return slave slect 292 */ 293 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 294 295 /** 296 * @brief Sets the SPI width used for transmissions 297 * 298 * @param spi Pointer to SPI registers (selects the SPI block used.) 299 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 300 * 301 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 302 */ 303 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 304 305 /** 306 * @brief Gets the SPI width used for transmissions 307 * 308 * @param spi Pointer to SPI registers (selects the SPI block used.) 309 * 310 * @return Spi Width 311 */ 312 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 313 314 /** 315 * @brief Sets the spi mode using clock polarity and clock phase 316 * 317 * @param spi Pointer to SPI registers (selects the SPI block used.) 318 * @param spiMode \ref mxc_spi_mode_t 319 * 320 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 321 */ 322 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 323 324 /** 325 * @brief Gets the spi mode 326 * 327 * @param spi Pointer to SPI registers (selects the SPI block used.) 328 * 329 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 330 */ 331 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 332 333 /** 334 * @brief Starts a SPI Transmission 335 * 336 * This function is applicable in Master mode only 337 * 338 * The user must ensure that there are no ongoing transmissions before 339 * calling this function 340 * 341 * @param spi Pointer to SPI registers (selects the SPI block used.) 342 * 343 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 344 */ 345 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 346 347 /** 348 * @brief Checks the SPI Peripheral for an ongoing transmission 349 * 350 * This function is applicable in Master mode only 351 * 352 * @param spi Pointer to SPI registers (selects the SPI block used.) 353 * 354 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 355 */ 356 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 357 358 /** 359 * @brief Aborts an ongoing SPI Transmission 360 * 361 * This function is applicable in Master mode only 362 * 363 * @param spi Pointer to SPI registers (selects the SPI block used.) 364 * 365 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 366 */ 367 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 368 369 /** 370 * @brief Unloads bytes from the receive FIFO. 371 * 372 * @param spi Pointer to SPI registers (selects the SPI block used.) 373 * @param bytes The buffer to read the data into. 374 * @param len The number of bytes to read. 375 * 376 * @return The number of bytes actually read. 377 */ 378 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 379 380 /** 381 * @brief Get the number of bytes currently available in the receive FIFO. 382 * 383 * @param spi Pointer to SPI registers (selects the SPI block used.) 384 * 385 * @return The number of bytes available. 386 */ 387 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 388 389 /** 390 * @brief Loads bytes into the transmit FIFO. 391 * 392 * @param spi Pointer to SPI registers (selects the SPI block used.) 393 * @param bytes The buffer containing the bytes to write 394 * @param len The number of bytes to write. 395 * 396 * @return The number of bytes actually written. 397 */ 398 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 399 400 /** 401 * @brief Get the amount of free space available in the transmit FIFO. 402 * 403 * @param spi Pointer to SPI registers (selects the SPI block used.) 404 * 405 * @return The number of bytes available. 406 */ 407 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 408 409 /** 410 * @brief Removes and discards all bytes currently in the receive FIFO. 411 * 412 * @param spi Pointer to SPI registers (selects the SPI block used.) 413 */ 414 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 415 416 /** 417 * @brief Removes and discards all bytes currently in the transmit FIFO. 418 * 419 * @param spi Pointer to SPI registers (selects the SPI block used.) 420 */ 421 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 422 423 /** 424 * @brief Set the receive threshold level. 425 * 426 * RX FIFO Receive threshold. Smaller values will cause 427 * interrupts to occur more often, but reduce the possibility 428 * of losing data because of a FIFO overflow. Larger values 429 * will reduce the time required by the ISR, but increase the 430 * possibility of data loss. Passing an invalid value will 431 * cause the driver to use the value already set in the 432 * appropriate register. 433 * 434 * @param spi Pointer to SPI registers (selects the SPI block used.) 435 * @param numBytes The threshold level to set. This value must be 436 * between 0 and 8 inclusive. 437 * 438 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 439 */ 440 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 441 442 /** 443 * @brief Get the current receive threshold level. 444 * 445 * @param spi Pointer to SPI registers (selects the SPI block used.) 446 * 447 * @return The receive threshold value (in bytes). 448 */ 449 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 450 451 /** 452 * @brief Set the transmit threshold level. 453 * 454 * TX FIFO threshold. Smaller values will cause interrupts 455 * to occur more often, but reduce the possibility of terminating 456 * a transaction early in master mode, or transmitting invalid data 457 * in slave mode. Larger values will reduce the time required by 458 * the ISR, but increase the possibility errors occurring. Passing 459 * an invalid value will cause the driver to use the value already 460 * set in the appropriate register. 461 * 462 * @param spi Pointer to SPI registers (selects the SPI block used.) 463 * @param numBytes The threshold level to set. This value must be 464 * between 0 and 8 inclusive. 465 * 466 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 467 */ 468 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 469 470 /** 471 * @brief Get the current transmit threshold level. 472 * 473 * @param spi Pointer to SPI registers (selects the SPI block used.) 474 * 475 * @return The transmit threshold value (in bytes). 476 */ 477 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 478 479 /** 480 * @brief Gets the interrupt flags that are currently set 481 * 482 * These functions should not be used while using non-blocking Transaction Level 483 * functions (Async or DMA) 484 * 485 * @param spi Pointer to SPI registers (selects the SPI block used.) 486 * 487 * @return The interrupt flags 488 */ 489 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 490 491 /** 492 * @brief Clears the interrupt flags that are currently set 493 * 494 * These functions should not be used while using non-blocking Transaction Level 495 * functions (Async or DMA) 496 * 497 * @param spi Pointer to SPI registers (selects the SPI block used.) 498 * 499 */ 500 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 501 502 /** 503 * @brief Enables specific interrupts 504 * 505 * These functions should not be used while using non-blocking Transaction Level 506 * functions (Async or DMA) 507 * 508 * @param spi Pointer to SPI registers (selects the SPI block used.) 509 * @param intEn The interrupts to be enabled 510 */ 511 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int intEn); 512 513 /** 514 * @brief Disables specific interrupts 515 * 516 * These functions should not be used while using non-blocking Transaction Level 517 * functions (Async or DMA) 518 * 519 * @param spi Pointer to SPI registers (selects the SPI block used.) 520 * @param intDis The interrupts to be disabled 521 */ 522 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis); 523 524 /* ************************************************************************* */ 525 /* Transaction level functions */ 526 /* ************************************************************************* */ 527 528 /** 529 * @brief Performs a blocking SPI transaction. 530 * 531 * Performs a blocking SPI transaction. 532 * These actions will be performed in Master Mode: 533 * 1. Assert the specified SS 534 * 2. In Full Duplex Modes, send TX data while receiving RX Data 535 * if rxLen > txLen, pad txData with DefaultTXData 536 * if txLen > rxLen, discard rxData where rxCnt > rxLen 537 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 538 * 4. Deassert the specified SS 539 * 540 * These actions will be performed in Slave Mode: 541 * 1. Fill FIFO with txData 542 * 2. Wait for SS Assert 543 * 3. If needed, pad txData with DefaultTXData 544 * 4. Unload RX FIFO as needed 545 * 5. On SS Deassert, return 546 * 547 * @param req Pointer to details of the transaction 548 * 549 * @return See \ref MXC_Error_Codes for the list of error return codes. 550 */ 551 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 552 553 /** 554 * @brief Setup an interrupt-driven SPI transaction 555 * 556 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 557 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 558 * 559 * @param req Pointer to details of the transaction 560 * 561 * @return See \ref MXC_Error_Codes for the list of error return codes. 562 */ 563 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 564 565 /** 566 * @brief Setup a DMA driven SPI transaction 567 * 568 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 569 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 570 * 571 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 572 * set up to load/unload the FIFOs with as few interrupt-based events as 573 * possible. The channel will be reset and returned to the system at the end of 574 * the transaction. 575 * 576 * @param req Pointer to details of the transaction 577 * 578 * @return See \ref MXC_Error_Codes for the list of error return codes. 579 */ 580 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); 581 582 /** 583 * @brief Performs a blocking SPI transaction. 584 * 585 * Performs a blocking SPI transaction. 586 * These actions will be performed in Slave Mode: 587 * 1. Fill FIFO with txData 588 * 2. Wait for SS Assert 589 * 3. If needed, pad txData with DefaultTXData 590 * 4. Unload RX FIFO as needed 591 * 5. On SS Deassert, return 592 * 593 * @param req Pointer to details of the transaction 594 * 595 * @return See \ref MXC_Error_Codes for the list of error return codes. 596 */ 597 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 598 599 /** 600 * @brief Setup an interrupt-driven SPI transaction 601 * 602 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 603 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 604 * 605 * @param req Pointer to details of the transactionz 606 * 607 * @return See \ref MXC_Error_Codes for the list of error return codes. 608 */ 609 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 610 611 /** 612 * @brief Setup a DMA driven SPI transaction 613 * 614 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 615 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 616 * 617 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 618 * set up to load/unload the FIFOs with as few interrupt-based events as 619 * possible. The channel will be reset and returned to the system at the end of 620 * the transaction. 621 * 622 * @param req Pointer to details of the transaction 623 * 624 * @return See \ref MXC_Error_Codes for the list of error return codes. 625 */ 626 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); 627 628 /** 629 * @brief Sets the TX data to transmit as a 'dummy' byte 630 * 631 * In single wire master mode, this data is transmitted on MOSI when performing 632 * an RX (MISO) only transaction. This defaults to 0. 633 * 634 * @param spi Pointer to SPI registers (selects the SPI block used.) 635 * @param defaultTXData Data to shift out in RX-only transactions 636 * 637 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 638 */ 639 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 640 641 /** 642 * @brief Abort any asynchronous requests in progress. 643 * 644 * Abort any asynchronous requests in progress. Any callbacks associated with 645 * the active transaction will be executed to indicate when the transaction 646 * has been terminated. 647 * 648 * @param spi Pointer to SPI registers (selects the SPI block used.) 649 */ 650 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 651 652 /** 653 * @brief The processing function for asynchronous transactions. 654 * 655 * When using the asynchronous functions, the application must call this 656 * function periodically. This can be done from within the SPI interrupt 657 * handler or periodically by the application if SPI interrupts are disabled. 658 * 659 * @param spi Pointer to SPI registers (selects the SPI block used.) 660 */ 661 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 662 663 /** 664 * @brief Enable/Disable HW CS control feature. 665 * 666 * Depending on the application, the user might need to manually drive the slave select pin. 667 * The SPI driver automatically drives the SS pin and this function enables/disables this 668 * feature. 669 * 670 * @param spi Pointer to SPI registers (selects the SPI block used.) 671 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 672 */ 673 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 674 675 /**@} end of group spi */ 676 677 #ifdef __cplusplus 678 } 679 #endif 680 681 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32680_SPI_H_ 682
