1 /** 2 * @file spi.h 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_SPI_H_ 27 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_SPI_H_ 28 29 /***** includes *******/ 30 #include "spi_regs.h" 31 #include "mxc_sys.h" 32 #include "mxc_assert.h" 33 #include "gpio.h" 34 #include "mxc_pins.h" 35 #include "mxc_lock.h" 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 /** 42 * @defgroup spi SPI 43 * @ingroup periphlibs 44 * @{ 45 */ 46 47 /***** Definitions *****/ 48 49 /** 50 * @brief The list of SPI Widths supported 51 * 52 * The SPI Width can be set on a per-transaction basis. 53 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 54 * given. 55 * 56 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 57 * The IC requires a SPI Read to be executed as 58 * 1. Assert SS 59 * 2. Write an 8bit register address 60 * 3. Read back the 8 bit register 61 * 4. Deassert SS 62 * This can be accomplished with the STANDARD_HALFDUPLEX width 63 * 1. set txData to the address, txLen=1 64 * 2. set rxData to a buffer of 1 byte, rxLen=1 65 * 3. The driver will transmit the txData, and after completion of 66 * txData begin to recieve data, padding MOSI with DefaultTXData 67 * 68 */ 69 typedef enum { 70 SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex 71 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 72 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 73 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 74 } mxc_spi_width_t; 75 76 /** 77 * @brief The list of SPI modes 78 * 79 * SPI supports four combinations of clock and phase polarity 80 * 81 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 82 * and determines if the clock is active high or active low 83 * 84 * Clock phase determines when the data must be stable for sampling 85 * 86 */ 87 typedef enum { 88 SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 89 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 90 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 91 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 92 } mxc_spi_mode_t; 93 94 typedef struct _mxc_spi_req_t mxc_spi_req_t; 95 96 /** 97 * @brief The callback routine used to indicate the transaction has terminated. 98 * 99 * @param req The details of the transaction. 100 * @param result See \ref MXC_Error_Codes for the list of error codes. 101 */ 102 typedef void (*spi_complete_cb_t)(void *req, int result); 103 104 /** 105 * @brief The information required to perform a complete SPI transaction 106 * 107 * This structure is used by blocking, async, and DMA based transactions. 108 */ 109 struct _mxc_spi_req_t { 110 mxc_spi_regs_t *spi; ///<Point to SPI registers 111 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 112 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 113 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 114 ///< < 8 bits, pad the MSB of each byte with zeros. For 115 ///< character sizes > 8 bits, use two bytes per character 116 ///< and pad the MSB of the upper byte with zeros 117 uint8_t *rxData; ///< Buffer to store received data For character sizes 118 ///< < 8 bits, pad the MSB of each byte with zeros. For 119 ///< character sizes > 8 bits, use two bytes per character 120 ///< and pad the MSB of the upper byte with zeros 121 uint32_t txLen; ///< Number of bytes to be sent from txData 122 uint32_t rxLen; ///< Number of bytes to be stored in rxData 123 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 124 uint32_t rxCnt; ///< Number of bytes stored in rxData 125 126 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 127 }; 128 129 /* ************************************************************************* */ 130 /* Control/Configuration functions */ 131 /* ************************************************************************* */ 132 133 /** 134 * @brief Initialize and enable SPI peripheral. 135 * 136 * This function initializes everything necessary to call a SPI transaction function. 137 * Some parameters are set to defaults as follows: 138 * SPI Mode - 0 139 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 140 * 141 * These parameters can be modified after initialization using low level functions 142 * 143 * @note On default this function enables SPI peripheral clock and spi gpio pins. 144 * if you wish to manage clock and gpio related things in upper level instead of here. 145 * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. 146 * By this flag this function will remove clock and gpio related codes from file. 147 * 148 * @param spi Pointer to SPI registers (selects the SPI block used.) 149 * @param masterMode Whether to put the device in master or slave mode. Use 150 * non-zero for master mode, and zero for slave mode. 151 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 152 * non-zero if the pins are needed (if Quad Mode will 153 * be used), and zero if they are not needed (quad mode 154 * will never be used). 155 * @param numSlaves The number of slaves used, if in master mode. This 156 * is used to obtain control of the necessary SS pins. 157 * In slave mode this is ignored and SS1 is used. 158 * @param ssPolarity This field sets the SS active polarity for each 159 * slave, each bit position corresponds to each SS line. 160 * @param hz The requested clock frequency. The actual clock frequency 161 * will be returned by the function if successful. Used in 162 * master mode only. 163 * 164 * @return If successful, the actual clock frequency is returned. Otherwise, see 165 * \ref MXC_Error_Codes for a list of return codes. 166 */ 167 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 168 unsigned ssPolarity, unsigned int hz); 169 170 /** 171 * @brief Disable and shutdown SPI peripheral. 172 * 173 * @param spi Pointer to SPI registers (selects the SPI block used.) 174 * 175 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 176 */ 177 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 178 179 /** 180 * @brief Checks if the given SPI bus can be placed in sleep mode. 181 * 182 * This functions checks to see if there are any on-going SPI transactions in 183 * progress. If there are transactions in progress, the application should 184 * wait until the SPI bus is free before entering a low-power state. 185 * 186 * @param spi Pointer to SPI registers (selects the SPI block used.) 187 * 188 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 189 * MXC_Error_Codes for the list of error return codes. 190 */ 191 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 192 193 /** 194 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 195 * 196 * @param spi Pointer to SPI registers (selects the SPI block used.) 197 * 198 * @return Frequency of the clock used as the bit rate generator 199 */ 200 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 201 202 /** 203 * @brief Set the frequency of the SPI interface. 204 * 205 * This function is applicable in Master mode only 206 * 207 * @param spi Pointer to SPI registers (selects the SPI block used.) 208 * @param hz The desired frequency in Hertz. 209 * 210 * @return Negative if error, otherwise actual speed set. See \ref 211 * MXC_Error_Codes for the list of error return codes. 212 */ 213 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 214 215 /** 216 * @brief Get the frequency of the SPI interface. 217 * 218 * This function is applicable in Master mode only 219 * 220 * @param spi Pointer to SPI registers (selects the SPI block used.) 221 * 222 * @return The SPI bus frequency in Hertz 223 */ 224 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 225 226 /** 227 * @brief Sets the number of bits per character 228 * 229 * @param spi Pointer to SPI registers (selects the SPI block used.) 230 * @param dataSize The number of bits per character 231 * 232 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 233 */ 234 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 235 236 /** 237 * @brief Gets the number of bits per character 238 * 239 * @param spi Pointer to SPI registers (selects the SPI block used.) 240 * 241 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 242 */ 243 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 244 245 /* ************************************************************************* */ 246 /* Low-level functions */ 247 /* ************************************************************************* */ 248 249 /** 250 * @brief Sets the slave select (SS) line used for transmissions 251 * 252 * This function is applicable in Master mode only 253 * 254 * @param spi Pointer to SPI registers (selects the SPI block used.) 255 * @param ssIdx Slave select index 256 * 257 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 258 */ 259 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 260 261 /** 262 * @brief Gets the slave select (SS) line used for transmissions 263 * 264 * This function is applicable in Master mode only 265 * 266 * @param spi Pointer to SPI registers (selects the SPI block used.) 267 * 268 * @return slave slect 269 */ 270 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 271 272 /** 273 * @brief Sets the SPI width used for transmissions 274 * 275 * @param spi Pointer to SPI registers (selects the SPI block used.) 276 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 277 * 278 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 279 */ 280 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 281 282 /** 283 * @brief Gets the SPI width used for transmissions 284 * 285 * @param spi Pointer to SPI registers (selects the SPI block used.) 286 * 287 * @return Spi Width \ref mxc_spi_width_t 288 */ 289 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 290 291 /** 292 * @brief Sets the spi mode using clock polarity and clock phase 293 * 294 * @param spi Pointer to SPI registers (selects the SPI block used.) 295 * @param spiMode \ref mxc_spi_mode_t 296 * 297 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 298 */ 299 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 300 301 /** 302 * @brief Gets the spi mode 303 * 304 * @param spi Pointer to SPI registers (selects the SPI block used.) 305 * 306 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 307 */ 308 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 309 310 /** 311 * @brief Starts a SPI Transmission 312 * 313 * This function is applicable in Master mode only 314 * 315 * The user must ensure that there are no ongoing transmissions before 316 * calling this function 317 * 318 * @param spi Pointer to SPI registers (selects the SPI block used.) 319 * 320 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 321 */ 322 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 323 324 /** 325 * @brief Checks the SPI Peripheral for an ongoing transmission 326 * 327 * This function is applicable in Master mode only 328 * 329 * @param spi Pointer to SPI registers (selects the SPI block used.) 330 * 331 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 332 */ 333 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 334 335 /** 336 * @brief Aborts an ongoing SPI Transmission 337 * 338 * This function is applicable in Master mode only 339 * 340 * @param spi Pointer to SPI registers (selects the SPI block used.) 341 * 342 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 343 */ 344 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 345 346 /** 347 * @brief Unloads bytes from the receive FIFO. 348 * 349 * @param spi Pointer to SPI registers (selects the SPI block used.) 350 * @param bytes The buffer to read the data into. 351 * @param len The number of bytes to read. 352 * 353 * @return The number of bytes actually read. 354 */ 355 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 356 357 /** 358 * @brief Get the number of bytes currently available in the receive FIFO. 359 * 360 * @param spi Pointer to SPI registers (selects the SPI block used.) 361 * 362 * @return The number of bytes available. 363 */ 364 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 365 366 /** 367 * @brief Loads bytes into the transmit FIFO. 368 * 369 * @param spi Pointer to SPI registers (selects the SPI block used.) 370 * @param bytes The buffer containing the bytes to write 371 * @param len The number of bytes to write. 372 * 373 * @return The number of bytes actually written. 374 */ 375 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 376 377 /** 378 * @brief Get the amount of free space available in the transmit FIFO. 379 * 380 * @param spi Pointer to SPI registers (selects the SPI block used.) 381 * 382 * @return The number of bytes available. 383 */ 384 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 385 386 /** 387 * @brief Removes and discards all bytes currently in the receive FIFO. 388 * 389 * @param spi Pointer to SPI registers (selects the SPI block used.) 390 */ 391 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 392 393 /** 394 * @brief Removes and discards all bytes currently in the transmit FIFO. 395 * 396 * @param spi Pointer to SPI registers (selects the SPI block used.) 397 */ 398 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 399 400 /** 401 * @brief Set the receive threshold level. 402 * 403 * RX FIFO Receive threshold. Smaller values will cause 404 * interrupts to occur more often, but reduce the possibility 405 * of losing data because of a FIFO overflow. Larger values 406 * will reduce the time required by the ISR, but increase the 407 * possibility of data loss. Passing an invalid value will 408 * cause the driver to use the value already set in the 409 * appropriate register. 410 * 411 * @param spi Pointer to SPI registers (selects the SPI block used.) 412 * @param numBytes The threshold level to set. This value must be 413 * between 0 and 8 inclusive. 414 * 415 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 416 */ 417 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 418 419 /** 420 * @brief Get the current receive threshold level. 421 * 422 * @param spi Pointer to SPI registers (selects the SPI block used.) 423 * 424 * @return The receive threshold value (in bytes). 425 */ 426 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 427 428 /** 429 * @brief Set the transmit threshold level. 430 * 431 * TX FIFO threshold. Smaller values will cause interrupts 432 * to occur more often, but reduce the possibility of terminating 433 * a transaction early in master mode, or transmitting invalid data 434 * in slave mode. Larger values will reduce the time required by 435 * the ISR, but increase the possibility errors occurring. Passing 436 * an invalid value will cause the driver to use the value already 437 * set in the appropriate register. 438 * 439 * @param spi Pointer to SPI registers (selects the SPI block used.) 440 * @param numBytes The threshold level to set. This value must be 441 * between 0 and 8 inclusive. 442 * 443 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 444 */ 445 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 446 447 /** 448 * @brief Get the current transmit threshold level. 449 * 450 * @param spi Pointer to SPI registers (selects the SPI block used.) 451 * 452 * @return The transmit threshold value (in bytes). 453 */ 454 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 455 456 /** 457 * @brief Gets the interrupt flags that are currently set 458 * 459 * These functions should not be used while using non-blocking Transaction Level 460 * functions (Async or DMA) 461 * 462 * @param spi Pointer to SPI registers (selects the SPI block used.) 463 * 464 * @return The interrupt flags 465 */ 466 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 467 468 /** 469 * @brief Clears the interrupt flags that are currently set 470 * 471 * These functions should not be used while using non-blocking Transaction Level 472 * functions (Async or DMA) 473 * 474 * @param spi Pointer to SPI registers (selects the SPI block used.) 475 */ 476 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 477 478 /** 479 * @brief Enables specific interrupts 480 * 481 * These functions should not be used while using non-blocking Transaction Level 482 * functions (Async or DMA) 483 * 484 * @param spi Pointer to SPI registers (selects the SPI block used.) 485 * @param mask The interrupts to be enabled 486 */ 487 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int mask); 488 489 /** 490 * @brief Disables specific interrupts 491 * 492 * These functions should not be used while using non-blocking Transaction Level 493 * functions (Async or DMA) 494 * 495 * @param spi Pointer to SPI registers (selects the SPI block used.) 496 * @param mask The interrupts to be disabled 497 */ 498 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int mask); 499 500 /* ************************************************************************* */ 501 /* Transaction level functions */ 502 /* ************************************************************************* */ 503 504 /** 505 * @brief Performs a blocking SPI transaction. 506 * 507 * Performs a blocking SPI transaction. 508 * These actions will be performed in Master Mode: 509 * 1. Assert the specified SS 510 * 2. In Full Duplex Modes, send TX data while receiving RX Data 511 * if rxLen > txLen, pad txData with DefaultTXData 512 * if txLen > rxLen, discard rxData where rxCnt > rxLen 513 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 514 * 4. Deassert the specified SS 515 * 516 * These actions will be performed in Slave Mode: 517 * 1. Fill FIFO with txData 518 * 2. Wait for SS Assert 519 * 3. If needed, pad txData with DefaultTXData 520 * 4. Unload RX FIFO as needed 521 * 5. On SS Deassert, return 522 * 523 * @param req Pointer to details of the transaction 524 * 525 * @return See \ref MXC_Error_Codes for the list of error return codes. 526 */ 527 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 528 529 /** 530 * @brief Setup an interrupt-driven SPI transaction 531 * 532 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 533 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 534 * 535 * @param req Pointer to details of the transaction 536 * 537 * @return See \ref MXC_Error_Codes for the list of error return codes. 538 */ 539 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 540 541 /** 542 * @brief Setup a DMA driven SPI transaction 543 * 544 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 545 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 546 * 547 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 548 * set up to load/unload the FIFOs with as few interrupt-based events as 549 * possible. The channel will be reset and returned to the system at the end of 550 * the transaction. 551 * 552 * @param req Pointer to details of the transaction 553 * 554 * @return See \ref MXC_Error_Codes for the list of error return codes. 555 */ 556 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); 557 558 /** 559 * @brief Performs a blocking SPI transaction. 560 * 561 * Performs a blocking SPI transaction. 562 * These actions will be performed in Slave Mode: 563 * 1. Fill FIFO with txData 564 * 2. Wait for SS Assert 565 * 3. If needed, pad txData with DefaultTXData 566 * 4. Unload RX FIFO as needed 567 * 5. On SS Deassert, return 568 * 569 * @param req Pointer to details of the transaction 570 * 571 * @return See \ref MXC_Error_Codes for the list of error return codes. 572 */ 573 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 574 575 /** 576 * @brief Setup an interrupt-driven SPI transaction 577 * 578 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 579 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 580 * 581 * @param req Pointer to details of the transactionz 582 * 583 * @return See \ref MXC_Error_Codes for the list of error return codes. 584 */ 585 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 586 587 /** 588 * @brief Setup a DMA driven SPI transaction 589 * 590 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 591 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 592 * 593 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 594 * set up to load/unload the FIFOs with as few interrupt-based events as 595 * possible. The channel will be reset and returned to the system at the end of 596 * the transaction. 597 * 598 * @param req Pointer to details of the transaction 599 * 600 * @return See \ref MXC_Error_Codes for the list of error return codes. 601 */ 602 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); 603 604 /** 605 * @brief Sets the TX data to transmit as a 'dummy' byte 606 * 607 * In single wire master mode, this data is transmitted on MOSI when performing 608 * an RX (MISO) only transaction. This defaults to 0. 609 * 610 * @param spi Pointer to SPI registers (selects the SPI block used.) 611 * @param defaultTXData Data to shift out in RX-only transactions 612 * 613 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 614 */ 615 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 616 617 /** 618 * @brief Abort any asynchronous requests in progress. 619 * 620 * Abort any asynchronous requests in progress. Any callbacks associated with 621 * the active transaction will be executed to indicate when the transaction 622 * has been terminated. 623 * 624 * @param spi Pointer to SPI registers (selects the SPI block used.) 625 */ 626 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 627 628 /** 629 * @brief The processing function for asynchronous transactions. 630 * 631 * When using the asynchronous functions, the application must call this 632 * function periodically. This can be done from within the SPI interrupt 633 * handler or periodically by the application if SPI interrupts are disabled. 634 * 635 * @param spi Pointer to SPI registers (selects the SPI block used.) 636 */ 637 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 638 639 /** 640 * @brief Enable/Disable HW CS control feature. 641 * 642 * Depending on the application, the user might need to manually drive the slave select pin. 643 * The SPI driver automatically drives the SS pin and this function enables/disables this 644 * feature. 645 * 646 * @param spi Pointer to SPI registers (selects the SPI block used.) 647 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 648 */ 649 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 650 651 /**@} end of group spi */ 652 653 #ifdef __cplusplus 654 } 655 #endif 656 657 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_SPI_H_ 658
