1 /** 2 * @file mxc_pins.h 3 * @brief This file contains constant pin configurations for the peripherals. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_MXC_PINS_H_ 27 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_MXC_PINS_H_ 28 29 #include "gpio.h" 30 31 // Pin mapping to use (i.e. UART0A, UART0B) 32 typedef enum { MAP_A, MAP_B } sys_map_t; 33 34 /***** Global Variables *****/ 35 // Predefined GPIO Configurations 36 extern const mxc_gpio_cfg_t gpio_cfg_extclk; 37 extern const mxc_gpio_cfg_t gpio_cfg_hfextclk; 38 extern const mxc_gpio_cfg_t gpio_cfg_lpextclk; 39 extern const mxc_gpio_cfg_t gpio_cfg_i2c0; 40 extern const mxc_gpio_cfg_t gpio_cfg_i2c1; 41 extern const mxc_gpio_cfg_t gpio_cfg_i2c2; 42 extern const mxc_gpio_cfg_t gpio_cfg_i2c2b; 43 extern const mxc_gpio_cfg_t gpio_cfg_i2c2c; 44 45 extern const mxc_gpio_cfg_t gpio_cfg_uart0; 46 extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow; 47 extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable; 48 extern const mxc_gpio_cfg_t gpio_cfg_uart0b; 49 extern const mxc_gpio_cfg_t gpio_cfg_uart0b_flow; 50 extern const mxc_gpio_cfg_t gpio_cfg_uart0b_flow_disable; 51 extern const mxc_gpio_cfg_t gpio_cfg_uart1; 52 extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow; 53 extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow_disable; 54 extern const mxc_gpio_cfg_t gpio_cfg_uart1b; 55 extern const mxc_gpio_cfg_t gpio_cfg_uart1b_flow; 56 extern const mxc_gpio_cfg_t gpio_cfg_uart1b_flow_disable; 57 extern const mxc_gpio_cfg_t gpio_cfg_uart2; 58 extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow; 59 extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable; 60 extern const mxc_gpio_cfg_t gpio_cfg_uart2b; 61 extern const mxc_gpio_cfg_t gpio_cfg_uart2b_flow; 62 extern const mxc_gpio_cfg_t gpio_cfg_uart2b_flow_disable; 63 extern const mxc_gpio_cfg_t gpio_cfg_uart3; 64 extern const mxc_gpio_cfg_t gpio_cfg_uart3_flow; 65 extern const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable; 66 67 extern const mxc_gpio_cfg_t gpio_cfg_spi0; 68 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ss0; 69 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ss1; 70 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ss2; 71 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ss3; 72 73 // NOTE: SPI1 definied here with SS1 only, SS0 is on port0 by itself. 74 extern const mxc_gpio_cfg_t gpio_cfg_spi1; 75 // NOTE: SPI2 defined here with SS0 only, and NOT SS1 and SS2 76 extern const mxc_gpio_cfg_t gpio_cfg_spi2; 77 extern const mxc_gpio_cfg_t gpio_cfg_spi2b; 78 // NOTE: SPI3 defined here with SS0 only, and NOT SS1, SS2, or SS3 79 extern const mxc_gpio_cfg_t gpio_cfg_spi3; 80 81 // Timers are only defined once, depending on package, each timer could be mapped to other pins 82 extern const mxc_gpio_cfg_t gpio_cfg_tmr0a; 83 extern const mxc_gpio_cfg_t gpio_cfg_tmr0b; 84 extern const mxc_gpio_cfg_t gpio_cfg_tmr0c; 85 extern const mxc_gpio_cfg_t gpio_cfg_tmr0d_in; 86 extern const mxc_gpio_cfg_t gpio_cfg_tmr0d_out; 87 88 extern const mxc_gpio_cfg_t gpio_cfg_tmr1a; 89 extern const mxc_gpio_cfg_t gpio_cfg_tmr1b; 90 extern const mxc_gpio_cfg_t gpio_cfg_tmr1c; 91 extern const mxc_gpio_cfg_t gpio_cfg_tmr1d; 92 93 extern const mxc_gpio_cfg_t gpio_cfg_tmr2a; 94 extern const mxc_gpio_cfg_t gpio_cfg_tmr2b; 95 extern const mxc_gpio_cfg_t gpio_cfg_tmr2c; 96 97 extern const mxc_gpio_cfg_t gpio_cfg_tmr3a; 98 extern const mxc_gpio_cfg_t gpio_cfg_tmr3b; 99 extern const mxc_gpio_cfg_t gpio_cfg_tmr3c; 100 extern const mxc_gpio_cfg_t gpio_cfg_tmr3d; 101 102 extern const mxc_gpio_cfg_t gpio_cfg_lptmr0; 103 extern const mxc_gpio_cfg_t gpio_cfg_lptmr1; 104 105 extern const mxc_gpio_cfg_t gpio_cfg_i2s0; 106 107 extern const mxc_gpio_cfg_t gpio_cfg_rtcsqw; 108 extern const mxc_gpio_cfg_t gpio_cfg_rtcsqwb; 109 110 extern const mxc_gpio_cfg_t gpio_cfg_qdec_in; 111 extern const mxc_gpio_cfg_t gpio_cfg_qdec_out; 112 113 extern const mxc_gpio_cfg_t gpio_cfg_lc1; 114 extern const mxc_gpio_cfg_t gpio_cfg_mon_lc1; 115 extern const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc1; 116 extern const mxc_gpio_cfg_t gpio_cfg_chrg_lc1; 117 extern const mxc_gpio_cfg_t gpio_cfg_lc2; 118 extern const mxc_gpio_cfg_t gpio_cfg_mon_lc2; 119 extern const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc2; 120 extern const mxc_gpio_cfg_t gpio_cfg_chrg_lc2; 121 122 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain0; 123 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain1; 124 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain2; 125 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain3; 126 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain4; 127 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain5; 128 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain6; 129 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain7; 130 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain8; 131 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain9; 132 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain10; 133 extern const mxc_gpio_cfg_t gpio_cfg_adc_ain11; 134 135 // SPI v2 Pin Definitions 136 extern const mxc_gpio_cfg_t gpio_cfg_spi0_standard; 137 extern const mxc_gpio_cfg_t gpio_cfg_spi0_3wire; 138 // MXC_SPI0 does not support Dual or Quad modes 139 extern const mxc_gpio_cfg_t gpio_cfg_spi1_standard; 140 extern const mxc_gpio_cfg_t gpio_cfg_spi1_3wire; 141 // MXC_SPI1 does not support Dual or Quad modes 142 extern const mxc_gpio_cfg_t gpio_cfg_spi2_standard; 143 extern const mxc_gpio_cfg_t gpio_cfg_spi2_3wire; 144 // MXC_SPI2 does not support Dual or Quad modes 145 146 // SPI v2 Target Selects Pin Definitions 147 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ts0; 148 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ts1; 149 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ts2; 150 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ts3; 151 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ts0; 152 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ts0; 153 154 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_MXC_PINS_H_ 155
