1 /** 2 * @file dma.h 3 * @brief Direct Memory Access (DMA) driver function prototypes and data types. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_DMA_H_ 27 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_DMA_H_ 28 29 /* **** Includes **** */ 30 #include <stdbool.h> 31 #include "mxc_device.h" 32 #include "dma_regs.h" 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 /** 39 * @defgroup dma Direct Memory Access (DMA) 40 * @ingroup periphlibs 41 * @{ 42 */ 43 44 /* **** Definitions **** */ 45 46 /** 47 * @brief Enumeration for the DMA Channel's priority level. 48 * 49 */ 50 typedef enum { 51 MXC_DMA_PRIO_HIGH = MXC_V_DMA_CTRL_PRI_HIGH, ///< High Priority */ 52 MXC_DMA_PRIO_MEDHIGH = MXC_V_DMA_CTRL_PRI_MEDHIGH, ///< Medium High Priority */ 53 MXC_DMA_PRIO_MEDLOW = MXC_V_DMA_CTRL_PRI_MEDLOW, ///< Medium Low Priority */ 54 MXC_DMA_PRIO_LOW = MXC_V_DMA_CTRL_PRI_LOW, ///< Low Priority */ 55 } mxc_dma_priority_t; 56 57 /** @brief DMA request select */ 58 typedef enum { 59 MXC_DMA_REQUEST_MEMTOMEM = 60 MXC_S_DMA_CTRL_REQUEST_MEMTOMEM, ///< Memory to Memory DMA Request Selection 61 MXC_DMA_REQUEST_SPI0RX = MXC_S_DMA_CTRL_REQUEST_SPI0RX, ///< SPI0 Receive DMA Request Selection 62 MXC_DMA_REQUEST_SPI1RX = MXC_S_DMA_CTRL_REQUEST_SPI1RX, ///< SPI1 Receive DMA Request Selection 63 MXC_DMA_REQUEST_SPI2RX = MXC_S_DMA_CTRL_REQUEST_SPI2RX, ///< SPI2 Receive DMA Request Selection 64 MXC_DMA_REQUEST_UART0RX = 65 MXC_S_DMA_CTRL_REQUEST_UART0RX, ///< UART0 Receive DMA Request Selection 66 MXC_DMA_REQUEST_UART1RX = 67 MXC_S_DMA_CTRL_REQUEST_UART1RX, ///< UART1 Receive DMA Request Selection 68 MXC_DMA_REQUEST_I2C0RX = MXC_S_DMA_CTRL_REQUEST_I2C0RX, ///< I2C0 Receive DMA Request Selection 69 MXC_DMA_REQUEST_I2C1RX = MXC_S_DMA_CTRL_REQUEST_I2C1RX, ///< I2C1 Receive DMA Request Selection 70 MXC_DMA_REQUEST_I2C2RX = MXC_S_DMA_CTRL_REQUEST_I2C2RX, ///< I2C2 Receive DMA Request Selection 71 MXC_DMA_REQUEST_ADC = MXC_S_DMA_CTRL_REQUEST_ADC, ///< ADC Receive DMA Request Selection 72 MXC_DMA_REQUEST_UART2RX = 73 MXC_S_DMA_CTRL_REQUEST_UART2RX, ///< UART2 Receive DMA Request Selection 74 MXC_DMA_REQUEST_AESRX = MXC_S_DMA_CTRL_REQUEST_AESRX, ///< AES Receive DMA Request Selection 75 MXC_DMA_REQUEST_UART3RX = 76 MXC_S_DMA_CTRL_REQUEST_UART3RX, ///< UART3 Receive DMA Request Selection 77 MXC_DMA_REQUEST_I2SRX = MXC_S_DMA_CTRL_REQUEST_I2SRX, ///< I2S Receive DMA Request Selection 78 MXC_DMA_REQUEST_SPI0TX = MXC_S_DMA_CTRL_REQUEST_SPI0TX, ///< SPI0 Transmit DMA Request Selection 79 MXC_DMA_REQUEST_SPI1TX = MXC_S_DMA_CTRL_REQUEST_SPI1TX, ///< SPI1 Transmit DMA Request Selection 80 MXC_DMA_REQUEST_SPI2TX = MXC_S_DMA_CTRL_REQUEST_SPI2TX, ///< SPI2 Transmit DMA Request Selection 81 MXC_DMA_REQUEST_UART0TX = 82 MXC_S_DMA_CTRL_REQUEST_UART0TX, ///< UART0 Transmit DMA Request Selection 83 MXC_DMA_REQUEST_UART1TX = 84 MXC_S_DMA_CTRL_REQUEST_UART1TX, ///< UART1 Transmit DMA Request Selection 85 MXC_DMA_REQUEST_I2C0TX = MXC_S_DMA_CTRL_REQUEST_I2C0TX, ///< I2C0 Transmit DMA Request Selection 86 MXC_DMA_REQUEST_I2C1TX = MXC_S_DMA_CTRL_REQUEST_I2C1TX, ///< I2C1 Transmit DMA Request Selection 87 MXC_DMA_REQUEST_I2C2TX = MXC_S_DMA_CTRL_REQUEST_I2C2TX, ///< I2C2 Transmit DMA Request Selection 88 MXC_DMA_REQUEST_CRCTX = MXC_S_DMA_CTRL_REQUEST_CRCTX, ///< CRC Transmit DMA Request Selection 89 MXC_DMA_REQUEST_UART2TX = 90 MXC_S_DMA_CTRL_REQUEST_UART2TX, ///< UART2 Transmit DMA Request Selection 91 MXC_DMA_REQUEST_AESTX = MXC_S_DMA_CTRL_REQUEST_AESTX, ///< AES Transmit DMA Request Selection 92 MXC_DMA_REQUEST_UART3TX = 93 MXC_S_DMA_CTRL_REQUEST_UART3TX, ///< UART3 Transmit DMA Request Selection 94 MXC_DMA_REQUEST_I2STX = MXC_S_DMA_CTRL_REQUEST_I2STX, ///< I2S Transmit DMA Request Selection 95 } mxc_dma_reqsel_t; 96 97 /** @brief Enumeration for the DMA prescaler */ 98 typedef enum { 99 MXC_DMA_PRESCALE_DISABLE = MXC_S_DMA_CTRL_TO_CLKDIV_DIS, ///< Prescaler disabled 100 MXC_DMA_PRESCALE_DIV256 = MXC_S_DMA_CTRL_TO_CLKDIV_DIV256, ///< Divide by 256 101 MXC_DMA_PRESCALE_DIV64K = MXC_S_DMA_CTRL_TO_CLKDIV_DIV64K, ///< Divide by 65,536 102 MXC_DMA_PRESCALE_DIV16M = MXC_S_DMA_CTRL_TO_CLKDIV_DIV16M, ///< Divide by 16,777,216 103 } mxc_dma_prescale_t; 104 105 /** @brief Enumeration for the DMA timeout value */ 106 typedef enum { 107 MXC_DMA_TIMEOUT_4_CLK = MXC_S_DMA_CTRL_TO_PER_TO4, ///< DMA timeout of 4 clocks 108 MXC_DMA_TIMEOUT_8_CLK = MXC_S_DMA_CTRL_TO_PER_TO8, ///< DMA timeout of 8 clocks 109 MXC_DMA_TIMEOUT_16_CLK = MXC_S_DMA_CTRL_TO_PER_TO16, ///< DMA timeout of 16 clocks 110 MXC_DMA_TIMEOUT_32_CLK = MXC_S_DMA_CTRL_TO_PER_TO32, ///< DMA timeout of 32 clocks 111 MXC_DMA_TIMEOUT_64_CLK = MXC_S_DMA_CTRL_TO_PER_TO64, ///< DMA timeout of 64 clocks 112 MXC_DMA_TIMEOUT_128_CLK = MXC_S_DMA_CTRL_TO_PER_TO128, ///< DMA timeout of 128 clocks 113 MXC_DMA_TIMEOUT_256_CLK = MXC_S_DMA_CTRL_TO_PER_TO256, ///< DMA timeout of 256 clocks 114 MXC_DMA_TIMEOUT_512_CLK = MXC_S_DMA_CTRL_TO_PER_TO512, ///< DMA timeout of 512 clocks 115 } mxc_dma_timeout_t; 116 117 /** @brief DMA transfer data width */ 118 typedef enum { 119 /* Using the '_V_' define instead of the '_S_' since these same values will be used to 120 specify the DSTWD also. The API functions will shift the value the correct amount 121 prior to writing the cfg register. */ 122 MXC_DMA_WIDTH_BYTE = MXC_V_DMA_CTRL_SRCWD_BYTE, ///< DMA transfer in bytes 123 MXC_DMA_WIDTH_HALFWORD = MXC_V_DMA_CTRL_SRCWD_HALFWORD, ///< DMA transfer in 16-bit half-words 124 MXC_DMA_WIDTH_WORD = MXC_V_DMA_CTRL_SRCWD_WORD, ///< DMA transfer in 32-bit words 125 } mxc_dma_width_t; 126 127 /** 128 * @brief The basic configuration information to set up a DMA channel 129 * and prepare it for transfers. 130 * 131 */ 132 typedef struct { 133 int ch; ///< The channel to load the configuration data into 134 mxc_dma_reqsel_t reqsel; ///< The request select line to be used (mem2mem, peripheral) 135 mxc_dma_width_t srcwd; ///< The source width (could be dependent on FIFO width) 136 mxc_dma_width_t dstwd; ///< The destination width (could be dependent on FIFO width) 137 int srcinc_en; ///< Whether to increment the source address during the transfer 138 int dstinc_en; ///< Whether to increment the source address during the transfer 139 } mxc_dma_config_t; 140 141 /** 142 * @brief The information needed to complete a DMA transfer 143 * 144 */ 145 typedef struct { 146 int ch; ///< The channel to use for the transfer 147 void *source; ///< Pointer to the source address, if applicable 148 void *dest; ///< Pointer to the destination address, if applicable 149 int len; ///< Number of bytes to transfer 150 } mxc_dma_srcdst_t; 151 152 /** 153 * @brief The advanced configuration options, these are optional but could 154 * be needed in cases where multiple DMA channels are running concurrently 155 * or DMA is being used with low bandwidth peripherals. 156 * 157 */ 158 typedef struct { 159 int ch; ///< The channel to use for the transfer 160 mxc_dma_priority_t prio; ///< The DMA priority for the channel 161 unsigned int reqwait_en; ///< Delay the timeout timer start until after first transfer 162 mxc_dma_timeout_t tosel; ///< Number of prescaled clocks seen by the channel before a timeout 163 mxc_dma_prescale_t pssel; ///< Prescaler for the timeout timer 164 unsigned int burst_size; ///< Number of bytes moved in a single burst 165 } mxc_dma_adv_config_t; 166 167 /** 168 * @brief The callback called on completion of a DMA_MemCpy() transfer 169 * 170 * @param dest Pointer to the destination of the copy 171 */ 172 typedef void (*mxc_dma_complete_cb_t)(void *dest); 173 174 /** 175 * @brief The callback called on completion of a transfer, 176 * @note This callback is used with MXC_DMA_DoTransfer() 177 * to allow the user to chain an unlimited number of 178 * DMA Transfers. 179 * 180 * @param trans Struct of the completed transfer 181 * 182 * @return Returns the next transfer to be completed, or NULL 183 * if no more transfers will be done 184 */ 185 typedef mxc_dma_srcdst_t (*mxc_dma_trans_chain_t)(mxc_dma_srcdst_t dest); 186 187 /* **** Function Prototypes **** */ 188 /*************************/ 189 /* Low Level Functions */ 190 /*************************/ 191 /** 192 * @brief Initialize DMA resources 193 * @details This initialization is required before using the DMA driver functions. 194 * @note On default this function enables DMA peripheral clock. 195 * if you wish to manage clock and gpio related things in upper level instead of here. 196 * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. 197 * By this flag this function will remove clock and gpio related codes from file. 198 * @return #E_NO_ERROR if successful 199 */ 200 int MXC_DMA_Init(void); 201 202 /** 203 * @brief De-Initialize DMA resources. 204 */ 205 void MXC_DMA_DeInit(void); 206 207 /** 208 * @brief Request DMA channel 209 * @details Returns a handle to the first free DMA channel, which can be used via API calls 210 * or direct access to channel registers using the MXC_DMA_GetCHRegs(int ch) function. 211 * @return Non-negative channel handle (inclusive of zero). 212 * @return #E_NONE_AVAIL All channels in use. 213 * @return #E_BAD_STATE DMA is not initialized, call MXC_DMA_Init() first. 214 * @return #E_BUSY DMA is currently busy (locked), try again later. 215 */ 216 int MXC_DMA_AcquireChannel(void); 217 218 /** 219 * @brief Release DMA channel 220 * @details Stops any DMA operation on the channel and returns it to the pool of free channels. 221 * 222 * @param ch channel handle to release 223 * 224 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 225 */ 226 int MXC_DMA_ReleaseChannel(int ch); 227 228 /** 229 * @brief Configure the DMA channel 230 * @details Configures the channel, which was previously requested by MXC_DMA_Getchannel() 231 * 232 * @param config Struct containing DMA configuration parameters 233 * @param srcdst Struct containing pointers and length of DMA operation 234 * 235 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 236 */ 237 int MXC_DMA_ConfigChannel(mxc_dma_config_t config, mxc_dma_srcdst_t srcdst); 238 239 /** 240 * @brief Configure the DMA channel with more advanced parameters 241 * 242 * @param advConfig Struct containing advanced DMA parameters 243 * 244 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 245 */ 246 int MXC_DMA_AdvConfigChannel(mxc_dma_adv_config_t advConfig); 247 248 /** 249 * @brief Set channel source, destination, and count for the transfer 250 * @param srcdst Struct containing the channel, source, destination, and count for the channel 251 * @note Unless the channel request select is #mxc_dma_srcdst_t = MXC_DMA_REQUEST_MEMTOMEM, 252 * either src_addr or dst_addr will be ignored by the DMA engine. 253 * In these cases, the address is a don't-care. See the User's 254 * Guide for more information. 255 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 256 */ 257 int MXC_DMA_SetSrcDst(mxc_dma_srcdst_t srcdst); 258 259 /** 260 * @brief Get channel source, destination, and count for transfer 261 * 262 * @param srcdst Pointer to struct with the correct channel number 263 * 264 * @return See \ref MXC_Error_Codes for a list of return values 265 */ 266 int MXC_DMA_GetSrcDst(mxc_dma_srcdst_t *srcdst); 267 268 /** 269 * @brief Set channel reload source, destination, and count for the transfer 270 * @param srcdstReload Struct containing the channel, source, destination, and count for the channel 271 * @note Unless the channel request select is #mxc_dma_srcdst_t = MXC_DMA_REQUEST_MEMTOMEM, 272 * either src_addr or dst_addr will be ignored by the DMA engine. 273 * In these cases, the address is a don't-care. See the User's 274 * Guide for more information. 275 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 276 */ 277 int MXC_DMA_SetSrcReload(mxc_dma_srcdst_t srcdstReload); 278 279 /** 280 * @brief Get channel reload source, destination, and count for transfer 281 * 282 * @param srcdstReload Pointer to struct with the correct channel number 283 * 284 * @return See \ref MXC_Error_Codes for a list of return values 285 */ 286 int MXC_DMA_GetSrcReload(mxc_dma_srcdst_t *srcdstReload); 287 288 /** 289 * @brief Set channel interrupt callback 290 * @param ch channel handle 291 * @param callback Pointer to a function to call when the channel 292 * interrupt flag is set and interrupts are enabled or 293 * when DMA is shutdown by the driver. 294 * @details Configures the channel interrupt callback. The @p callback 295 * function is called for two conditions: 296 * -# When the channel's interrupt flag is set and DMA interrupts 297 * are enabled. 298 * -# If the driver calls the MXC_DMA_Shutdown() function. The 299 * callback function prototype is: 300 * @code 301 * void callback_fn(int ch, int reason); 302 * @endcode 303 * @p ch indicates the channel that generated the callback, @p 304 * reason is either #E_NO_ERROR for a DMA interrupt or #E_SHUTDOWN 305 * if the DMA is being shutdown. 306 * 307 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR 308 * otherwise 309 */ 310 int MXC_DMA_SetCallback(int ch, void (*callback)(int, int)); 311 312 /** 313 * @brief Set channel interrupt 314 * @note Each channel has two interrupts (complete, and count to zero). 315 * To enable complete, pass true for chdis. To enable count to zero, 316 * pass true for ctz. 317 * @param ch Channel Handle 318 * @param chdis Enable channel complete interrupt 319 * @param ctz Enable channel count to zero interrupt. 320 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 321 */ 322 int MXC_DMA_SetChannelInterruptEn(int ch, bool chdis, bool ctz); 323 324 /** 325 * @brief Enable channel interrupt 326 * @note Each channel has two interrupts (complete, and count to zero) 327 which must also be enabled with MXC_DMA_SetChannelInterruptEn() 328 * @param ch channel handle 329 * @param flags The flags to enable 330 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 331 */ 332 int MXC_DMA_ChannelEnableInt(int ch, int flags); 333 334 /** 335 * @brief Disable channel interrupt 336 * @param ch channel handle 337 * @param flags The flags to disable 338 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 339 */ 340 int MXC_DMA_ChannelDisableInt(int ch, int flags); 341 342 /** 343 * @brief Read channel interrupt flags 344 * @param ch channel handle 345 * @return #E_BAD_PARAM if an unused or invalid channel handle, flags otherwise 346 */ 347 int MXC_DMA_ChannelGetFlags(int ch); 348 349 /** 350 * @brief Clear channel interrupt flags 351 * @param ch channel handle 352 * @param flags The flags to clear 353 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 354 */ 355 int MXC_DMA_ChannelClearFlags(int ch, int flags); 356 357 /** 358 * @brief Enable channel interrupt 359 * @note Each channel has two interrupts (complete, and count to zero) 360 which must also be enabled with MXC_DMA_SetChannelInterruptEn() 361 * @param ch channel handle 362 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 363 */ 364 int MXC_DMA_EnableInt(int ch); 365 366 /** 367 * @brief Disable channel interrupt 368 * @param ch channel handle 369 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 370 */ 371 int MXC_DMA_DisableInt(int ch); 372 373 /** 374 * @brief Start transfer 375 * @param ch channel handle 376 * @details Start the DMA channel transfer, assumes that MXC_DMA_SetSrcDstCnt() has been called beforehand. 377 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 378 */ 379 int MXC_DMA_Start(int ch); 380 381 /** 382 * @brief Stop DMA transfer, irrespective of status (complete or in-progress) 383 * @param ch channel handle 384 * @return #E_BAD_PARAM if an unused or invalid channel handle, #E_NO_ERROR otherwise 385 */ 386 int MXC_DMA_Stop(int ch); 387 388 /** 389 * @brief Get a pointer to the DMA channel registers 390 * @param ch channel handle 391 * @details If direct access to DMA channel registers is required, this 392 * function can be used on a channel handle returned by MXC_DMA_AcquireChannel(). 393 * @return NULL if an unused or invalid channel handle, or a valid pointer otherwise 394 */ 395 mxc_dma_ch_regs_t *MXC_DMA_GetCHRegs(int ch); 396 397 /** 398 * @brief Interrupt handler function 399 * @details Call this function as the ISR for each DMA channel under driver control. 400 * Interrupt flags for channel ch will be automatically cleared before return. 401 */ 402 void MXC_DMA_Handler(void); 403 404 /*************************/ 405 /* High Level Functions */ 406 /*************************/ 407 408 /** 409 * @brief Performs a memcpy, using DMA, optionally asynchronous 410 * @note The user must have the DMA interrupt enabled and call 411 * MXC_DMA_Handler() from the ISR. 412 * 413 * @param dest pointer to destination memory 414 * @param src pointer to source memory 415 * @param len number of bytes to copy 416 * @param callback function to call when transfer is complete 417 * 418 * @return see \ref MXC_Error_Codes 419 */ 420 int MXC_DMA_MemCpy(void *dest, void *src, int len, mxc_dma_complete_cb_t callback); 421 422 /** 423 * @brief Performs a memcpy, using DMA, optionally asynchronous 424 * @note The user must have the DMA interrupt enabled and call 425 * MXC_DMA_Handler() from the ISR. 426 * 427 * @param config The channel config struct 428 * @param firstSrcDst The source, destination, and count for the first transfer 429 * @param callback function is called when transfer is complete 430 * 431 * @return see \ref MXC_Error_Codes 432 */ 433 int MXC_DMA_DoTransfer(mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst, 434 mxc_dma_trans_chain_t callback); 435 /** 436 * For other functional uses of DMA (UART, SPI, etc) see the appropriate peripheral driver 437 */ 438 439 /**@} end of group dma */ 440 #ifdef __cplusplus 441 } 442 #endif 443 444 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32672_DMA_H_ 445
