1 /** 2 * @file spi.h 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_SPI_H_ 26 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_SPI_H_ 27 28 /***** includes *******/ 29 #include "spi_regs.h" 30 #include "mxc_sys.h" 31 #include "mxc_assert.h" 32 #include "gpio.h" 33 #include "dma.h" 34 #include "mxc_pins.h" 35 #include "mxc_lock.h" 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 /***** Definitions *****/ 42 43 /** 44 * @defgroup spi SPI 45 * @ingroup periphlibs 46 * @{ 47 */ 48 49 /** 50 * @brief The list of SPI Widths supported 51 * 52 * The SPI Width can be set on a per-transaction basis. 53 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 54 * given. 55 * 56 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 57 * The IC requires a SPI Read to be executed as 58 * 1. Assert SS 59 * 2. Write an 8bit register address 60 * 3. Read back the 8 bit register 61 * 4. Deassert SS 62 * This can be accomplished with the STANDARD_HALFDUPLEX width 63 * 1. set txData to the address, txLen=1 64 * 2. set rxData to a buffer of 1 byte, rxLen=1 65 * 3. The driver will transmit the txData, and after completion of 66 * txData begin to recieve data, padding MOSI with DefaultTXData 67 * 68 */ 69 typedef enum { 70 SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex 71 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 72 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 73 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 74 } mxc_spi_width_t; 75 76 /** 77 * @brief The list of SPI modes 78 * 79 * SPI supports four combinations of clock and phase polarity 80 * 81 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 82 * and determines if the clock is active high or active low 83 * 84 * Clock phase determines when the data must be stable for sampling 85 * 86 */ 87 typedef enum { 88 SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 89 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 90 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 91 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 92 } mxc_spi_mode_t; 93 94 typedef struct _mxc_spi_req_t mxc_spi_req_t; 95 96 /** 97 * @brief The callback routine used to indicate the transaction has terminated. 98 * 99 * @param req The details of the transaction. 100 * @param result See \ref MXC_Error_Codes for the list of error codes. 101 */ 102 typedef void (*spi_complete_cb_t)(void *req, int result); 103 104 /** 105 * @brief The information required to perform a complete SPI transaction 106 * 107 * This structure is used by blocking, async, and DMA based transactions. 108 * @note "completeCB" only needs to be initialized for interrupt driven (Async) and DMA transactions. 109 */ 110 struct _mxc_spi_req_t { 111 mxc_spi_regs_t *spi; ///<Point to SPI registers 112 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 113 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 114 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 115 ///< < 8 bits, pad the MSB of each byte with zeros. For 116 ///< character sizes > 8 bits, use two bytes per character 117 ///< and pad the MSB of the upper byte with zeros 118 uint8_t *rxData; ///< Buffer to store received data For character sizes 119 ///< < 8 bits, pad the MSB of each byte with zeros. For 120 ///< character sizes > 8 bits, use two bytes per character 121 ///< and pad the MSB of the upper byte with zeros 122 uint32_t txLen; ///< Number of bytes to be sent from txData 123 uint32_t rxLen; ///< Number of bytes to be stored in rxData 124 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 125 uint32_t rxCnt; ///< Number of bytes stored in rxData 126 127 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 128 }; 129 130 /* ************************************************************************* */ 131 /* Control/Configuration functions */ 132 /* ************************************************************************* */ 133 134 /** 135 * @brief Initialize and enable SPI peripheral. 136 * 137 * This function initializes everything necessary to call a SPI transaction function. 138 * Some parameters are set to defaults as follows: 139 * SPI Mode - 0 140 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 141 * 142 * These parameters can be modified after initialization using low level functions 143 * 144 * @note On default this function enables SPI peripheral clock and spi gpio pins. 145 * if you wish to manage clock and gpio related things in upper level instead of here. 146 * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. 147 * By this flag this function will remove clock and gpio related codes from file. 148 * 149 * @param spi Pointer to SPI registers (selects the SPI block used.) 150 * @param masterMode Whether to put the device in master or slave mode. Use 151 * non-zero for master mode, and zero for slave mode. 152 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 153 * non-zero if the pins are needed (if Quad Mode will 154 * be used), and zero if they are not needed (quad mode 155 * will never be used). 156 * @param numSlaves The number of slaves used, if in master mode. This 157 * is used to obtain control of the necessary SS pins. 158 * In slave mode this is ignored and SS1 is used. 159 * @param ssPolarity This field sets the SS active polarity for each 160 * slave, each bit position corresponds to each SS line. 161 * @param hz The requested clock frequency. The actual clock frequency 162 * will be returned by the function if successful. Used in 163 * master mode only. 164 * @param map Mapping (MAP_A or MAP_B) to use for SPIO, Has no effect 165 * incase of MSDK_NO_GPIO_CLK_INIT has been defined. 166 * 167 * @return If successful, the actual clock frequency is returned. Otherwise, see 168 * \ref MXC_Error_Codes for a list of return codes. 169 */ 170 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 171 unsigned ssPolarity, unsigned int hz, sys_map_t map); 172 173 /** 174 * @brief Disable and shutdown SPI peripheral. 175 * 176 * @param spi Pointer to SPI registers (selects the SPI block used.) 177 * 178 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 179 */ 180 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 181 182 /** 183 * @brief Checks if the given SPI bus can be placed in sleep mode. 184 * 185 * This functions checks to see if there are any on-going SPI transactions in 186 * progress. If there are transactions in progress, the application should 187 * wait until the SPI bus is free before entering a low-power state. 188 * 189 * @param spi Pointer to SPI registers (selects the SPI block used.) 190 * 191 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 192 * MXC_Error_Codes for the list of error return codes. 193 */ 194 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 195 196 /** 197 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 198 * 199 * @param spi Pointer to SPI registers (selects the SPI block used.) 200 * 201 * @return Frequency of the clock used as the bit rate generator 202 */ 203 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 204 205 /** 206 * @brief Set the frequency of the SPI interface. 207 * 208 * This function is applicable in Master mode only 209 * 210 * @param spi Pointer to SPI registers (selects the SPI block used.) 211 * @param hz The desired frequency in Hertz. 212 * 213 * @return Negative if error, otherwise actual speed set. See \ref 214 * MXC_Error_Codes for the list of error return codes. 215 */ 216 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 217 218 /** 219 * @brief Get the frequency of the SPI interface. 220 * 221 * This function is applicable in Master mode only 222 * 223 * @param spi Pointer to SPI registers (selects the SPI block used.) 224 * 225 * @return The SPI bus frequency in Hertz 226 */ 227 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 228 229 /** 230 * @brief Sets the number of bits per character 231 * 232 * @param spi Pointer to SPI registers (selects the SPI block used.) 233 * @param dataSize The number of bits per character 234 * 235 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 236 */ 237 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 238 239 /** 240 * @brief Gets the number of bits per character 241 * 242 * @param spi Pointer to SPI registers (selects the SPI block used.) 243 * 244 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 245 */ 246 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 247 248 /* ************************************************************************* */ 249 /* Low-level functions */ 250 /* ************************************************************************* */ 251 252 /** 253 * @brief Sets the slave select (SS) line used for transmissions 254 * 255 * This function is applicable in Master mode only 256 * 257 * @param spi Pointer to SPI registers (selects the SPI block used.) 258 * @param ssIdx Slave select index 259 * 260 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 261 */ 262 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 263 264 /** 265 * @brief Gets the slave select (SS) line used for transmissions 266 * 267 * This function is applicable in Master mode only 268 * 269 * @param spi Pointer to SPI registers (selects the SPI block used.) 270 * 271 * @return slave slect 272 */ 273 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 274 275 /** 276 * @brief Sets the SPI width used for transmissions 277 * 278 * @param spi Pointer to SPI registers (selects the SPI block used.) 279 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 280 * 281 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 282 */ 283 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 284 285 /** 286 * @brief Gets the SPI width used for transmissions 287 * 288 * @param spi Pointer to SPI registers (selects the SPI block used.) 289 * 290 * @return Spi Width \ref mxc_spi_width_t 291 */ 292 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 293 294 /** 295 * @brief Sets the spi mode using clock polarity and clock phase 296 * 297 * @param spi Pointer to SPI registers (selects the SPI block used.) 298 * @param spiMode \ref mxc_spi_mode_t 299 * 300 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 301 */ 302 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 303 304 /** 305 * @brief Gets the spi mode 306 * 307 * @param spi Pointer to SPI registers (selects the SPI block used.) 308 * 309 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 310 */ 311 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 312 313 /** 314 * @brief Starts a SPI Transmission 315 * 316 * This function is applicable in Master mode only 317 * 318 * The user must ensure that there are no ongoing transmissions before 319 * calling this function 320 * 321 * @param spi Pointer to SPI registers (selects the SPI block used.) 322 * 323 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 324 */ 325 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 326 327 /** 328 * @brief Checks the SPI Peripheral for an ongoing transmission 329 * 330 * This function is applicable in Master mode only 331 * 332 * @param spi Pointer to SPI registers (selects the SPI block used.) 333 * 334 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 335 */ 336 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 337 338 /** 339 * @brief Aborts an ongoing SPI Transmission 340 * 341 * This function is applicable in Master mode only 342 * 343 * @param spi Pointer to SPI registers (selects the SPI block used.) 344 * 345 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 346 */ 347 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 348 349 /** 350 * @brief Unloads bytes from the receive FIFO. 351 * 352 * @param spi Pointer to SPI registers (selects the SPI block used.) 353 * @param bytes The buffer to read the data into. 354 * @param len The number of bytes to read. 355 * 356 * @return The number of bytes actually read. 357 */ 358 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 359 360 /** 361 * @brief Get the number of bytes currently available in the receive FIFO. 362 * 363 * @param spi Pointer to SPI registers (selects the SPI block used.) 364 * 365 * @return The number of bytes available. 366 */ 367 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 368 369 /** 370 * @brief Loads bytes into the transmit FIFO. 371 * 372 * @param spi Pointer to SPI registers (selects the SPI block used.) 373 * @param bytes The buffer containing the bytes to write 374 * @param len The number of bytes to write. 375 * 376 * @return The number of bytes actually written. 377 */ 378 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 379 380 /** 381 * @brief Get the amount of free space available in the transmit FIFO. 382 * 383 * @param spi Pointer to SPI registers (selects the SPI block used.) 384 * 385 * @return The number of bytes available. 386 */ 387 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 388 389 /** 390 * @brief Removes and discards all bytes currently in the receive FIFO. 391 * 392 * @param spi Pointer to SPI registers (selects the SPI block used.) 393 */ 394 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 395 396 /** 397 * @brief Removes and discards all bytes currently in the transmit FIFO. 398 * 399 * @param spi Pointer to SPI registers (selects the SPI block used.) 400 */ 401 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 402 403 /** 404 * @brief Set the receive threshold level. 405 * 406 * RX FIFO Receive threshold. Smaller values will cause 407 * interrupts to occur more often, but reduce the possibility 408 * of losing data because of a FIFO overflow. Larger values 409 * will reduce the time required by the ISR, but increase the 410 * possibility of data loss. Passing an invalid value will 411 * cause the driver to use the value already set in the 412 * appropriate register. 413 * 414 * @param spi Pointer to SPI registers (selects the SPI block used.) 415 * @param numBytes The threshold level to set. This value must be 416 * between 0 and 8 inclusive. 417 * 418 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 419 */ 420 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 421 422 /** 423 * @brief Get the current receive threshold level. 424 * 425 * @param spi Pointer to SPI registers (selects the SPI block used.) 426 * 427 * @return The receive threshold value (in bytes). 428 */ 429 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 430 431 /** 432 * @brief Set the transmit threshold level. 433 * 434 * TX FIFO threshold. Smaller values will cause interrupts 435 * to occur more often, but reduce the possibility of terminating 436 * a transaction early in master mode, or transmitting invalid data 437 * in slave mode. Larger values will reduce the time required by 438 * the ISR, but increase the possibility errors occurring. Passing 439 * an invalid value will cause the driver to use the value already 440 * set in the appropriate register. 441 * 442 * @param spi Pointer to SPI registers (selects the SPI block used.) 443 * @param numBytes The threshold level to set. This value must be 444 * between 0 and 8 inclusive. 445 * 446 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 447 */ 448 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 449 450 /** 451 * @brief Get the current transmit threshold level. 452 * 453 * @param spi Pointer to SPI registers (selects the SPI block used.) 454 * 455 * @return The transmit threshold value (in bytes). 456 */ 457 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 458 459 /** 460 * @brief Gets the interrupt flags that are currently set 461 * 462 * These functions should not be used while using non-blocking Transaction Level 463 * functions (Async or DMA) 464 * 465 * @param spi Pointer to SPI registers (selects the SPI block used.) 466 * 467 * @return The interrupt flags 468 */ 469 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 470 471 /** 472 * @brief Clears the interrupt flags that are currently set 473 * 474 * These functions should not be used while using non-blocking Transaction Level 475 * functions (Async or DMA) 476 * 477 * @param spi Pointer to SPI registers (selects the SPI block used.) 478 */ 479 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 480 481 /** 482 * @brief Enables specific interrupts 483 * 484 * These functions should not be used while using non-blocking Transaction Level 485 * functions (Async or DMA) 486 * 487 * @param spi Pointer to SPI registers (selects the SPI block used.) 488 * @param mask The interrupts to be enabled 489 */ 490 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int mask); 491 492 /** 493 * @brief Disables specific interrupts 494 * 495 * These functions should not be used while using non-blocking Transaction Level 496 * functions (Async or DMA) 497 * 498 * @param spi Pointer to SPI registers (selects the SPI block used.) 499 * @param mask The interrupts to be disabled 500 */ 501 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int mask); 502 503 /* ************************************************************************* */ 504 /* Transaction level functions */ 505 /* ************************************************************************* */ 506 507 /** 508 * @brief Performs a blocking SPI transaction. 509 * 510 * Performs a blocking SPI transaction. 511 * These actions will be performed in Master Mode: 512 * 1. Assert the specified SS 513 * 2. In Full Duplex Modes, send TX data while receiving RX Data 514 * if rxLen > txLen, pad txData with DefaultTXData 515 * if txLen > rxLen, discard rxData where rxCnt > rxLen 516 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 517 * 4. Deassert the specified SS 518 * 519 * These actions will be performed in Slave Mode: 520 * 1. Fill FIFO with txData 521 * 2. Wait for SS Assert 522 * 3. If needed, pad txData with DefaultTXData 523 * 4. Unload RX FIFO as needed 524 * 5. On SS Deassert, return 525 * 526 * @param req Pointer to details of the transaction 527 * 528 * @return See \ref MXC_Error_Codes for the list of error return codes. 529 */ 530 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 531 532 /** 533 * @brief Setup an interrupt-driven SPI transaction 534 * 535 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 536 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 537 * 538 * @param req Pointer to details of the transaction 539 * 540 * @return See \ref MXC_Error_Codes for the list of error return codes. 541 */ 542 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 543 544 /** 545 * @brief Setup a DMA driven SPI transaction 546 * 547 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 548 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 549 * 550 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 551 * set up to load/unload the FIFOs with as few interrupt-based events as 552 * possible. The channel will be reset and returned to the system at the end of 553 * the transaction. 554 * 555 * @param req Pointer to details of the transaction 556 * @param dma Pointer to DMA registers used for transaction. 557 * 558 * @return See \ref MXC_Error_Codes for the list of error return codes. 559 */ 560 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req, mxc_dma_regs_t *dma); 561 562 /** 563 * @brief Performs a blocking SPI transaction. 564 * 565 * Performs a blocking SPI transaction. 566 * These actions will be performed in Slave Mode: 567 * 1. Fill FIFO with txData 568 * 2. Wait for SS Assert 569 * 3. If needed, pad txData with DefaultTXData 570 * 4. Unload RX FIFO as needed 571 * 5. On SS Deassert, return 572 * 573 * @param req Pointer to details of the transaction 574 * 575 * @return See \ref MXC_Error_Codes for the list of error return codes. 576 */ 577 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 578 579 /** 580 * @brief Setup an interrupt-driven SPI transaction 581 * 582 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 583 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 584 * 585 * @param req Pointer to details of the transactionz 586 * 587 * @return See \ref MXC_Error_Codes for the list of error return codes. 588 */ 589 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 590 591 /** 592 * @brief Setup a DMA driven SPI transaction 593 * 594 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 595 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 596 * 597 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 598 * set up to load/unload the FIFOs with as few interrupt-based events as 599 * possible. The channel will be reset and returned to the system at the end of 600 * the transaction. 601 * 602 * @param req Pointer to details of the transaction 603 * @param dma Pointer to DMA registers used for transaction. 604 * 605 * @return See \ref MXC_Error_Codes for the list of error return codes. 606 */ 607 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req, mxc_dma_regs_t *dma); 608 609 /** 610 * @brief Sets the TX data to transmit as a 'dummy' byte 611 * 612 * In single wire master mode, this data is transmitted on MOSI when performing 613 * an RX (MISO) only transaction. This defaults to 0. 614 * 615 * @param spi Pointer to SPI registers (selects the SPI block used.) 616 * @param defaultTXData Data to shift out in RX-only transactions 617 * 618 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 619 */ 620 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 621 622 /** 623 * @brief Abort any asynchronous requests in progress. 624 * 625 * Abort any asynchronous requests in progress. Any callbacks associated with 626 * the active transaction will be executed to indicate when the transaction 627 * has been terminated. 628 * 629 * @param spi Pointer to SPI registers (selects the SPI block used.) 630 */ 631 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 632 633 /** 634 * @brief The processing function for asynchronous transactions. 635 * 636 * When using the asynchronous functions, the application must call this 637 * function periodically. This can be done from within the SPI interrupt 638 * handler or periodically by the application if SPI interrupts are disabled. 639 * 640 * @param spi Pointer to SPI registers (selects the SPI block used.) 641 */ 642 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 643 644 /** 645 * @brief Enable/Disable HW CS control feature. 646 * 647 * Depending on the application, the user might need to manually drive the slave select pin. 648 * The SPI driver automatically drives the SS pin and this function enables/disables this 649 * feature. 650 * 651 * @param spi Pointer to SPI registers (selects the SPI block used.) 652 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 653 */ 654 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 655 656 /**@} end of group spi */ 657 658 #ifdef __cplusplus 659 } 660 #endif 661 662 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_SPI_H_ 663
