1 /** 2 * @file rpu.h 3 * @brief RPU function prototypes and data types. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 /* Define to prevent redundant inclusion */ 27 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_RPU_H_ 28 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_RPU_H_ 29 30 /* **** Includes **** */ 31 #include "rpu_regs.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /** 38 * @defgroup rpu Resource Protection Unit 39 * @ingroup periphlibs 40 * @{ 41 */ 42 43 /* **** Definitions **** */ 44 45 // Bus Masters whose access to peripherals is controlled by the RPU 46 typedef enum { 47 MXC_RPU_DMA0_ALLOW = 0x01, 48 MXC_RPU_DMA1_ALLOW = 0x02, 49 MXC_RPU_USB_ALLOW = 0x04, 50 MXC_RPU_SYS0_ALLOW = 0x08, 51 MXC_RPU_SYS1_ALLOW = 0x10, 52 MXC_RPU_SDMAD_ALLOW = 0x20, 53 MXC_RPU_SDMAI_ALLOW = 0x40, 54 MXC_RPU_CRYPTO_ALLOW = 0x80, 55 MXC_RPU_SDIO_ALLOW = 0x100 56 } mxc_rpu_allow_t; 57 58 // Peripherals gated by the RPU 59 typedef enum { 60 MXC_RPU_GCR = MXC_R_RPU_GCR, 61 MXC_RPU_FLC0 = MXC_R_RPU_FLC0, 62 MXC_RPU_SDHCCTRL = MXC_R_RPU_SDHCCTRL, 63 MXC_RPU_SIR = MXC_R_RPU_SIR, 64 MXC_RPU_FCR = MXC_R_RPU_FCR, 65 MXC_RPU_CRYPTO = MXC_R_RPU_TPU, 66 MXC_RPU_WDT0 = MXC_R_RPU_WDT0, 67 MXC_RPU_WDT1 = MXC_R_RPU_WDT1, 68 MXC_RPU_WDT2 = MXC_R_RPU_WDT2, 69 MXC_RPU_SMON = MXC_R_RPU_SMON, 70 MXC_RPU_SIMO = MXC_R_RPU_SIMO, 71 MXC_RPU_DVS = MXC_R_RPU_DVS, 72 MXC_RPU_RTC = MXC_R_RPU_RTC, 73 MXC_RPU_WUT = MXC_R_RPU_WUT, 74 MXC_RPU_PWRSEQ = MXC_R_RPU_PWRSEQ, 75 MXC_RPU_MCR = MXC_R_RPU_MCR, 76 MXC_RPU_GPIO0 = MXC_R_RPU_GPIO0, 77 MXC_RPU_GPIO1 = MXC_R_RPU_GPIO1, 78 MXC_RPU_TMR0 = MXC_R_RPU_TMR0, 79 MXC_RPU_TMR1 = MXC_R_RPU_TMR1, 80 MXC_RPU_TMR2 = MXC_R_RPU_TMR2, 81 MXC_RPU_TMR3 = MXC_R_RPU_TMR3, 82 MXC_RPU_TMR4 = MXC_R_RPU_TMR4, 83 MXC_RPU_TMR5 = MXC_R_RPU_TMR5, 84 MXC_RPU_HTIMER0 = MXC_R_RPU_HTIMER0, 85 MXC_RPU_HTIMER1 = MXC_R_RPU_HTIMER1, 86 MXC_RPU_I2C0_BUS0 = MXC_R_RPU_I2C0_BUS0, 87 MXC_RPU_I2C1_BUS0 = MXC_R_RPU_I2C1_BUS0, 88 MXC_RPU_I2C2_BUS0 = MXC_R_RPU_I2C2_BUS0, 89 MXC_RPU_SPIXFM = MXC_R_RPU_SPIXFM, 90 MXC_RPU_SPIXFC = MXC_R_RPU_SPIXFC, 91 MXC_RPU_DMA0 = MXC_R_RPU_DMA0, 92 MXC_RPU_FLC1 = MXC_R_RPU_FLC1, 93 MXC_RPU_ICC0 = MXC_R_RPU_ICC0, 94 MXC_RPU_ICC1 = MXC_R_RPU_ICC1, 95 MXC_RPU_SFCC = MXC_R_RPU_SFCC, 96 MXC_RPU_SRCC = MXC_R_RPU_SRCC, 97 MXC_RPU_ADC = MXC_R_RPU_ADC, 98 MXC_RPU_DMA1 = MXC_R_RPU_DMA1, 99 MXC_RPU_SDMA = MXC_R_RPU_SDMA, 100 MXC_RPU_SPIXR = MXC_R_RPU_SPIXR, 101 MXC_RPU_PTG_BUS0 = MXC_R_RPU_PTG_BUS0, 102 MXC_RPU_OWM = MXC_R_RPU_OWM, 103 MXC_RPU_SEMA = MXC_R_RPU_SEMA, 104 MXC_RPU_UART0 = MXC_R_RPU_UART0, 105 MXC_RPU_UART1 = MXC_R_RPU_UART1, 106 MXC_RPU_UART2 = MXC_R_RPU_UART2, 107 MXC_RPU_SPI1 = MXC_R_RPU_SPI1, 108 MXC_RPU_SPI2 = MXC_R_RPU_SPI2, 109 MXC_RPU_AUDIO = MXC_R_RPU_AUDIO, 110 MXC_RPU_TRNG = MXC_R_RPU_TRNG, 111 MXC_RPU_BTLE = MXC_R_RPU_BTLE, 112 MXC_RPU_USBHS = MXC_R_RPU_USBHS, 113 MXC_RPU_SDIO = MXC_R_RPU_SDIO, 114 MXC_RPU_SPIXFM_FIFO = MXC_R_RPU_SPIXFM_FIFO, 115 MXC_RPU_SPI0 = MXC_R_RPU_SPI0 116 } mxc_rpu_device_t; 117 118 /* **** Function Prototypes **** */ 119 /** 120 * @brief Enable access to peripherals restricted by the RPU 121 * This function must be called from handler (privileged) mode 122 * @param periph the peripheral to allow access too 123 * @param allow_mask which bus masters to allow to access periph 124 * @return E_NO_ERROR If function is successful. 125 */ 126 int MXC_RPU_Allow(mxc_rpu_device_t periph, uint32_t allow_mask); 127 128 /** 129 * @brief Disable access to peripherals restricted by the RPU 130 * This function must be called from handler (privileged) mode 131 * @param periph the peripheral to revoke access too 132 * @param disallow_mask which bus masters to disallow access to periph 133 * @return E_NO_ERROR if function is successful. 134 */ 135 int MXC_RPU_Disallow(mxc_rpu_device_t periph, uint32_t disallow_mask); 136 137 /** 138 * @brief Check to see if this process is running in handler mode 139 * @return E_NO_RRROR If allowed. 140 * @return E_BAD_STATE If not allowed. 141 */ 142 int MXC_RPU_IsAllowed(void); 143 144 /**@} end of group rpu */ 145 146 #ifdef __cplusplus 147 } 148 #endif 149 150 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_RPU_H_ 151
