1 /**
2  * @file    icc.h
3  * @brief   Instruction Controller Cache(ICC) function prototypes and data types.
4  */
5 
6 /******************************************************************************
7  *
8  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9  * Analog Devices, Inc.),
10  * Copyright (C) 2023-2024 Analog Devices, Inc.
11  *
12  * Licensed under the Apache License, Version 2.0 (the "License");
13  * you may not use this file except in compliance with the License.
14  * You may obtain a copy of the License at
15  *
16  *     http://www.apache.org/licenses/LICENSE-2.0
17  *
18  * Unless required by applicable law or agreed to in writing, software
19  * distributed under the License is distributed on an "AS IS" BASIS,
20  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21  * See the License for the specific language governing permissions and
22  * limitations under the License.
23  *
24  ******************************************************************************/
25 
26 /* Define to prevent redundant inclusion */
27 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_ICC_H_
28 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_ICC_H_
29 
30 /* **** Includes **** */
31 #include <stdint.h>
32 #include "icc_regs.h"
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 /**
39  * @defgroup icc ICC
40  * @ingroup periphlibs
41  * @{
42  */
43 
44 /**
45  * @brief Enumeration type for the Cache ID Register
46  */
47 typedef enum {
48     ICC_INFO_RELNUM, ///< Identifies the RTL release version
49     ICC_INFO_PARTNUM, ///< Specifies the value of C_ID Port Number
50     ICC_INFO_ID ///< Specifies the value of Cache ID
51 } mxc_icc_info_t;
52 
53 /**
54  * @brief   Reads the data from the Cache Id Register.
55  * @param   cid Enumeration type for Cache Id Register.
56  * @retval  Returns the contents of Cache Id Register.
57  */
58 int MXC_ICC_ID(mxc_icc_info_t cid);
59 
60 /**
61  * @brief   Enable the instruction cache controller.
62  */
63 void MXC_ICC_Enable(void);
64 
65 /**
66  * @brief   Disable the instruction cache controller.
67  */
68 void MXC_ICC_Disable(void);
69 
70 /**
71  * @brief   Flush the instruction cache controller.
72  */
73 void MXC_ICC_Flush(void);
74 
75 /**
76  * @brief   Reads ID information from one of the ICC's Cache ID Register.
77  * @param   icc     Pointer ICC instance to get ID information from.
78  * @param   cid     Selects what information to get from the Cache ID Register
79  * @retval  Returns the selected value from the Cache ID Register.
80  */
81 int MXC_ICC_IDInst(mxc_icc_regs_t *icc, mxc_icc_info_t cid);
82 
83 /**
84  * @brief   Enables one of the ICC's.
85  * @param   icc     Pointer to ICC instance to enable.
86  */
87 void MXC_ICC_EnableInst(mxc_icc_regs_t *icc);
88 
89 /**
90  * @brief   Disables one of the ICC's.
91  * @param   icc     Pointer to ICC instance to disable.
92  */
93 void MXC_ICC_DisableInst(mxc_icc_regs_t *icc);
94 
95 /**
96  * @brief   Flushes data from one of the ICC's.
97  * @param   icc     Pointer to ICC instance to flush.
98  */
99 void MXC_ICC_FlushInst(mxc_icc_regs_t *icc);
100 
101 /**@} end of group icc */
102 
103 #ifdef __cplusplus
104 }
105 #endif
106 
107 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_ICC_H_
108