1 /****************************************************************************** 2 * 3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 4 * Analog Devices, Inc.), 5 * Copyright (C) 2023-2024 Analog Devices, Inc. 6 * 7 * Licensed under the Apache License, Version 2.0 (the "License"); 8 * you may not use this file except in compliance with the License. 9 * You may obtain a copy of the License at 10 * 11 * http://www.apache.org/licenses/LICENSE-2.0 12 * 13 * Unless required by applicable law or agreed to in writing, software 14 * distributed under the License is distributed on an "AS IS" BASIS, 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16 * See the License for the specific language governing permissions and 17 * limitations under the License. 18 * 19 ******************************************************************************/ 20 21 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_CORE1_H_ 22 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_CORE1_H_ 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /** 29 * @file core1.h 30 * @brief Startup Code for MAX32665 Family CPU1 31 * @details These functions are called at the startup of the second ARM core (CPU1/Core1) 32 */ 33 34 /** 35 * @brief Starts the code on core 1 36 * Core1 code beings executing from Core1_Main() 37 */ 38 void Core1_Start(void); 39 40 /** 41 * @brief Stops code executing in Core 1 42 */ 43 void Core1_Stop(void); 44 45 /** 46 * @brief Main function for Core 1 Code 47 * The user should override this function 48 * in their application code 49 */ 50 int Core1_Main(void); 51 52 /** 53 * @brief Equivalent to PreInit for Core 0 54 * Can be used for preliminary initialization 55 */ 56 void PreInit_Core1(void); 57 58 /** 59 * @brief Equivalent to PreInit for Core 1 60 * Enables FPU, and ICache 61 * Sets interrupt vector 62 */ 63 void SystemInit_Core1(void); 64 65 #ifdef __cplusplus 66 } 67 #endif 68 69 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32665_CORE1_H_ 70
