1 /** 2 * @file mxc_pins.h 3 * @brief This file contains constant pin configurations for the peripherals. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_MXC_PINS_H_ 27 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_MXC_PINS_H_ 28 29 #include "gpio.h" 30 31 /***** Global Variables *****/ 32 33 typedef enum { MAP_A, MAP_B, MAP_C } sys_map_t; 34 35 // Predefined GPIO Configurations 36 extern const mxc_gpio_cfg_t gpio_cfg_swda; 37 extern const mxc_gpio_cfg_t gpio_cfg_swdb; 38 39 extern const mxc_gpio_cfg_t gpio_cfg_i2c0; 40 extern const mxc_gpio_cfg_t gpio_cfg_i2c1; 41 42 extern const mxc_gpio_cfg_t gpio_cfg_uart0; 43 extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow; 44 extern const mxc_gpio_cfg_t gpio_cfg_uart1a; 45 extern const mxc_gpio_cfg_t gpio_cfg_uart1b; 46 extern const mxc_gpio_cfg_t gpio_cfg_uart1c; 47 extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow; 48 49 extern const mxc_gpio_cfg_t gpio_cfg_spi0; 50 extern const mxc_gpio_cfg_t gpio_cfg_spi1a; 51 extern const mxc_gpio_cfg_t gpio_cfg_spi1b; 52 53 // Timers are only defined once, depending on package, each timer could be mapped to other pins 54 extern const mxc_gpio_cfg_t gpio_cfg_tmr0; 55 extern const mxc_gpio_cfg_t gpio_cfg_32kcal; 56 57 extern const mxc_gpio_cfg_t gpio_cfg_i2s0a; 58 extern const mxc_gpio_cfg_t gpio_cfg_i2s0b; 59 60 // SPI v2 Pin Definitions 61 extern const mxc_gpio_cfg_t gpio_cfg_spi0_standard; 62 extern const mxc_gpio_cfg_t gpio_cfg_spi0_3wire; 63 // MXC_SPI0 does not support Dual or Quad mode. 64 extern const mxc_gpio_cfg_t gpio_cfg_spi1a_standard; 65 extern const mxc_gpio_cfg_t gpio_cfg_spi1a_3wire; 66 extern const mxc_gpio_cfg_t gpio_cfg_spi1b_standard; 67 extern const mxc_gpio_cfg_t gpio_cfg_spi1b_3wire; 68 // MXC_SPI1 does not support Dual or Quad mode. 69 70 // SPI v2 Target Selects Pin Definitions 71 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ts0; 72 extern const mxc_gpio_cfg_t gpio_cfg_spi1a_ts0; 73 extern const mxc_gpio_cfg_t gpio_cfg_spi1b_ts0; 74 75 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_MXC_PINS_H_ 76
