1 /**
2  * @file    lp.h
3  * @brief   Low power function prototypes and data types.
4  */
5 
6 /******************************************************************************
7  *
8  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9  * Analog Devices, Inc.),
10  * Copyright (C) 2023-2024 Analog Devices, Inc.
11  *
12  * Licensed under the Apache License, Version 2.0 (the "License");
13  * you may not use this file except in compliance with the License.
14  * You may obtain a copy of the License at
15  *
16  *     http://www.apache.org/licenses/LICENSE-2.0
17  *
18  * Unless required by applicable law or agreed to in writing, software
19  * distributed under the License is distributed on an "AS IS" BASIS,
20  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21  * See the License for the specific language governing permissions and
22  * limitations under the License.
23  *
24  ******************************************************************************/
25 
26 // Define to prevent redundant inclusion
27 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_LP_H_
28 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_LP_H_
29 
30 /***** Includes *****/
31 #include "gpio.h"
32 #include "pwrseq_regs.h"
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 /**
39  * @defgroup pwrseq Low Power (LP)
40  * @ingroup periphlibs
41  * @{
42  */
43 
44 /** @brief System reset0 enumeration. Used in SYS_PeriphReset0 function */
45 typedef enum {
46     MXC_LP_OVR_0_9 = MXC_S_PWRSEQ_LP_CTRL_OVR_0_9V, /**< Reset DMA */
47     MXC_LP_OVR_1_0 = MXC_S_PWRSEQ_LP_CTRL_OVR_1_0V, /**< Reset DMA */
48     MXC_LP_OVR_1_1 = MXC_S_PWRSEQ_LP_CTRL_OVR_1_1V, /**< Reset DMA */
49 } mxc_lp_ovr_t;
50 
51 /**
52  * @brief 	   Clears the low power wakeup flags
53  */
54 void MXC_LP_ClearWakeStatus(void);
55 
56 /**
57  * @brief      Enables power to RAM addresses 0x20010000-0x20017FFF.
58  */
59 void MXC_LP_EnableSRAM3(void);
60 
61 /**
62  * @brief      Enables power to RAM addresses 0x20008000-0x2000FFFF.
63  */
64 void MXC_LP_EnableSRAM2(void);
65 
66 /**
67  * @brief      Enables power to RAM addresses 0x20004000-0x20007FFF.
68  */
69 void MXC_LP_EnableSRAM1(void);
70 
71 /**
72  * @brief      Enables power to RAM addresses 0x20000000-0x20003FFF.
73  */
74 void MXC_LP_EnableSRAM0(void);
75 
76 /**
77  * @brief      Disables power to RAM addresses 0x20010000-0x20017FFF. The contents of the RAM are destroyed.
78  */
79 void MXC_LP_DisableSRAM3(void);
80 
81 /**
82  * @brief      Disables power to RAM addresses 0x20008000-0x2000FFFF. The contents of the RAM are destroyed.
83  */
84 void MXC_LP_DisableSRAM2(void);
85 
86 /**
87  * @brief      Disables power to RAM addresses 0x20004000-0x20007FFF. The contents of the RAM are destroyed.
88  */
89 void MXC_LP_DisableSRAM1(void);
90 
91 /**
92  * @brief      Disables power to RAM addresses 0x20000000-0x20003FFF. The contents of the RAM are destroyed.
93  */
94 void MXC_LP_DisableSRAM0(void);
95 
96 /**
97  * @brief      Places the instruction cache in light sleep mode. Data will be unavailable for read/write operations but will be retained.
98  */
99 void MXC_LP_EnableICacheLightSleep(void);
100 
101 /**
102  * @brief      Places addresses 0x20010000 to 0x20017FFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained.
103  */
104 void MXC_LP_EnableSysRAM3LightSleep(void);
105 
106 /**
107  * @brief      Places addresses 0x20008000 to 0x2000FFFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained.
108  */
109 void MXC_LP_EnableSysRAM2LightSleep(void);
110 
111 /**
112  * @brief      Places addresses 0x20004000 to 0x20007FFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained.
113  */
114 void MXC_LP_EnableSysRAM1LightSleep(void);
115 
116 /**
117  * @brief      Places addresses 0x20000000 to 0x20003FFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained.
118  */
119 void MXC_LP_EnableSysRAM0LightSleep(void);
120 
121 /**
122  * @brief      Places the instruction cache in active mode.
123  */
124 void MXC_LP_DisableICacheLightSleep(void);
125 
126 /**
127  * @brief      Places addresses 0x20010000 to 0x20017FFF of the RAM in active mode.
128  */
129 void MXC_LP_DisableSysRAM3LightSleep(void);
130 
131 /**
132  * @brief      Places addresses 0x20008000 to 0x2000FFFF of the RAM in active mode.
133  */
134 void MXC_LP_DisableSysRAM2LightSleep(void);
135 
136 /**
137  * @brief      Places addresses 0x20004000 to 0x20007FFF of the RAM in active mode.
138  */
139 void MXC_LP_DisableSysRAM1LightSleep(void);
140 
141 /**
142  * @brief      Places addresses 0x20000000 to 0x20003FFF of the RAM in active mode.
143  */
144 void MXC_LP_DisableSysRAM0LightSleep(void);
145 
146 /**
147  * @brief      Enables the selected GPIO port and its selected pins to wake up the device from any low power mode.
148  *             Call this function multiple times to enable pins on multiple ports.  This function does not configure
149  *             the GPIO pins nor does it setup their interrupt functionality.
150  * @param      wu_pins      The port and pins to configure as wakeup sources.  Only the gpio and mask fields of the
151  *                          structure are used.  The func and pad fields are ignored.
152  */
153 void MXC_LP_EnableGPIOWakeup(const mxc_gpio_cfg_t *wu_pins);
154 
155 /**
156  * @brief      Disables the selected GPIO port and its selected pins as a wake up source.
157  *             Call this function multiple times to disable pins on multiple ports.
158  * @param      wu_pins      The port and pins to disable as wakeup sources.  Only the gpio and mask fields of the
159  *                          structure are used.  The func and pad fields are ignored.
160  */
161 void MXC_LP_DisableGPIOWakeup(const mxc_gpio_cfg_t *wu_pins);
162 
163 /**
164  * @brief      Enables the RTC alarm to wake up the device from any low power mode.
165  */
166 void MXC_LP_EnableRTCAlarmWakeup(void);
167 
168 /**
169  * @brief      Disables the RTC alarm from waking up the device.
170  */
171 void MXC_LP_DisableRTCAlarmWakeup(void);
172 
173 /**
174  * @brief      Places the device into SLEEP mode.  This function returns once any interrupt occurs.
175  * @note 	   MXC_LP_ClearWakeStatus should be called before this function, to avoid immediately waking up again
176  */
177 void MXC_LP_EnterSleepMode(void);
178 
179 /**
180  * @brief      Places the device into DEEPSLEEP mode.  This function returns once an RTC or external interrupt occur.
181  * @note      MXC_LP_ClearWakeStatus should be called before this function, to avoid immediately waking up again
182 */
183 void MXC_LP_EnterDeepSleepMode(void);
184 
185 /**
186  * @brief      Places the device into BACKUP mode.  CPU state is not maintained in this mode, so this function never returns.
187  *             Instead, the device will restart once an RTC or external interrupt occur.
188  * @note       MXC_LP_ClearWakeStatus should be called before this function, to avoid immediately waking up again
189  */
190 void MXC_LP_EnterBackupMode(void);
191 
192 /**
193  * @brief      Places the device into Shutdown mode.  CPU state is not maintained in this mode, so this function never returns.
194  *             Instead, the device will restart once an RTC, USB wakeup, or external interrupt occur.
195  */
196 void MXC_LP_EnterShutDownMode(void);
197 
198 /**
199  * @brief      Set operating voltage and change the clock to match the new voltage.
200  * @param	   system reset configuration struct
201  */
202 int MXC_LP_SetOperatingVoltage(mxc_lp_ovr_t ovr);
203 
204 /**
205  * @brief      Enables Data Retention to RAM addresses 0x20000000-0x20003FFF.
206  */
207 void MXC_LP_EnableSRamRet0(void);
208 
209 /**
210  * @brief      Disables Data Retention to RAM addresses 0x20000000-0x20003FFF.
211  */
212 void MXC_LP_DisableSRamRet0(void);
213 
214 /**
215  * @brief      Enables Data Retention to RAM addresses 0x20004000-0x20007FFF.
216  */
217 void MXC_LP_EnableSRamRet1(void);
218 
219 /**
220  * @brief      Disables Data Retention to RAM addresses 0x20004000-0x20007FFF.
221  */
222 void MXC_LP_DisableSRamRet1(void);
223 
224 /**
225  * @brief      Enables Data Retention to RAM addresses 0x20008000-0x2000FFFF.
226  */
227 void MXC_LP_EnableSRamRet2(void);
228 
229 /**
230  * @brief      Disables Data Retention to RAM addresses 0x20008000-0x2000FFFF.
231  */
232 void MXC_LP_DisableSRamRet2(void);
233 
234 /**
235  * @brief      Enables Data Retention to RAM addresses 0x20010000-0x20017FFF.
236  */
237 void MXC_LP_EnableSRamRet3(void);
238 
239 /**
240  * @brief      Disables Data Retention to RAM addresses 0x20010000-0x20017FFF.
241  */
242 void MXC_LP_DisableSRamRet3(void);
243 
244 /**
245  * @brief      Enables Bypassing the hardware detection of an external supply on V CORE enables a faster wakeup time.
246  */
247 void MXC_LP_EnableBlockDetect(void);
248 
249 /**
250  * @brief      Disables Bypassing the hardware detection of an external supply on V CORE enables a faster wakeup time
251  */
252 void MXC_LP_DisableBlockDetect(void);
253 
254 /**
255  * @brief      RAM Retention Regulator Enable for BACKUP Mode
256  */
257 void MXC_LP_EnableRamRetReg(void);
258 
259 /**
260  * @brief      RAM Retention Regulator Disabels for BACKUP Mode
261  */
262 void MXC_LP_DisableRamRetReg(void);
263 
264 /**
265  * @brief      Enables Fast wake up from deepsleep
266  */
267 void MXC_LP_EnableFastWk(void);
268 
269 /**
270  * @brief      Disables Fast wake up from deepsleep
271  */
272 void MXC_LP_DisableFastWk(void);
273 
274 /**
275  * @brief      Turns on band gap during deepsleep and backup mode.
276  */
277 void MXC_LP_EnableBandGap(void);
278 
279 /**
280  * @brief      Turns off band gap during deepsleep and backup mode.
281  */
282 void MXC_LP_DisableBandGap(void);
283 
284 /**
285  * @brief     Enables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode
286  */
287 void MXC_LP_EnableVCorePORSignal(void);
288 
289 /**
290  * @brief     Disables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode
291  */
292 void MXC_LP_DisableVCorePORSignal(void);
293 
294 /**
295  * @brief     Enables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode
296  */
297 void MXC_LP_EnableLDO(void);
298 
299 /**
300  * @brief     Disables signal for power on reset when the device is int DEEPSLEEP or BACKUP mode
301  */
302 void MXC_LP_DisableLDO(void);
303 
304 /**
305  * @brief     Enables V CORE Supply Voltage Monitor
306  */
307 void MXC_LP_EnableVCoreSVM(void);
308 
309 /**
310  * @brief     Disables V CORE Supply Voltage Monitor
311  */
312 void MXC_LP_DisableVCoreSVM(void);
313 
314 /**
315  * @brief     Enables VDDIO Power-On-Reset Monitor
316  */
317 void MXC_LP_EnableVDDIOPorMonitor(void);
318 
319 /**
320  * @brief     Disables VDDIO Power-On-Reset Monitor
321  */
322 void MXC_LP_DisableVDDIOPorMonitor(void);
323 /**@} end of group pwrseq */
324 
325 #ifdef __cplusplus
326 }
327 #endif
328 
329 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32660_LP_H_
330